Abstract: A central processing unit (CPU) is provided and is coupled to a display for displaying graphic and other data in multiple overlapping windows. The CPU is further coupled to one or more input devices which permits a user to selectively position a cursor and input and manipulate data within each of the windows on the display. The windows include defined areas having window features such as text, icons and buttons corresponding to functions to be executed by the CPU. Multiple applications may be executed concurrently by the CPU such that each application is associated with one or more windows. Each display element (“pixel”) comprising the display is represented by multiple bits in a computer frame buffer memory coupled to the CPU. An alpha value (&agr;) is associated with the intensity of each pixel of the display, such that multiple images may be blended in accordance with a predefined formula utilizing the alpha values.
Type:
Grant
Filed:
May 7, 2002
Date of Patent:
February 17, 2004
Assignee:
Sun Microsystems, Inc.
Inventors:
Edward H. Frank, Patrick J. Naughton, James Arthur Gosling, John C. Liu
Abstract: A multiprocessor digital data processing system comprises a plurality of processing cells arranged in a hierarchy of rings. The system selectively allocates storage and moves exclusive data copies from cell to cell in response to access requests generated by the cells. Routing elements are employed to selectively broadcast data access requests, updates and transfers on the rings.
Type:
Grant
Filed:
September 28, 2001
Date of Patent:
February 17, 2004
Assignee:
Sun Microsystems, Inc.
Inventors:
Steven J. Frank, Henry Burkhardt, III, Linda O. Lee, Nathan Goodman, Benson I. Margulies, Frederick D. Weber
Abstract: A method and apparatus for assigning decoupling capacitors on an integrated circuit such that leakage power is minimized is provided. Particularly, the method and apparatus use an available capacitance area of an integrated circuit, a capacitance requirement of the integrated circuit, an available thin-oxide capacitance amount, and an available thick-oxide capacitance amount to generate an assignment that indicates what percentage of the available capacitance area should be filled with thin-oxide capacitors and what percentage of the available capacitance area should be filled with thick-oxide capacitors in order to meet the capacitance requirement and minimize leakage power attributable to the thin-oxide and thick-oxide capacitors.
Abstract: A method and system for accurately measuring the reception characteristics of receivers in a multicast data distribution group having a sending node and a plurality of receivers. The multicast group is organized as a repair tree in which selected nodes of the multicast group comprise repair nodes for downstream receivers. Multicast data packets transmitted by the repair nodes include a retransmission count field in addition to the multicast packet header information, a session identifier, a packet sequence number and payload data. The retransmission count provides an indication of the number of times the respective packet has been retransmitted in response to a repair request. The receivers include an original packet counter and a retransmission count counter for each multicast session. Each receiver increments the original packet counter upon receipt of a packet that has not been previously received.
Type:
Grant
Filed:
April 11, 2000
Date of Patent:
February 17, 2004
Assignee:
Sun Microsystems, Inc.
Inventors:
Joseph S. Wesley, Dah Ming Chiu, Miriam C. Kadansky, Joseph E. Provino, Stephen R. Hanna
Abstract: A method for debugging a computer program, includes (a) selecting a section of the computer program assembled in a machine-language, the computer program using a set of registers, the section including a plurality of machine-language instructions, (b) disassembling the plurality of machine-language instructions into mnemonic instructions, (c) automatically determining and selecting registers used by the mnemonic instructions corresponding to the section from among the set of registers, and (d) displaying the selected registers to a user. The method may further include displaying the mnemonic instructions, indicating a specific mnemonic instruction, and displaying a value of each of the selected registers before the execution of the indicated mnemonic instruction. The method may further include providing an option to a user to manually select registers to be displayed.
Type:
Application
Filed:
August 12, 2002
Publication date:
February 12, 2004
Applicant:
Sun Microsystems, Inc., a Delaware Corporation
Abstract: A computer system comprises a system memory, a first active device configured to access data stored in the system memory, and a second active device configured to access data stored in said system memory. The first active device is configured to generate a read-to-share transaction corresponding to a load operation. In response to receiving an invalidating transaction subsequent to receiving the read-to-share transaction, the first active device selectively allows the load operation to complete depending upon an indication of whether the load operation is a critical load. In one embodiment, an active device comprises a processing unit and an interface controller coupled to receive a load request corresponding to a load operation initiated by said processing unit.
Abstract: Clocked half-rail differential logic circuits are activated by a delayed clock and include a sense amplifier circuit that is triggered by a second delayed clock. The addition of the sense amplifier circuit, and second delayed clock signal, allows the sense amplifier circuit to act as the driver and therefore there is no need for increasing the size of the differential logic block to provide a driver function. Consequently, the clocked half-rail differential logic with amplifier circuits of the invention are capable of operating efficiently under heavy load conditions without the increased size and the significant reduction in speed associated with prior art half-rail differential logic circuits.
Abstract: A method and apparatus for thermally isolating a temperature sensor mounted on a printed circuit board from a heat generating component mounted on the printed circuit board is provided. Generally, a thermal isolation region, which may be comprised of a plurality of openings in the printed circuit board, is disposed about the temperature sensor to interrupt conductive transfer of heat from the heat generating component to the temperature sensor. The openings extend sufficiently far into the printed circuit board to remove at least a portion of a conductive layer, such as a power plane from the region surrounding the temperature sensor. Electrical power and signals may be provided to the temperature sensor through regions intermediate the openings.
Abstract: A method and system to allow user applications can access hardware platform-specific configuration information in a generic way. A platform independent framework lies on a layer that interfaces with the operating system layer. Accordingly, when a platform is changed, the operating system layer is notified of the change to facilitate informing the user of the change. This framework also has a plug-in publishing interface that is used to develop platform-specific modules to publish or export hardware configurations to other users. In another embodiment, this framework has a user interface that allows the user to make the necessary changes to the system management and hardware diagnostic tools whenever the platform is changed to ensure that the tools function correctly.
Type:
Application
Filed:
September 25, 2002
Publication date:
February 12, 2004
Applicant:
Sun Microsystems, Inc.
Inventors:
Srinivasan Subramanian, John G. Johnson, Gregory C. Onufer, Richard A. Zatorski
Abstract: A method and apparatus generate an operational load condition at a server. A plurality of communication sessions is established on a client and test input operations are accessed and produced in each of the communication sessions to generate a realistic operational load condition. The communication sessions and/or the playback operations are started with appropriate time delays.
Abstract: Methods and systems consistent with the present invention provide for testing a protocol for transmitting data between a first device and a second device. The first device sends a set of data to both a data controller and the second device. The data controller receives the set of data sent by the first device. The second device also receives the set of data sent by the first device. The second device then sends the data received from the first device to the data controller. The data controller sends the set of data received from the first device to a data comparator. The data controller then sends the set of data received from the second device to the data comparator.
Abstract: Clocked half-rail differential logic circuits are activated by a delayed clock and include a sense amplifier circuit that is triggered by a second delayed clock. The addition of the sense amplifier circuit, and second delayed clock signal, allows the sense amplifier circuit to act as the driver and therefore there is no need for increasing the size of the differential logic block to provide a driver function. Consequently, the clocked half-rail differential logic circuits of the invention are capable of operating efficiently under heavy load conditions without the increased size and the significant reduction in speed associated with prior art half-rail differential logic circuits.
Abstract: An I/O device that includes: an input port; an input buffer coupled to the input port; an internal port operable to store packets generated by the I/O device; an internal buffer coupled to the internal port; a plurality of packet ID arrival registers coupled to the input port and the internal port; autocorrelation logic coupled to the plurality of packet ID arrival registers; an arbiter coupled to the autocorrelation logic; a packet selector coupled to the arbiter, the input buffer and the internal buffer; and an output port coupled to the packet selector.
Abstract: An apparatus and method for a dry disconnect coupling. The dry disconnect coupling includes a first coupling member for coupling to a second coupling member. A circuit provides a first signal based on when the first coupling member is disconnected to the second coupling member. Thermally coupled to the first coupling member is a first heater. The first heater generates heat based on the first signal.
Abstract: A system and method for availability management coordinates operational states of components to implement a desired redundancy model within a high-availability computing system. Within the availability management system, an availability manager monitors various reports on the status of components and nodes within the system. The availability manager uses these reports to direct components to change states if necessary, in order to maintain the desired system redundancy model. The availability management system includes a health monitor for performing component status audits upon individual components and reporting component status changes. The system also includes a watch-dog timer, which monitors the health monitor and reboots the entire node containing the health monitor if it becomes non-responsive. Each node within the system also includes a cluster membership monitor, which monitors nodes becoming non-responsive and reports node non-responsive errors.
Abstract: A method for estimating jitter in a delay locked loop is provided. The estimation is determined from a simulation that uses a representative power supply waveform having noise as an input. Further, a computer system for estimating jitter in a delay locked loop is provided. Further, a computer-readable medium having recorded thereon instructions adapted to estimate jitter in a delay locked loop is provided.
Type:
Grant
Filed:
February 14, 2002
Date of Patent:
February 10, 2004
Assignee:
Sun Microsystems, Inc.
Inventors:
Claude Gauthier, Brian Amick, Dean Liu, Pradeep Trivedi
Abstract: The present invention provides management of one or more domains in a processor-based system over a network connection. An apparatus is provided that comprises a first plane adapted to receive a first voltage level and a second plane adapted to receive a second voltage level. The apparatus further comprises a path asymmetrically positioned between the first plane and the second plane, wherein the path is capable of providing the network connection to one or more devices within the processor-based system.
Abstract: In a distributed computer system, a data set having a plurality of data rows is extended by adding an additional column to the data set and assigning a persistent partition ID to each of the plurality of data rows in the additional column. The extended data set can then be queried by a plurality of queries, each of which has conditions that select the same rows from the data set and each of which has different partition ID information. The partition ID information forms a different result set from the selected rows so that the result set of each query forms a non-overlapping, transferable result set partition. Together, the result set partitions form the complete result set. The result set partitions can be transferred in parallel through the computer system to increase the system throughput.
Abstract: Improved techniques for managing propagation of data through software modules used by computer systems are disclosed. The improved techniques can be implemented to manage the propagation of data through software modules used by computer systems. More particularly, the improved techniques obtain improved propagation of data messages to and from synchronization queues which back up main queues associated with the software modules. A segregated synchronization queue which allows segregation of data pertaining to events from data that does not pertain to events. In addition, data can be organized and processed in accordance with different priority levels.
Abstract: Methods and apparatus for converting a lightweight monitor to a heavyweight monitor are disclosed. According to one aspect of the present invention, a computer-implemented method for converting a lightweight monitor to a heavyweight monitor when an object that is owned by a second thread is unavailable to a first thread includes creating a new heavyweight monitor and setting the ownership of the new heavyweight monitor to the second thread. The first thread then enters the newly created heavyweight monitor without being forced to spin lock until the object is released by the second object.