Abstract: A method for programming a controller of a memory unit has been developed. The method includes inputting variable initialization parameters of the memory unit and a clock delay and a command delay for each parameter. Based on each pair of clock delays and command delays, calculate a set of delays for a read command and a write command. Calculate the system performance for each pair of clock and command delays bases on the read and write delays and select the initial parameters that offer optimum system performance.

Abstract: A computer-implemented directory access mechanism provides a directory service operable to access a network directory under a predetermined protocol by responding to an access request under the protocol for information available in a predetermined environment external to the directory. The directory service then uses the access method for the environment to access the information available in the environment. In this manner, data in the given environment can be accessed by a directory service operable under the given protocol by configuring an attribute access method and using this method to retrieve the information. The protocol can be the Lightweight Directory Access Protocol. The information to be accessed could typically be an attribute of an entry in the directory. An access control list (for example the Directory Access Control Domain) can contain not only control access rights for directory objects, but also the access methods for attributes of the directory objects.

Abstract: A circuit for reducing the noise associated with a clock signal for a latch based circuit has been developed. The circuit includes a charge control portion that stores charge at a pre-determined time of the clock cycle and a dump control portion that releases the stored current also at a predetermined time of the clock cycle. The charge is released onto the power grid of the system served by the clock signal in synchronization with the operation of the latch.

Abstract: Methods and apparatus for providing a substantially full set of state information to a debugger, without significantly compromising system performance, in order to debug optimized computer program code are disclosed. According to one aspect of the present invention, a method for obtaining information associated with program code includes adding a segment of code, which includes a representation that is effectively not used after it is computed, to the program code. Debugging code is added in proximity to the segment of code, and machine code is generated from the program code. The machine code includes a break point that is associated with the debugging code, and includes an instruction at the breakpoint. Finally, the method includes replacing the instruction at the break point with a branch instruction that is arranged to cause the debugging code to execute.

Abstract: Dedicated federated beans monitor an event service in a data services management system and sends human-readable messages to people involved in the administration of management services in order to inform the administrators that an event they are interested in has occurred. In one embodiment, the beans each contain a category list indicating which events are of interest to the administrators and the beans cooperate with each other to insure that the category lists in the beans are synchronized. In another embodiment, the federated bean composes and forwards e-mail messages to administrators. In still another embodiment, the federated bean also monitors and reports messages posted to a logging service.

Abstract: A method for bonding diamond heat distribution structures to integrated circuit packages using optical contacting. In one embodiment, a heat spreader comprising diamond slab has a flat contact surface which is polished to a high degree of smoothness. An integrated circuit's package also has a flat contact surface which is polished to a high degree of smoothness. The contact surfaces of the diamond slab and the package are thoroughly cleaned and are then placed in contact with each other, establishing an optical contact bond between them. In one embodiment, the contact surfaces of the diamond and package which are to be bonded together are first polished, then a layer of an intermediate material such as silicon carbide is deposited on the polished surfaces. The silicon carbide layers on the contact surfaces are cleaned and placed in contact with each other to establish an optical contact bond.

Abstract: A process execution management system is provided. The system includes a controller system designed to have a data center component, a first user interface component instance, and a second user interface component instance. The controller system is accessible over a network, enabling remote user access to data managed by the controller system. The data center component includes data required to execute a process by a processing resource. The processing resource is in communication with the controller system. The first user interface component instance enables a first user interface to provide an interface to a first copy of the data center component. The first user interface notifies the data center component of a change to the first copy of the data center component. The second user interface component instance enables a second user interface to provide an interface to a second copy of the data center component.

Abstract: A method and apparatus for determining clock insertion delays for a microprocessor design having a grid-based clock distribution. The method includes partitioning the complete clock net into a global clock net and a plurality of local clock nets, simulating a load for each of the local clock nets, simulating the global clock net, and combining the simulations to form the complete clock net. The method may further include evaluating the combination to determine whether the results converge and storing the simulation results in a Clock Data Model. When the results do not converge, the method re-simulates at least one of the local clock nets and re-simulates the global clock net. The Clock Data Model collects, manages, retrieves, and queries all of the simulation information. The method may further analyze the complete clock net to predict the clock skew for a given data transfer path for potential redesign.

Abstract: In a switched configuration in which data links can be bundled to increase data throughput, the links in a bundle are ordered. A data sender sequentially transmits cells in the data packet over links in the bundle. For example, a first cell is transmitted over a first ordered link in the bundle. The next cell is transmitted over the next link in the bundle order and operation continues in a “round robin” fashion. The data receiver is informed in advance of the order of links in the bundle and expects cells to be distributed over the links in that order. The data sender transmits a bundle sequence number with each data cell. As each new data cell is transmitted, the bundle sequence number is incremented. The receiver uses the bundle sequence number to validate cell order, to detect lost cells, and to resynchronize cell order with the sender in the case of cell errors.

Abstract: A key such as a private key or key password of a private key is encrypted for storage, and may be decrypted if the private key becomes lost or unavailable. The key is encrypted by encoding, for example, by hashing, private information such as mother's maiden name and social security number, and the result is used as a key to encrypt the private key using DES or another symmetric encryption technique. The encrypted key is again encrypted, for example using asymmetric encryption, using the public key of a trusted party such as the certificate authority that generated the private key. The result may be stored as a key recovery file by the principal of the private key or another party. To decrypt the key recovery file, the private key corresponding to the public key used to encrypt the key recovery file is used to decrypt the key recovery file, for example by asymmetric decryption.

Abstract: A fan tray assembly for an electronics enclosure includes two opposing, spaced apart shells made of a sheet material. The opposing shells are attached to each other by attachment features formed in the sheet material of each shell. Advantageously, the attachment features reduce or eliminate the need for separate fasteners or adhesive to attach the shells. Each shell has openings forming a grill. The grill is aligned with a similarly formed grill of an opposing shell. Each shell also has retention features formed in the sheet material around a periphery of their respective grills. A ventilation fan is retained between the two shells by the retention features, in alignment with the grill of each shell. An electrical connector is connected to the ventilation fan and retained by at least one of the shells. The electrical connector is exposed by an opening of the fan tray assembly and oriented towards an exterior thereof.

Abstract: The present invention is directed to a system having a shared processing resource, a plurality of processing modules and a synchronization control module. The shared processing resource is configured to perform processing operations in connection with input data provided by the processing modules, in response to a start indication. Each of the processing modules is configured to perform selected processing operations. At least one of the processing modules is configured to provide input data to the shared processing resource. Each processing module that provides input data is configured to generate a hold indication and to provide the input data to the shared processing resource in response to a synchronization barrier lock. Each processing module is configured to generate a start enable indication. Each processing module that provides input data generates a start enable indication after providing the input data.

Abstract: A system and method for monitoring a distributed fault tolerant computer system. A hardware counter mechanism (e.g. a countdown counter) is reset repeatedly by a software reset mechanism during normal operation, thereby preventing the counter mechanism from reaching a count indicative of the existence of a fault. A unit provides a signal to a bus indicative of the status (ON or OFF) of the unit. A management subsystem defines a configuration for the distributed fault tolerant computer system. The management subsystem is responsive to status signals on the bus and selectively reconfigures a stored representation in response to changing status signals on the bus.

Abstract: An apparatus and method for comparing identifications of circuit boards in a midplane. When a first circuit board and a second circuit board are inserted into opposite sides of the midplane, an incompatibility between the first circuit board and the second circuit board may damage or impair the operation of one or both of the first circuit board and the second circuit board. To solve this problem, a first identification is stored on the first circuit board and a second identification is stored on the second circuit board. If the first identification of the first circuit board and the second identification of the second circuit board indicate an incompatibility, then one or both of the first circuit board and the second circuit board is/are prevented from fully powering up.

Abstract: A method for reducing the noise associated with a clock signal for a latch based circuit has been developed. The method includes storing a charge at a pre-determined time of the clock cycle and releasing the stored charge also at a pre-determined time of the clock cycle. The charge is released onto the power grid of the system served by the clock signal in synchronization with the operation of the latch.

Abstract: A Sweeney, Robertson, Tocher (SRT) divider for use in a computer system has recoding circuitry to recode the three most significant bits of the dividend into one-hot form as the dividend is loaded into a quotient/partial remainder register. With each clock, a partial remainder is generated also having its most significant three bits in one-hot form and the remaining bits in binary encoded form. The divider has several stages permitting it to generate several bits of quotient in each clock cycle. Each stage has circuitry for estimating a quotient digit, and for computing a partial remainder by subtracting the product of the quotient digit times the divisor from either the dividend or a previous partial remainder. This subtraction is performed upon a one-hot code in the most significant bits and in binary code on the least significant bits. The divider also has circuitry for assembling a plurality of quotient digits into a quotient.

Abstract: The illustrative embodiment of the present invention provides a method of inserting a software created virtual interface between the user of a host electronic device and a network storage medium. Data read and write requests are written to the virtual interface. The virtual interface is located on the host electronic device and allocates data to available storage mediums. Recovery and reconfiguration operations on the storage mediums holding stored data are hidden from the user by the virtual interface and may be performed contemporaneously with the user accessing the stored data.

Abstract: Methods and systems for platform-independent selective ahead-of-time compilation are herein described. A method selector comprising a profiling tool and heuristic selects a subset of methods for ahead-of-time compilation. The profiling tool ranks a set of methods according to predetermined criteria, and the heuristic identifies the subset of methods from the set of methods. An ahead-of-time compiler comprises a first unit and a second unit. The first unit converts, for each selected method, bytecodes corresponding to the selected method to a platform-independent intermediate representation. The second unit optimizes the platform-independent intermediate representation of each selected method, wherein each optimized intermediate representation is stored with a corresponding selected method. A virtual machine on a device converts an optimized intermediate representation associated with a selected method loaded onto the device to platform-dependent machine code.

Abstract: Provided is a method, system, and program for managing information for an application program. The information includes an information class having a plurality of attributes values. The application program maintains multiple information class instances and wherein each instance includes at least one of the plurality of attribute values. User input is received indicating a plurality of information class instances and for each information class instance at least one attribute value. A main directory is generated for the application program. For each information class instance received from the user, a subdirectory is generated from the main directory for the information class instance and, for each received attribute value for the information class instance, one attribute file is generated providing the at least one attribute value. Each generated attribute file is stored in the subdirectory of the information class instance for which the attribute value is provided.

Abstract: A computer processor includes a number of register pairs LOCKADDR/LOCKCOUNT. In each pair, the LOCKADDR/LOCKCOUNT register is to hold a value that identifies a lock for a computer resource. When a lock instruction issues, the corresponding LOCKCOUNT register is incremented. When an unlock instruction issues, the corresponding LOCKCOUNT register is decremented. The lock is freed when a count associated with the LOCKCOUNT register is decremented to zero. This scheme provides fast locking and unlocking in many frequently occurring situations. In some embodiments, the LOCKCOUNT registers are omitted, and the lock is freed on any unlock instruction corresponding to the lock. In some embodiments, a computer object includes a header which include a pointer to a class structure. The class structure is aligned on a 4-byte boundary, and therefore two LSBs of the pointer to the class structure are zero and are not stored in the header.