Abstract: A method for creating a class hierarchy containing categories for classification of documents. The class hierarchy is initialized to contain a root category node within a tree data structure. The root category node is defined by a user-defined category name. The class hierarchy is displayed to assist a user in entering a command for manipulating the class hierarchy. A user may select a category command, resulting in the class hierarchy containing a plurality of category nodes. In addition, a user may select a terms command to manipulate terms defining one of the plurality of category nodes.
Abstract: Apparatus, methods and computer program products provide for searching a data structure to extract possible matches of one or more known patterns that may exist in the data structure through a single traversal of the data structure. The apparatus methods and computer program products use a direction list tree that represents the known patterns that may exist in the data structure. The apparatus, methods and computer program products detect known patterns by gathering marker information from edge nodes that define the known patterns and then, at each pattern termination node, determines which known patterns have been found. These known patterns can then be processed.
Abstract: A technique for indexing data is provided. A method for compressing an index to obtain a compressed index that is easily stored and transmitted is provided. The invention also provides for the decompression of such a compressed index. One embodiment of the invention maintains a separate index for each document, thereby allowing easy updating of indexes in response to changes in documents and easy transmission of indexes, which allows distributed searching. The technique provides very compact indexing information, but allows the indexing information to be very rapidly processed.
Abstract: A system and method for efficient implementation of a multi-port logic first-in, first-out ("FIFO") structure or particular utility in high clock speed integrated circuit ("IC") processor design which provides for reduced on-chip area requirements and fewer and less timing critical electrical interconnect paths. The advantageous reduction in IC area and enhanced performance disclosed herein is enabled through the rotation of the inputs and outputs of the FIFO; maintenance of decoded head and tail pointers, and folding the FIFO entry locations such that the entries are arranged in an interleaved fashion.
Abstract: A secure communications arrangement is disclosed including a source device and a destination device interconnected by a network. The source device generates message packets for transfer to the destination device, each message packet including information in ciphertext form. The source device generates the ciphertext from plaintext in accordance with the cipher block chaining mode, using an initialization vector that is generated using a hash function selected so that small changes in an input result in large changes in the initialization vector. As a result values such as sequence numbers or time stamps can be used in generating the initialization vector, while still providing for cryptographic security for the ciphertext as against cryptanalytic attack. The destination device receives the message packet and decrypts the ciphertext to generate plaintext in accordance with the cipher block chaining mode, using an initialization vector that is generated using the corresponding hash function.
Abstract: A user can monitor changes to information located on a network by registering with an update monitor service. The update monitor service can run as a stand alone server in the network or can run on a user computer or on the computer of an Internet Service Provider. The update monitor service obtains information about changes to information being monitored for the server on which the information is located or from a comparison of old and current versions of the information. The user can modify the list of information sources to be monitored by the update monitor service.
Abstract: A method and apparatus for providing equalization for a communication channel is provided. The invention uses edge transition samples, such as those obtained for phase detection in a phase locked loop (PLL) circuit, to determine the amount of equalization to be applied to signals received from a communication channel. By monitoring run lengths of consecutive identical bits received from the communication channel, the invention provides equalization for various frequency components present in the receive signal. One embodiment of the invention subtracts a weighted RC-filtered version of the receive signal from the unfiltered receive signal to provide an equalized receive signal. In this embodiment, a control circuit that monitors the received run lengths and edge transition information adjusts the resistance of the RC filter to adapt the equalization to the data being received and the potentially time varying conditions for the communication channel.
Type:
Grant
Filed:
October 6, 1997
Date of Patent:
April 25, 2000
Assignee:
Sun Microsystems, Inc.
Inventors:
Robert J. Drost, Robert Bosnyak, Jose M. Cruz
Abstract: A method for operating a processor that executes coded instructions using an instruction scheduling unit receiving the coded instructions and issuing an instruction for execution. A replay signaling device generates a signal indicating when the instruction failed to execute properly within a predetermined time. A replay device within the instruction scheduling unit responsive to the signaling device then reissues the instruction for execution.
Abstract: An object-oriented interrupt processing system in a computer system creates a system database including a device namespace containing an entry for each device in the computer system and an interrupt namespace containing each entry in the interrupt source, arranged as an Interrupt Source Tree. Each entry in the Interrupt Source Tree is cross-referenced to a corresponding entry in the device namespace and contains a reference to an interrupt handler for the corresponding interrupt source. When an interrupt occurs, a single interrupt dispatcher is invoked, to access the Interrupt Source Tree and cause execution of the corresponding interrupt handler.
Type:
Grant
Filed:
March 26, 1998
Date of Patent:
April 18, 2000
Assignee:
Sun Microsystems, Inc.
Inventors:
Sunil K. Bopardikar, Thomas Saulpaugh, Gregory K. Slaughter, Xiaoyan Zheng
Abstract: A system and a process for providing visualization of program code written in an object-oriented programming language is described. The program code has a plurality of instructions with each such instruction including at least one of a data object and a corresponding data method. A visualization library includes a plurality of visualization classes. Each visualization class includes at least one visual object and at least one corresponding visual action. A visual manager library includes a plurality of visualization control classes. Each visualization control class includes at least one visualization control method.
Abstract: In a processor executing instructions speculatively or out-of-order, an apparatus for tracking traps, exceptions, and interrupts within the processor. A table stores front-end and back-end traps associated with an instruction, and an instruction retirement module retires the instructions in order if no traps were associated with older instructions in the processor. In this way, the proper trap sequence of events is maintained so that traps can be properly handled.
Abstract: An electronic assembly that includes a heat pipe that extends from an electronic card. The heat pipe has a condenser end that can be inserted into an elastic thermally conductive port of a manifold. The manifold may be part of a cooling system that removes heat from the condenser end of the heat pipe. The port may include a metal filled elastomeric material. The elastic characteristic of the material may accommodate for tolerances in the system and insure contact between the material and the heat pipe. The metal filler provides a thermal path from the heat pipe to the manifold. The elastic port allows the heat pipe to be coupled to the manifold without any fasteners.
Abstract: An interprise computing manager in which an application is composed of a client (front end) program which communicates utilizing a network with a server (back end) program. The client and server programs are loosely coupled and exchange information using the network. The client program is composed of a User Interface (UI) and an object-oriented framework (Presentation Engine (PE) framework). The UI exchanges data messages with the framework. The framework is designed to handle two types of messages: (1) from the UI, and (2) from the server (back end) program via the network. The framework includes a component, the mediator which manages messages coming into and going out of the framework.
Abstract: A method and apparatus for controlling access to a shared memory in a network system is described. The apparatus includes at least one fast port interface circuit, each comprising a fast input port interface configured to sequentially receive data, address, and command information from a network client at a first data rate in segments of a first width. Each fast input port interface comprises a fast interface register configured to temporarily store the data and address information. Each fast input port interface further comprises a command decode circuit configured to receive the command information and, in response, sequentially store the segments of data and address information in the fast interface register until the fast interface register is full, the fast interface register further configured to be read out in parallel to the shared memory.
Abstract: Methods and apparatus are disclosed for providing a data framework and associated client/server protocol for storing and exchanging data among computers in a network. A data schema having an n-way tree-type structure with a root node layer, intermediate node layers, and a data layer for storing configuration data is described. The intermediate node layers contain a multitude of nodes containing categorical information relating to components and various aspects of the computer network. Following a tree structure, each intermediate node and root node has branches emanating to nodes below it. These subordinate nodes are referred to as children nodes. The data node layer is at the bottom of the tree and contains actual specific configuration data relating to components and other aspects of the computer network, such as information regarding users registered to use the network.
Type:
Grant
Filed:
May 14, 1998
Date of Patent:
April 18, 2000
Assignees:
Sun Microsystems, Inc., International Business Machines Corporation
Inventors:
Bernard A. Traversat, Tom Saulpaugh, Jeffrey A. Schmidt, Gregory L. Slaughter, William J. Tracey, Steve Woodward
Abstract: A class loader downloads objects and object viewers from remote computer nodes, and invokes locally stored object viewers to view objects. When a user selects an object to view, a conventional downloading of the referenced object is initiated. The class loader, however, utilizes data type information received at the beginning of the object downloading process to determine if a viewer for the referenced object is available on the user's workstation. If an appropriate view is not locally available, the class loader automatically locates an appropriate viewer on the server from which the object is being downloaded, or from any other appropriate server known to the user's workstation. The class loader downloads the located viewer and then invokes a program verification procedure to verify the integrity of the downloaded viewer before the viewer is executed.
Abstract: A system automatically generates a representative image to represent a video sequence of a video program, and facilitates editing and manipulating of the video program. The system comprises receiving means (such as a frame selector or a unit extractor) for receiving a frame having at least one unit from a sequence of frames, resolving means (such as a unit extractor) for resolving one of the at least one unit, and generating means (such as an image engine) for generating an image representative of the sequence based on the unit. The system may further comprise a sequence divider for dividing the video program into multiple video sequences, and a frame selector for selecting the first sequence from the multiple sequences.
Abstract: To compensate for process, activity and environmental variations in a semiconductor device, a back-bias potential tuning circuit is formed on a semiconductor die. The tuning circuit tunes a bias potential applied to the semiconductor die to maintain a predetermined ratio between a transistor on-current and a transistor off-current through at least one channel region. Then, a leakage current is measured for multiple transistors formed in the semiconductor die to determine a representative leakage of the semiconductor die. Tuning characteristics of the back-bias potential tuning circuit are then set to match the representative leakage of the semiconductor die.
Abstract: An apparatus and method for translating a virtual address to a physical address utilizing an address translation unit implemented within a network interface card is described. The address translation unit of the present invention is utilized in a computer system. The computer system comprises a first bus; processors with embedded caches and memory coupled to the first bus; a second bus; a network logic coupled to the second bus, wherein the network logic includes an address translation unit; and a bus bridge coupled to the first bus and to the second bus.
Abstract: A system for secure multicast including at least one sending entity operating on a sending computer system, the sending entity with a sending multicast application running on the sending computer system. A number of receiving entities each running on a receiving computer system, the receiving entities having a receiving multicast application running. A traffic distribution component coupled to the sending entity and each of the receiving entities, where the traffic distribution component supports a connectionless datagram protocol. A participant key management component operates within each receiver entity where the participant key management component holds a first key that is shared with the sender and all of the receiving entities, and a second key that is shared with the sender and at least one but less than all of the receiving entities. A group key management component is coupled to the traffic distribution component and includes a data structure for storing all of the participant first and second keys.