Abstract: Bi-directional data transfers between a first system and a second system, which have asynchronous clock domains, are performed using a single dual-port memory. A direction control circuit, which is connected between the first and second systems, determines the desired direction of data transfer and generates one or more direction signals representative of this direction. A write control circuit is coupled to receive a direction control signal, as well as write control signals from the first and second systems. Similarly, a read control signal is coupled to receive a direction control signal, as well as read control signals from the first and second systems. If data transfer is to proceed from the first system to the second system, the write control circuit gives the first system control over the write port of the dual-port memory, and the read control circuit gives the second system control over the read port of the dual-port memory in response to the direction control signals.

Abstract: Apparatus is disclosed for viewing computer generated images and for tracking the positions of the user's head and hand. One alternative of the apparatus includes a frame element, versatilely mountable, with sensors for the head tracking of a user whose bodily movement is constrained to a small area. Short range and inexpensive sensors are deployed for tracking the position of the user's head; these sensors are deployed partly on a on the user's head and partly on the tracking frame. All the electronics for tracking and user input are enclosed in a mobile pack. In another alternative of the tracking invention natural forces such as gravity, the Earth's magnetic field, and inertia are used, so additional references. The display allows for interchangeable optical elements so that it may be tailored to suit the needs of a particular user or application. One optical element disclosed is a bicolor polarizer, which allows an lcd to inexpensively provide a bicolor display without loss of resolution.

Abstract: In a processor executing instructions speculatively or out-of-order, a dependency table tracks instruction dependencies between a current instruction and a live instruction. The table contains an instruction identifier and the destination register specified by the live instruction. The table can also contain information about the age of the entry, the validity of the entry, and the process which the entry is associated. A dependency between instructions is determined by one or more comparators comparing the destination register to the source registers of the current instruction. True dependencies are distinguished from false dependencies using the age information, the validity information, and the process information.

Abstract: A technique has been described of characterizing the timing behavior of circuits with multiple input terminals. The technique allows determination of minimum and maximum delays. Additionally, it provides the precise circuit behavior as the relationship among the input signals changes with respect to the average of the input signal times to exhibit domination by the later arriving signal or regimes where the delay is affected by more than one input signal.

Abstract: A final stage clock buffer for use in a clock distribution network in a circuit with scan design includes a demultiplexer circuit and a control circuit. The buffer receives an input clock signal and outputs a clock signal and a scan clock signal. The buffer can operate in a functional mode, a scan mode and a hold mode. The demultiplexer circuit receives the input clock signal and a scan enable signal. The scan enable signal, when asserted, causes the buffer to enter the scan mode. In the scan mode, the demultiplexer circuit propagates the input clock signal to a scan clock terminal and a constant logic level to a clock terminal. When the scan enable signal is deasserted, the demultiplexer circuit propagates the input clock signal to the clock terminal and a constant logic level to the scan clock terminal. The control circuit receives a chip-enable signal. When the chip-enable signal is asserted while the scan signal is deasserted, the buffer enters the functional mode.

Abstract: A computer network having first and second network entities. The first network entity includes a packet object generator that generates a packet object including an executable source method, an executable destination method, and data associated with each of the methods. The first network entity also includes a communications interface to transmit the packet object. The second network entity includes a communications interface to receive the packet object and an incoming packet object handler to handle the received packet object. The incoming packet object handler includes a source and destination verifier to execute the source and destination methods with their associated data so as to verify the source and destination of the received object packet.

Abstract: Scrolling of page oriented or continuous information is initiated or controlled based on where a viewer's eyes are looking as detected by an eyetracker. Scrolling rate can be gradually changed based on how far down a screen of text a reader has read, so that a reader will not run out of text. Selection of objects to scroll is also accomplished using the eyetracker. Page and scroll objects can be defined on the display and activated by a user's gaze. A change of background color may be used to make a user aware that a page change is imminent.

Abstract: A system for authorizing card purchases includes a portable unit having a card reader for reading a card authorization code and a first wireless transceiver for transmitting the card authorization code to a base unit. The base unit has a second wireless transceiver. Responsive to receipt of the transmitted card authorization code, the base unit causes the second wireless transceiver to transmit a credit approval or denial.

Abstract: An active inductor oscillator includes a tank circuit for generating a first differential signal, a common-mode inverting differential buffer for generating a second differential signal in response to the first differential signal, and an integrating circuit for generating a third differential signal in response to the second differential signal. The third differential signal is applied to the tank circuit, and lags the first differential signal. A differential transistor pair in the tank circuit provides active inductance in response to the third differential signal, and a cross-coupled transistor pair in the tank circuit provides negative resistance that amplifies the first differential signal in response to the first differential signal. Currents through the tank circuit, buffer, and integrating circuit are essentially identical to one another and move in unison with an externally applied reference current that controls the oscillation frequency.

Abstract: An interprise computing manager in which an application is composed of a client (front end) program which communicates utilizing a network with a server (back end) program. The client and server programs are loosely coupled and exchange information using the network. The client program is composed of a User Interface (UI) and an object-oriented framework (Presentation Engine (PE) framework). The UI exchanges data messages with the framework. The framework is designed to handle two types of messages: (1) from the UI, and (2) from the server (back end) program via the network. The framework includes a component, the mediator which manages messages coming into and going out of the framework.

Abstract: A method and structure for routing electrically conductive interconnect paths through a printed circuit board. The printed circuit board includes a plurality of insulating layers and conductive layers, including at least one electrically conductive voltage supply layer for receiving a first supply voltage. A plurality of voltage supply pad patterns are located at the upper surface of the printed circuit board. Each voltage supply pad pattern includes two or more electrically conductive pads which are coupled by one or more electrically conductive traces. Electrically conductive via plugs extend through the printed circuit board to connect the voltage supply layer to the voltage supply pad patterns. Each via plug is connected to one corresponding voltage supply pad pattern, thereby allowing each via plug to provide the first supply voltage to a plurality of pads at the upper surface of the printed circuit board.

Abstract: A system and method for maintaining complex relationships between computer network elements. The system provides a common database for storing node, type, and view data. The views are created and maintained by the network management system. When a new node is added or parentage of a node is changed, the views of a node are modified in a network database.

Abstract: Heat sinks and methods particularly suited for use on packaged integrated circuits which are not amenable to the use of snap-on heat sinks and on which cemented-on heat sinks prevent conventional probing or reworking of the integrated circuit in the event trouble-shooting of the circuit is required after mounting of the heat sink. In accordance with the invention, a scalable post, based on heat sink size, mass and integrated circuit size, is cemented to the integrated circuit package in a configuration and location not interfering with the later probing or reworking of the integrated circuit, and without interfering with the printed circuit board layout. The post is then used to removably and independently hold a heat sink onto the integrated circuit so that good heat transfer between the integrated circuit and the heat sink is achieved, but still allowing the removal of the heat sink at any time if probing of the integrated circuit is later required. Alternate embodiments are disclosed.

Abstract: An electronic financial transaction clearing and settlement system handles and processes electronic financial transactions on behalf of a set of regional banks and correspondent banks. In particular, each bank participating in the system has a financial transaction server. The financial transaction server of each regional bank performs settlement and transaction forwarding services on behalf of the correspondent banks serviced by that regional bank. The financial transaction server for each correspondent bank transmits and receives electronic financial transactions to and from the financial transaction server for its regional bank.

Abstract: In an object oriented computer system, a root set of object references includes object references stored in the computer system's registers, as well as object references stored in activation records in the program stack. Whenever a method is invoked, a corresponding activation record is stored on the program stack. The activation record includes the invocation address for the method called as well as parameters passed to the called method. A class loader, which loads object classes into memory, determines the locations of the object references in the activation records associated with each method in a loaded object class. A list of offset values for each method activation record is stored by the class loader in a hash table data structure at a location in the hash table data structure determined by hashing the unique invocation address assigned to the method.

Abstract: A base test class is defined in an object-oriented computer program development environment and members of the base test class, i.e., test objects, represent individual test processes in a computer. The base test class defines a number of attributes and member functions which are inherited by test objects including a constructor member function which is performed when a test object is created. Creation of a test object performs substantially all that is required to implement interfaces and protocols (i) for interaction between the test object and simulation systems, (ii) for synchronization of processing of the test object with processing of other test objects and with simulation systems, and (iii) for reservation by the test object of devices of simulation systems. In addition, a base device class defines a number of attributes and member functions which are inherited by device objects. Device objects represent devices of simulation systems which interact with the test process.

Abstract: A method and apparatus that provides for the atomic transfer of data associated with a command to be transferred to a device consisting of a cache memory which supports a plurality of virtual devices. The atomic transfer enables the device to initiate and complete execution of the command immediately with respect to a particular virtual device without having to wait for data to come during subsequent bus transfers. This insures that the state of the device will be consistent during execution of the command.

Abstract: A number of methods and apparatus are disclosed for providing transparent persistence in a distributed object operating environment are disclosed. In general, the present invention teaches replacing the value in the object's data pointer (addressing information which points to the objects limited persistent memory) with a pointer value which points out to another persistent storage device. In preferred embodiments, a persistent storage manager (external and transparent to the distributed object) maintains the object data. In a specific embodiment, a distributed object framework is provided which has the mechanism for providing the transparent persistent strategy of the present invention. An object developer develops object implementations which the distributed object generates distributed objects with, in the process automatically providing transparent persistence.

Abstract: The present invention includes a method and apparatus for filtering IP packets based on events within a computer network. More specifically, the present invention includes a services management system, or SMS. The SMS manages network connections between a series of client systems and a router. An access network control server (ANCS) manages the configuration of the router. The SMS monitors activities or events that occur within the network. In response to these events, the SMS dynamically downloads filtering profiles to the ANCS. The ANCS then uses the downloaded filtering profiles to reconfigure the router. The router then uses the filtering rules to selectively discard or forward IP packets received from the client systems.

Abstract: A computer system defines a write transaction having a certain encoding as a prefetch command. A computer program developed for the computer system may include prefetch commands at points where the program has determined that a previously unreferenced coherency unit may be needed presently. By initiating the coherency activities for retrieving the coherency unit via a prefetch command, at least a portion of the latency inherent in that coherency activity may be experienced prior to executing an memory operation which accesses the coherency unit. In one embodiment, two prefetch commands are defined: a prefetch-shared command and a prefetch-modified command. The prefetch-shared command prefetches the coherency unit into the shared coherency state within the processing node which executes the prefetch command. On the other hand, the prefetch-modified command prefetches the coherency unit into the modified coherency state within the processing node which executes the prefetch command.