Patents Assigned to Technologies AG
  • Patent number: 7839918
    Abstract: In a method for estimating a frequency deviation between a received spread-spectrum code signal and a local frequency signal, the received spread-spectrum code signal is despread using a local spread-spectrum code. The despread signal is integrated over a particular integration period. From at least two successively obtained integration values, a phase change value characteristic of the phase change between the two integration values is calculated. From this, the frequency deviation is determined.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Andreas Schmid, André Neubauer
  • Patent number: 7838372
    Abstract: Methods of manufacturing semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming recesses in a first region and a second region of a workpiece. The first region of the workpiece is masked, and the recesses in the second region of the workpiece are filled with a first semiconductive material. The second region of the workpiece is masked, and the recesses in the first region of the workpiece are filled with a second semiconductive material.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: November 23, 2010
    Assignees: Infineon Technologies AG, Chartered Semiconductor Manufacturing, Ltd., International Business Machines Corporation, Samsung Electronics Co., Ltd.
    Inventors: Jin-Ping Han, Jong Ho Yang, Chung Woh Lai, Henry Utomo
  • Patent number: 7838948
    Abstract: In an embodiment, an apparatus includes a first field effect transistor including a first source contact region, a first drain contact region and a first plurality of fins overlying a substrate, a first gate overlying the first plurality of fins, the first source contact region coupled to first ends of the first plurality of fins, and a second field effect transistor including a second source contact region, a second drain contact region, and a second plurality of fins overlying the substrate, a second gate overlying the second plurality of fins, and an interconnection contact region overlying the substrate, electrically coupling the first drain contact region and the second source contact region and abutting the first and the second pluralities of fins.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventor: Harald Gossner
  • Patent number: 7838969
    Abstract: A diode is disclosed. One embodiment provides a semiconductor body having a front and a back, opposite the front in a vertical direction of the semiconductor body. The semiconductor body contains, successively in the vertical direction from the back to the front, a heavily n-doped zone, a weakly n-doped zone, a weakly p-doped zone and a heavily p-doped zone. In the vertical direction, the weakly p-doped zone has a thickness of at least 25% and at most 50% of the thickness of the semiconductor body.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Franz-Josef Niedernostheide, Reiner Barthelmess
  • Patent number: 7839919
    Abstract: A UPBO is performed based on an attenuation of a first VDSL-cable connecting a first VDSL-CPE and a first VDSL-CO, and also based on an attenuation or electrical length of cable pieces between said first VDSL-CO and a further distant second VDSL-CO. Further, an extended DPBO for the first VDSL-CO is described not only regarding ADSL-cables originating from an ADSL-CO but also VDSL-cables from the further distant second VDSL-CO.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Reinhard Stolle, Stefan Uhlemann
  • Patent number: 7839892
    Abstract: Each transport format contains control parameters according to which data are mapped from at least one logical channel onto at least one transport channel by a data link layer protocol unit, with the control parameters in the transport formats containing information regarding that or those data link layer protocol buffer storages and/or that or those data link layer data streams from which the data to be transmitted need to be transmitted in a data transmission time interval.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Michael Eckert, Hyung-Nam Choi, Martin Wuschke
  • Patent number: 7838939
    Abstract: According to one embodiment of the present invention, an ESD protection element for use in an electrical circuit is provided, including a plurality of diodes which are connected in series with one another and which are formed in a contiguous active area, wherein the ESD protection element has a fin structure.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Christian Russ, Harald Gossner, Michael Fulde
  • Patent number: 7838989
    Abstract: A semiconductor component for radio-frequency applications has at least one substrate and one chip, and with contact pads is disclosed. In one embodiment, bonding wires connect the contact pads on the chip to the contact connecting pads. Signals are passed via these contact pads such that signals at high frequencies are passed via one or more contact pads and signals at low frequencies are passed via one or more contact pads. The chip is shifted on the substrate from a central position with respect to the totality of the contact connecting pads, so that the bonding wires for those contact pads via which signals at a high frequency are passed are shorter than bonding wires for those contact pads via which signals at low frequencies are passed.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Jochen Dangelmaier, Mario Engl, Horst Theuss
  • Patent number: 7839185
    Abstract: A method and circuit arrangement including driving a field effect controlled transistor. One embodiment provides a first load terminal, a second load terminal and a control terminal. The control terminal is driven, at least during a Miller plateau phase of the transistor, with a pulse-width-modulated control signal whose period duration is shorter than the duration of the Miller plateau phase.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventor: Ulrich Michael Georg Schwarzer
  • Patent number: 7840365
    Abstract: An integrated circuit arrangement for current regulation of an electromagnetic load, especially an electric motor, generator, solenoid valve, or the like, with a coil, a power switch element, and a freewheeling diode is disclosed. In one embodiment, the circuit arrangement has an integrated measurement resistor for measuring the coil current. The measurement resistor is arranged in a freewheeling path of the circuit arrangement in series between the freewheeling diode and the power switch element, and has a digital processing means connected after a voltage measurement device assigned to the measurement resistor for at least partial compensation of resistor manufacturing variations and/or temperature fluctuations in the voltage signal and/or an error due to analog voltage signal processing.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Victor Kahr, Harald Panhofer, Manfred Steiner
  • Patent number: 7838940
    Abstract: A drain-extended field effect transistor includes a drain contact region and a drain extension region. The drain-extended field effect transistor further includes an electrostatic discharge protection region that is electrically connected between the drain contact region and the drain extension region to protect the drain-extended field effect transistor against electrostatic discharge. The electrostatic discharge protection region has a dopant concentration level such that in case of an electrostatic discharge event, a base push-out is prevented from reaching the drain contact region.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Jens Schneider, Harald Gossner
  • Patent number: 7839141
    Abstract: A method of biasing a magneto resistive sensor element includes providing at least one magneto resistive sensor element having a magnetic sensitivity along a first axis that is parallel to a plane of the at least one sensor element. A magnet is positioned adjacent to the at least one sensor element for biasing the at least one sensor element, wherein the magnet has a magnetization that is non-perpendicular to the plane of the at least one sensor element, and wherein the magnetization includes a component parallel to the plane of the at least one sensor element that increases a sensitive range of the at least one sensor element along the first axis.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Tobias Werth, Juergen Zimmer
  • Patent number: 7839208
    Abstract: An integrated circuit and a method for operating an integrated circuit is disclosed. One embodiment provides a semi-conductor component, an electronic system, and a method for operating an integrated circuit. A method for operating an integrated circuit provides applying a voltage to a line or a connection in accordance with data to be input. A current is applied to the line or the connection in accordance with data to be output.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Michael Hausmann, Axel Reithofer
  • Patent number: 7836764
    Abstract: The invention relates to a device comprising a sensor chip and a structure housing the sensor chip. The structure is covered by a mold compound and is fabricated from a ceramic or a glass material.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: November 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Horst Theuss, Albert Auburger, Terje Skog, Jean Schmitt
  • Publication number: 20100289135
    Abstract: A semiconductor chip package is disclosed. One embodiment provides at least one semiconductor chip including contact elements on a first surface of the chip. An encapsulation layer covers the semiconductor chip. A metallization layer is applied above the first surface of the chip and the encapsulation layer. The metallization layer includes contact areas connected with the contact elements of the chip. External pins are connected with the contact areas.
    Type: Application
    Filed: May 15, 2009
    Publication date: November 18, 2010
    Applicant: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer
  • Publication number: 20100289095
    Abstract: The semiconductor device comprises a semiconductor chip defining a first face and a second face opposite to the first face, the semiconductor chip comprising at least one contact element on the first face of the semiconductor chip, an encapsulating body encapsulating the semiconductor chip, the encapsulating body having a first face and a second face opposite to the first face, a redistribution layer extending over the semiconductor chip and the first face of the encapsulating body and containing a metallization layer comprising contact areas connected with the contact elements of the semiconductor chip, and an array of external contact elements located on the second phase of the encapsulating body.
    Type: Application
    Filed: May 15, 2009
    Publication date: November 18, 2010
    Applicant: Infineon Technologies AG
    Inventors: Gerhard Josef Poeppel, Irmgard Escher-Poeppel
  • Publication number: 20100289485
    Abstract: A system including a first concentrator, a second concentrator, and a magnet. The first concentrator has a first partial hub. The second concentrator has a second partial hub aligned with the first partial hub to form a bore. The magnet is situated in the bore and the first concentrator and the second concentrator guide magnetic flux from the magnet to sense movement of the magnet relative to the first concentrator and the second concentrator.
    Type: Application
    Filed: May 15, 2009
    Publication date: November 18, 2010
    Applicant: Infineon Technologies AG
    Inventor: Christoph Eggimann
  • Patent number: 7835457
    Abstract: A method and an arrangement for processing a received signal which comprises phase-shift modulated or amplitude-quadrature modulated part-signals which are transmitted in a plurality of different frequency bands, wherein the received signal is processed in a plurality of stages in succession, by multiplying all the input signals to each of the stages by two mutually orthogonal signals in each case to form two intermediate signals in each case, wherein the intermediate signals from one stage in each case act as the input signals to whichever is the succeeding stage in the particular case and the received signal acts as the input signal to the first stage, and wherein an in-phase and/or an quadrature component of the individual part-signals in the different frequency bands are determined from the intermediate signals from the last stage. Parallel, simultaneous reception of a plurality of frequency bands can be implemented relatively easily in this way.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: November 16, 2010
    Assignee: Infineon Technologies AG
    Inventors: Martin Friedrich, Christian Grewing, Giuseppe Li Puma, Christoph Sandner, Andreas Wiesbauer, Kay Winterberg, Stefan Van Waasen
  • Patent number: 7832018
    Abstract: A camouflage suit for reducing the discoverability of persons in the visible and infrared spectrum, as for example the thermal infrared spectrum, exhibits a breath-active fabric exhibiting an open fabric structure based on a textile backing. The backing here exhibits a low-emitting surface. This can be achieved by at least partly sheathing or coating the textile backing with an electrically conductive material.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: November 16, 2010
    Assignee: SSZ Camouflage Technology AG
    Inventor: René Schwarz
  • Patent number: 7833886
    Abstract: A method of producing a semiconductor element in a substrate includes forming a plurality of micro-cavities in a substrate, creating an amorphization of the substrate to form crystallographic defects and a doping of the substrate with doping atoms, depositing an amorphous layer on top of the substrate, and annealing the substrate, such that at least a part of the crystallographic defects is eliminated using the micro-cavities. The semiconductor element is formed using the doping atoms.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: November 16, 2010
    Assignees: Infineon Technologies AG, Qimonda AG
    Inventors: Luis-Felipe Giles, Matthias Goldbach, Martin Bartels, Paul Kuepper