Patents Assigned to Technologies AG
  • Wafer level packaged MEMS integrated circuit
    Patent number: 7851925
    Abstract: A wafer-level packaged integrated circuit includes a semiconductor substrate including a first silicon layer. A micro-electromechanical system (MEMS) device is integrated into the first silicon layer. A thin-film deposited sealing member is deposited over the first silicon layer and is configured to seal a cavity in the first silicon layer. At least one additional layer is formed over the sealing member. At least one under bump metallization (UBM) is formed over the at least one additional layer.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Horst Theuss, Markus Loehndorf, Florian Schoen
  • Semiconductor chip module
    Patent number: 7851829
    Abstract: One aspect includes a sensor chip module including a sensor chip and a module housing accommodating the sensor chip. The module housing defines a mounting plane of the sensor chip module. In one case, an active surface of the sensor chip is inclined with respect to the mounting plane of the sensor chip module.
    Type: Grant
    Filed: February 19, 2007
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventor: Horst Theuss
  • Semiconductor device
    Patent number: 7851908
    Abstract: A semiconductor device is disclosed. One embodiment provides a module including a first carrier having a first mounting surface and a second mounting surface, a first semiconductor chip mounted onto the first mounting surface of the first carrier and having a first surface facing away from the first carrier, a first connection element connected to the first surface of the first semiconductor chip, a second semiconductor chip having a first surface facing away from the first carrier, a second connection element connected to the first surface of the second semiconductor chip, and a mold material covering the first connection element and the second connection element only partially.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Ralf Otremba, Xaver Schloegel, Josef Hoeglauer, Erwin Huber
  • Method for producing breaker pole parts for low-voltage, medium-voltage and high-voltage switchgear assemblies, and breaker pole part itself
    Patent number: 7852180
    Abstract: The disclosure relates to a method for producing circuit-breaker parts and plastic components for low, medium and high-voltage switching stations and to a corresponding circuit-breaker part. To obtain a simpler method of production with a higher variance of material characteristics, the outer insulation sleeve is produced in a plastic injection molding method, in which a vacuum interrupter chamber is sheathed in plastic.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: December 14, 2010
    Assignee: ABB Technology AG
    Inventors: Dietmar Gentsch, Oliver Claus
  • Processing systems and methods for semiconductor devices
    Patent number: 7851373
    Abstract: Systems and methods for processing semiconductor devices are disclosed. A preferred embodiment comprises a processing method that includes providing a processing system including a first container and a second container fluidly coupled to the first container, the second container being adapted to receive and retain an overflow amount of a fluid from the first container, and disposing the fluid in the first container and a portion of the second container. The method includes providing at least one semiconductor device, disposing the at least one semiconductor device in the first container, and maintaining the fluid in the second container substantially to a first level while processing the at least one semiconductor device with the fluid.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventor: Lothar Doni
  • Signal processing circuit and method for processing an HF input signal
    Patent number: 7853419
    Abstract: A signal processing circuit and a method for processing an HF input signal are described, having an HF receiver for generating an IF signal on an intermediate frequency from an HF input signal, a frequency divider for generating a signal from the IF signal or a signal derived from the IF signal, with a frequency reduced compared with the intermediate frequency, and a sampling unit for sampling the signal with the reduced frequency by using a sampling frequency, wherein the sampling frequency is smaller than the double intermediate frequency, and wherein the frequency divider divides the intermediate frequency such that the reduced frequency and the sampling frequency are spaced such that the sampling theorem is fulfilled at least for the first odd-numbered harmonic of the signal with the reduced frequency.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventor: Volker Schultheiss
  • Memory device having cross-shaped semiconductor fin structure
    Patent number: 7851844
    Abstract: In an embodiment, a memory device, including: a semiconductor fin structure, each end portion of the fin structure including a source/drain region; a charge storage layer covering at least a portion of the fin structure; and a gate layer covering at least a portion of the charge storage layer.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Koen van der Zanden, Thomas Schulz
  • Multi-mode modulator
    Patent number: 7853212
    Abstract: A multi-mode modulator includes a first data path to process in-phase signals in a quadrature modulation mode, a second data path to process quadrature signals during the quadrature modulation mode, and a first multiplexer to selectively switch polar amplitude data onto one of the first and second data paths in response to a selection signal.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventor: Stefan van Waasen
  • Transmitter arrangement
    Patent number: 7853290
    Abstract: A transmitter arrangement includes a first amplifier arrangement and a second amplifier arrangement. The first amplifier arrangement includes a first amplification path and a second amplification path. The first amplification path is adapted to amplify signals comprising a data content according to a first communication standard. The second amplification path is adapted to amplify signals comprising a data content according to a second communication standard. The second amplifier arrangement further includes a first and second amplification path sharing at least one common amplifier stage that is adapted to amplify signals having a data content according at least to the second communication standard.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Grigory Itkin, Andrei Grebennikov
  • Precompensation of crosstalk interference based on feedback error signal
    Patent number: 7852742
    Abstract: A device has a plurality of output terminals to provide a plurality of signals to a plurality of transmission links; at least one input terminal to receive information representing a projection of a complex valued error signal onto one direction; and a determination circuit, coupled to the at least one input terminal.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventor: Heinrich Schenk
  • Apparatus comprising a device and method for producing it
    Patent number: 7851333
    Abstract: An apparatus comprises a device layer structure, a device integrated into the device layer structure, an insulating carrier substrate and an insulating layer being continuously positioned between the device layer structure and the insulating carrier substrate, the insulating layer having a thickness which is less than 1/10 of a thickness of the insulating carrier substrate. An apparatus further comprises a device integrated into a device layer structure disposed on an insulating layer, a housing layer disposed on the device layer structure and housing the device, a contact providing an electrical connection between the device and a surface of the housing layer opposed to the device layer structure and a molding material surrounding the housing layer and the insulating layer, the molding material directly abutting on a surface of the insulating layer being opposed to the device layer structure.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Klaus-Guenter Oppermann, Martin Franosch, Martin Handtmann
  • Capacitors and methods of manufacture thereof
    Patent number: 7851302
    Abstract: Capacitors are formed in metallization layers of semiconductor device in regions where functional conductive features are not formed, more efficiently using real estate of integrated circuits. The capacitors may be stacked and connected in parallel to provide increased capacitance, or arranged in arrays. The plates of the capacitors are substantially the same dimensions as conductive features, such as conductive lines or vias, or are substantially the same dimensions as fill structures of the semiconductor device.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventor: Matthias Hierlemann
  • MEMS devices and methods of manufacture thereof
    Patent number: 7851875
    Abstract: Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a first semiconductive material and at least one trench disposed in the first semiconductive material, the at least one trench having a sidewall. An insulating material layer is disposed over an upper portion of the sidewall of the at least one trench in the first semiconductive material and over a portion of a top surface of the first semiconductive material proximate the sidewall. A second semiconductive material or a conductive material is disposed within the at least one trench and at least over the insulating material layer disposed over the portion of the top surface of the first semiconductive material proximate the sidewall.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Florian Schoen, Wolfgang Raberg, Bernhard Winkler, Werner Weber
  • Semiconductor component comprising a semiconductor chip and semiconductor component carrier with external connection strips
    Patent number: 7851927
    Abstract: A semiconductor component (1) has a semiconductor chip (5) and a semiconductor component carrier (3) with external connection strips (12, 13, 15). The semiconductor chip (5) has a first electrode (6) and a control electrode (7) on its top side (8) and a second electrode (9) on its rear side (10). The semiconductor chip (5) is fixed by its top side (8) in flip-chip arrangement (11) on a first and a second external connection strip (12, 13) for the first electrode (6) and the control electrode (7). The second electrode (9) is electrically connected to at least one third external connection strip (15) via a bonding tape (14).
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Khalil Hosseini, Alexander Koenigsberger, Ralf Otremba, Klaus Schiess
  • Power semiconductor module method
    Patent number: 7851267
    Abstract: A method for assembling a power module includes providing a casing with a plurality of receiving elements. At least one substrate carrying at least one semiconductor chip is provided within the casing. At least one support element is provided. An elastically stressed cover is arranged over the at least one support element, and the cover is released so that the elastically stressed cover is restrained by the at least one support element and the plurality of receiving elements.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Benedikt Specht, Gottfried Ferber
  • Method for reducing an unevenness of a surface and method for making a semiconductor device
    Patent number: 7851362
    Abstract: In order to reduce an unevenness of a surface of a body, a sacrificial layer is applied to the surface, a chemical-mechanical polishing of the sacrificial layer and material of said body is performed to reduce the unevenness of the surface, and a remainder of the sacrificial layer, if any, may be removed.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventors: Joern Plagmann, Holger Poehle
  • Phase Margin Modification In Operational Transconductance Amplifiers
    Publication number: 20100308915
    Abstract: The present disclosure relates to phase margin modification in operational transconductance amplifiers.
    Type: Application
    Filed: June 9, 2009
    Publication date: December 9, 2010
    Applicant: Infineon Technologies AG
    Inventor: Jose Luis Ceballos
  • Impedance Transformation With Transistor Circuits
    Publication number: 20100308906
    Abstract: The present disclosure relates to impedance transformation with transistor circuits.
    Type: Application
    Filed: June 3, 2009
    Publication date: December 9, 2010
    Applicant: Infineon Technologies AG
    Inventor: Dieter Draxelmayr
  • CONTROL OF OPERATION OF PROTECTION RELAY
    Publication number: 20100309596
    Abstract: A method of controlling a protection relay, includes inputting an input characteristic quantity and determining a triggering condition for the protection relay using a calculation equation, the value of which increases when the input characteristic quantity exceeds a first threshold value, and decreases when the input characteristic quantity undershoots a second threshold value for an over-function measure, and the value of the calculation equation increases when the input characteristic quantity undershoots a first threshold value, and decreases when the input characteristic quantity exceeds a second threshold value for an under function measure, wherein the calculation equation includes a first measure and a second measure, and the triggering occurs when the first measure is greater than the second measure.
    Type: Application
    Filed: June 21, 2010
    Publication date: December 9, 2010
    Applicant: ABB Technology AG
    Inventors: Juha YLINEN, Kari Vanhala
  • Integrated Circuit Arrangement
    Publication number: 20100312518
    Abstract: An integrated circuit arrangement has a signal input 20 and a signal output 60, a signal processing unit 100 which is connected to the signal input 20 and to the signal output 60, a noise source 50 for generating a noise signal, and a noise line 55 which connects the noise source 50 to the signal input 20.
    Type: Application
    Filed: July 30, 2010
    Publication date: December 9, 2010
    Applicant: Infineon Technologies AG
    Inventor: Johann Peter Forstner