Abstract: One aspect provides a method of manufacturing a semiconductor device having reduced N/P or P/N junction crystal disorder. In one aspect, this improvement is achieved by forming gate electrodes over a semiconductor substrate, amorphizing the semiconductor substrate that creates amorphous regions adjacent the gate electrodes to a depth in the semiconductor substrate. Source/drains are formed adjacent the gate electrodes by placing conductive dopants in the semiconductor substrate, wherein displaced substrate atoms and the conductive dopants are contained within the depth of the amorphous regions. The semiconductor substrate is annealed to re-crystallize the amorphous regions subsequent to forming the source/drains.

Abstract: A semiconductor device is provided comprising a main electrode (4) and a dielectric (3) in contact with the main electrode (4), the main electrode (4) comprising a material having a work function and a work function modulating element (6) for modulating the work function of the material of the main electrode (4) towards a predetermined value. The main electrode (4) furthermore comprises a diffusion preventing dopant element (5) for preventing diffusion of the work function modulating element (6) towards and/or into the dielectric (3). Methods for forming such a semiconductor device are also described.

Abstract: A system comprising a target hardware comprising multiple processor cores and an application. The system also comprises a host computer coupled to the target hardware by way of a connection and adapted to debug the application by receiving trace information via the connection. In determining which trace information to send via the connection, the target hardware gives priority to trace information generated by a primary processor core associated with a token over trace information generated by a secondary processor core not associated with the token. The token is associated with one of the multiple processor cores at a time.

Abstract: A method and system of accessing display window memory. At least some of the illustrative embodiments are methods comprising abstracting display window memory by way of a first software object, accessing the display window memory by routines of a graphics library executed on a first processor (the accessing by way of the first software object), and displaying a window on a display screen, contents of the window selected at least in part by the routines of the graphics library.

Abstract: A method for selective deposition of self-assembled monolayers to the surface of a substrate for use as a diffusion barrier layer in interconnect structures is provided comprising the steps of depositing a first self-assembled monolayer to said surface, depositing a second self-assembled monolayer to the non-covered parts of said surface and subsequently heating said substrate to remove the first self-assembled monolayer. The method of selective deposition of self-assembled monolayers is applied for the use as diffusion barrier layers in a (dual) damascene structure for integrated circuits.

Abstract: A semiconductor device is disclosed that comprises a fully silicided electrode formed of an alloy of a semiconductor material and a metal, a workfunction modulating element for modulating a workfunction of the alloy, and a dielectric in contact with the fully silicided electrode. At least a part of the dielectric which is in direct contact with the fully silicided electrode comprises a stopping material for substantially preventing the workfunction modulating element from implantation into and/or diffusing towards the dielectric. A method for forming such a semiconductor device is also disclosed.

Abstract: A method for selective deposition of self-assembled monolayers to the surface of a substrate for use as a diffusion barrier layer in interconnect structures is provided comprising the steps of depositing a first self-assembled monolayer to said surface, depositing a second self-assembled monolayer to the non-covered parts of said surface and subsequently heating said substrate to remove the first self-assembled monolayer. The method of selective deposition of self-assembled monolayers is applied for the use as diffusion barrier layers in a (dual) damascene structure for integrated circuits.

Abstract: A system is provided that includes a processor and a network interface coupled to the processor. The system also includes a system memory coupled to the processor. The system memory stores watermarking instructions that, when executed, cause the processor to mark digital media with information that identifies the system.

Abstract: A radio frequency identification (RFID) tag comprises a transceiver and a component coupled to the transceiver. The transceiver is adapted to wirelessly receive power from an RFID reader and/or from a mobile communication device. The power received from the mobile communication device is used to power the component, providing an alternative power source (cellular beacons) that uses no additional handset power.

Abstract: The present disclosure provides a receiver, a transmitter and methods of operating a receiver and a transmitter. In one embodiment, the receiver includes a receive portion employing transmission signals from a transmitter, having multiple transmit antennas, that is capable of transmitting at least one spatial codeword and adapting a transmission rank. The receiver also includes a feedback generator portion configured to provide a channel quality indicator that is feedback to the transmitter, wherein the channel quality indicator corresponds to at least one transmission rank.

Abstract: A dual mode decoder operable with external memory. At least some of the illustrative embodiments are integrated circuit products comprising a processor portion, a memory portion coupled to the processor portion, and a hardware demodulation portion coupled to the processor portion. The processor portion and hardware demodulation portion work together to demodulate a first digital transmission signal created utilizing a first modulation system, and the processor portion and hardware demodulation portion work together to decode a second digital transmission signal created using a second modulation system different than the first modulation system (the second digital signal having at least one time interleaved segment). The integrated circuit product couples to an external memory for purposes of time de-interleaving when an amount of memory of the memory portion is insufficient for time de-interleaving for a number of segments of the second digital transmission signal.

Abstract: A mobile device comprises host logic and a first transceiver coupled to the host logic. The first transceiver is adapted to wirelessly communicate with a second transceiver. The second transceiver is positioned at a fixed location and comprises location information indicative of such fixed location and map information. The first transceiver transmits wireless beacon signals. When the second transceiver is within range of the first transceiver, the beacon signal automatically causes the second transceiver to transmit the location and map information to the first transceiver.

Abstract: A system comprising a first communication device and a second communication device which transmits a text-based message to the first communication device. The message comprises an internet protocol (IP) address associated with the second communication device. If VoIP telephony is possible between the first and second communication devices, the first communication device automatically extracts the IP address from the message and uses the IP address to automatically establish a voice over Internet protocol (VoIP) call with the second communication device.

Abstract: A mobile device comprises a location-determining subsystem and a location assistance subsystem operatively coupled to the location-determining subsystem. The second location assistance subsystem wirelessly communicates with a second transceiver that is external to said mobile device to receive location information of the second transceiver. The location information is used by the first location-determining subsystem.

Abstract: A mobile device comprises host logic and a first transceiver coupled to the host logic. The first transceiver is adapted to wirelessly communicate with a second transceiver. The second transceiver is positioned at a fixed location and comprises location information indicative of such fixed location. The first transceiver transmits wireless beacon signals. When the second transceiver is within range of the first transceiver, the beacon signal automatically causes the second transceiver to transmit the location information to the first transceiver.

Abstract: Various systems and methods for equation graphing are disclosed herein. For example, some embodiments of the present invention provide methods for graphing equations in a substantially real time environment. Such methods include receiving a first equation and a second equation, and parsing the equations such that they are each formatted in a common format. In addition, the first parsed equation is reduced to one or more first equation shapes that provide a graphical representation of the first equation. A determination is made abut whether a real time control has been satisfied. Where the real time control has been satisfied, the first equation shapes are painted to a display prior to reduction of the second parsed equation to one or more second equation shapes.

Abstract: The invention provides a method of fabricating a semiconductor device. In one aspect, the method comprises forming a stress inducing layer over a semiconductor substrate, subjecting the stress inducing layer to a first temperature anneal, and subjecting the semiconductor substrate to a second temperature anneal subsequent to the first temperature anneal, wherein the second temperature anneal is higher than the first temperature anneal.

Abstract: The present disclosure describes systems and methods for driving light emitting diodes (LEDs). At least some embodiments include an LED driver system that includes a power supply, a plurality of current sources (each current source coupled between a common return resistor and one of a plurality of branches of series coupled LEDs, and each branch coupled between a corresponding current source and the power supply), and control logic coupled to the current sources (the control logic capable of controlling the current flow through each current source). Each of the current sources allows current to flow during one of a plurality of substantially non-overlapping time periods within a repeating time interval, each current source allowing current to flow during a different time period. The magnitude of the current flowing through each current source is substantially the same and is regulated based upon a feedback voltage across the common return resistor.

Abstract: A system for, and method of, developing high accuracy acoustic models and a digital signal processor incorporating the same. In one embodiment, the system includes: (1) an acoustic model initializer configured to generate initial acoustic models by seeding with seed monophones, (2) a monophone retrainer associated with the acoustic model initializer and configured to retrain the monophones using a target database, (3) a triphone generator associated with the monophone retrainer and configured to generate seed triphones from the monophones using aligned training data, (4) a triphone retrainer associated with the triphone generator and configured to retrain the triphones using the target database and (5) a triphone clusterer associated with the triphone retrainer and configured to cluster the triphones using a state-tying technique, the triphone retrainer configured to retrain the triphones again using the target database.

Abstract: The invention provides, in one aspect, a method of fabricating a semiconductor device. This embodiment comprises depositing a gate layer over a gate dielectric layer located over a semiconductor substrate, and incorporating fluorine into the gate dielectric layer before doping the gate layer.