Abstract: A noninverting amplifier circuit for one propagation delay complex logic gates. The noninverting amplifier circuit is compatible with field effect transistor logic, including depletion-mode Schottky barrier field effect transistor (MESFET) inverting logic, gates. The basic noninverting amplifier circuit, utilizes field effect transistors (FET) and diodes, and comprises input interface means for receiving an input voltage signal, amplifier means for providing noninverted amplification of the input voltage signal, and buffer means for driving, and shifting the voltage level of the amplified input voltage signal. In another embodiment, additional circuit means for enabling performance of the "AND" logic function is included in the basic noninverting amplifier circuit. In a third embodiment, additional circuit means for enabling performance of the "OR" logic function is included in the basic noninverting amplifier circuit.

Abstract: A read-only memory includes several branches of transistors which are connected to address decode circuitry together with transistors to address each of the branches where these addressing transistors are also connected to address decode circuits. Each of the addressed branches are capable of conditionally discharging a precharged node dependent upon the stored data in the transistor branches.

Abstract: A method of forming a semiconductor device having a single crystal silicon substrate, the surface of which includes exposed silicon areas bounded by and coplanar with insulating oxide regions. A polysilicon layer is deposited thereon and annealed to form a single crystal epitaxial region overlying the exposed substrate areas while the regions overlying the oxide areas in the substrate surface may be of polycrystalline form. This structure is applied to NMOS, CMOS, MESFET, and I.sup.2 L devices to achieve high packing density, high speed, improved isolation between devices and reduced susceptibility to latch-up.

Abstract: An electronic telephone answering apparatus which receives a connection from a remote telephone and reacts according to signals from the remote telephone. In one embodiment of the invention, the answering apparatus suppresses the connection between the remote telephone and the local telephone receiver until a predetermined condition is met by the remote telephone. This predetermined condition may include staying on the line a predetermined amount of time after a message has been communicated to the remote telephone, or communicating a selected key word for connection to the local telephone, such as "emergency". This embodiment allows for the selective connection of emergency or high priority calls when the operator of the local telephone does not wish to be interrupted except for these high priority calls. In another embodiment of the invention, an incoming message is speech recognized and stored in a memory.

Abstract: A starting circuit for single phase electric motors including both split-phase and capacitor start motors includes a gate controlled solid state switch serially connected to the start winding of the motor. Rectified reference pulses from a pulse transformer are generated to turn on a first transistor to provide gating current for the solid state switch. Initially, when the motor is energized at zero rpm, the pulses are received at the switch after the start winding current passes through the zero current level to gate the switch to conduct each half cycle and energize the start winding however as the motor speeds up, the pulses are received earlier and earlier relative to the start winding current zero cross over until at a selected speed the pulses are received at the switch prior to the start winding current zero cross over with the result that the switch is no longer gated conductive. When this occurs the voltage across the switch goes high.

Abstract: A very simple oscillator circuit, using a FET pair with RF coupled, DC isolated gates, selectively operates at two widely separated microwave frequencies. The two FETs are DC isolated so that one of them can be pinched off (to act as a passive element) while the other remains active. Thus, for example, a two-FET push-push oscillator operating at 20 GHz can switch downband, when one FET is pinched off, to act as a fundamental mode oscillator at 121/2 GHz. The circuit is integrable. In alternative embodiments, more than two FETs are used, for switching over a wider frequency range when one or two of them is pinched off.

Abstract: A read-only memory includes an array of rows and columns of memory cells with row lines and column lines associated with the array. The row lines are partitioned into groups that provide bits of a word on a number of output lines. Each group consists of an output line and a first voltage line with a plurality of row lines in between. A row selector is provided that receives an address signal for selecting a particular row in each group and connects a row line on one side of the selected row to the first voltage line and connects the row line on the other side of the row to the output line. A row precharge circuit is provided for precharging the row lines prior to the connection of a row line to an output line. Also provided is a column select circuit for receiving an address signal for connecting a particular column line to a second voltage line and for connecting one or more of the remaining column lines to one of the first voltage lines in order to reduce coupling.

Abstract: A global position system (GPS) capable of multiple (two or more space vehicles) space vehicle (SV) multiplexing comprises an RF energy receiver for receiving high and low frequencies (L.sub.1 and L.sub.2) from a plurality of SVs on different codes, a switching means for alternately switching the RF receiver between the coded L.sub.1, L.sub.2 signals for detection, a digital processing means, replica coded L.sub.1, L.sub.2 signal producing hardware, and a coherent time and frequency synthesis means, said digital processing means connected to the RF receiver, coherent time and frequency synthesis means, and replica coded L.sub.1, L.sub.2 signal producing hardware for producing for the RF receiver replica coded L.sub.1, L.sub.

Abstract: A variable function calculator utilizes a fixed program memory array such as a programmed read only memory in which a number of programs are stored depending upon the desired functions of the calculator. The calculator also includes a program counter, an instruction register, control decoders, jump-condition circuits, a clock generator, a timing generator, decoders, key input logic, a data storage array, an arithmetic logic unit, an output decoder, and a digit scanner which scans both the keyboard and display outputs. Aside from providing basic desk top calculator functions, the read only memory may be programmed so that the system provides metering functions, arithmetic teaching functions, control functions, etc. A preferred embodiment of the invention is capable of being fabricated as a monolithic integrated semiconductor system utilizing contemporary metal-insulator-semiconductor techniques.

Abstract: Two levels of liquid crystal material and upper, center and lower transparent members are sandwiched to form a stacked display. Segment electrodes, which are disposed on opposite sides of the center transparent member, are controllable to selectively display information in one of the two levels while the other level is caused to remain transparent.

Abstract: A remotely controlled circuit control device has first and second load contact assemblies movable into circuit engagement and circuit disengagement positions relative to one another in which one load contact assembly is operatively connected to a solenoid so that alternate forward strokes of the solenoid moves the one load contact assembly between reset and tripped positions through a push-push mechanism having an indexing portion and a latching portion. An overload mechanism cooperates with the latch portion to cause the load contact assemblies to move to the circuit disengaged position upon occurrence of a fault condition. The second load contact assembly includes pivotably mounted contact members which are linked to the first load contact assembly in such a way that circuit engagement during solenoid energization is precluded.

Abstract: A video signal generation apparatus improves the resolution of the video signal by forming additional video scan lines between the successive scan lines by combining the video attributes of adjacent scan lines. This invention is particularly applicable to video display terminals and small computing systems which employ digital memories for storing graphic characters for display via a raster scan video display device. The graphics resolution may be improved in two dimensions by combining the techniques of averaging or smoothing a graphic character generated scan line by averaging or integrating a video attribute of the scan line over a period approximating the period of a individual picture element, together with forming new scan lines by combining the video attributes of adjacent graphic character generated scan lines.

Abstract: A data processing system has two independent read only memories. Each read only memory (ROM) has an individual associated program counter. Table lookup is accomplished by having an instruction signal pattern output from one ROM conditionally advance the program counter of the other ROM. Upon completion of the output from the first ROM, control is transferred to the second ROM, with the second ROM's program counter containing a predetermined value equivalent to the table lookup value desired, or to a branch word pointing to a value or routine in the second ROM. In the preferred embodiment, the execution of a particular data signal pattern (CALL) in a fast read only memory (said first ROM) causes the program counter for the second ROM (main program counter) to advance one step forward in the program count sequence.

Abstract: A static-type noninverting memory cell for one propagation delay memory circuits which is compatible with inverting and noninverting field effect transistor logic, such as, for example, depletion mode Schottky barrier field effect transistor (MESFET) inverting logic. The basic memory cell utilizes field effect transistors and a diode, and comprises an input for receiving an input signal, a transistor operating in a switching mode and connected to the input for registering the logic state of the input signal, a memory section which includes a pair of transistors each of whose respective gates are connected to the sources, a diode interposed therebetween, and a logic state-holding transistor for retaining a stored logic state of the registered input signal, and an output terminal connected between the diode and one of the transistor pair of the memory section from which the stored logic state within the memory section may be sensed.

Abstract: To increase the perimeter seal strength of plastic LCDs, reinforcement holes are formed in the plastic substrate at the maximum stress points. These holes, which are not in contact with any active area of the device, are filled with glue, so that each pair of holes in the upper and lower substrates forms a tensile connection which directly links the two substrates together at the maximum stress points.

Abstract: An improved MESFET integrated circuit device with a metal-semiconductor diode as the control element and a source and drain as other device elements is fabricated using a self-aligned gate process which consists of an implanted channel stopper underneath a thick field oxide, depletion and enhancement mode device channel implants, implanted source and drain regions, selective oxidation to form self-aligned gates, metal-semiconductor junctions as control elements, barrier metal and a thin film metallization system. The process and device structure are suited for high packing density, very low speed power product and ease of fabrication making it attractive for digital applications.

Abstract: The dielectric, which is provided on either side of the active phosphor in an AC-driven electroluminescent display, is formed of a composite material which has both high dielectric constant and high resistivity. Preferably, a composite of titanum dioxide and alumina is used.

Abstract: A calibration system for a programmable manipulator having a base and a plurality of segments movable with respect to each other includes a fixture for attachment to the base of the manipulator and a hand-held application module for directing the operation of the programmable manipulator, including a calibration mode operation for initiating calibration of the programmable manipulator. The fixture has an end point to which the end effector of the programmable manipulator attaches. The end point is exactly positioned and oriented with respect to the base thereby establishing a known position and orientation of the end effector. The link lengths (distances between centers of rotation) of the programmable manipulator segments are entered and a computation is made of the displacement between each pair of the plurality of segments and compared with a measured displacement. The difference is an offset which is stored for future correction.

Abstract: An integrated circuit FSK transmitter and receiver combination form a modem for receiving and transmitting FSK signals. The FSK transmitter has a square wave generator for providing a clock output at a "mark" frequency or at a "space" frequency within a first frequency band. This clock output is shaped through a band pass filter, shared with the FSK receiver, to provide an FSK output signal which is output through a low pass filter. The input FSK signal is received through a low pass filter and then filtered through the band pass filter. One section of the band pass filter accommodates the clock output while another section accommodates the FSK input. The band pass filter is connected to a demodulating means to provide a filtered sine wave thereto at either a mark or a space frequency within a second frequency band. The demodulating means determines whether the sine wave is at a mark or a space frequency.

Abstract: The dislocation density near the surface of Hg.sub.1-x Cd.sub.x Te alloys is substantially reduced by annealing the material at around 600.degree. C. in a mercury saturated ambient for periods of four hours or more, prior to post annealing at lower temperatures to control the metal vacancy concentration. This procedure allows dislocation reduction by climb, reduces the concentration of metal vacancies which can collapse to form dislocation loops or contribute to dislocation multiplication, and reduces tellurium precipitates which contribute to dislocation multiplication during subsequent post annealing.