Abstract: A variable function calculator utilizes a fixed program memory array such as a programmed read only memory in which a number of programs are stored depending upon the desired functions of the calculator. The calculator also includes a program counter, an instruction register, control decoders, jump-condition circuits, a clock generator, a timing generator, decoders, key input logic, a data storage array, an arithmetic logic unit, an output decoder, and a digit scanner which scans both the keyboard and display outputs. Aside from providing basic desk top calculator functions, the read only memory may be programmed so that the system provides metering functions, arithmetic teaching functions, control functions, etc.. A preferred embodiment of the invention is capable of being fabricated as a monolithic integrated semiconductor system utilizing contemporary metal-insulator-semiconductor techniques.

Abstract: A digital data sense amplifier is disclosed for detecting small signal outputs from a storage media or from input sensors and comprises a differential amplifier whose outputs are coupled via two capacitors to an offset circuit which generates two offsets which in turn are fed to two comparators, one for a positive signal threshold and one for a negative signal threshold. This results in peak to peak data sensing in a noisy signal environment. An alternative embodiment differentiates an inputted analog signal and outputs a digital representation of the first derivative, or rate of change of said analog signal.

Abstract: A variable function system utilizes a fixed program memory array such as a programmed read only memory in which a number of programs are stored depending upon the desired functions of the system. The system also includes a program counter, an instruction register, control decoders, jump-condition circuits, a clock generator, a timing generator, key input logic, data storage array, an arithmetic logic unit, an output decoder, and a digit scanner which scans both the keyboard and display outputs. The read only memory may be programmed so that the system provides a variety of functions. A preferred embodiment of the invention is capable of being fabricated as a monolithic integrated semiconductor system utilizing contemporary metal-insulator semiconductor techniques.

Abstract: An integrated circuit demodulator receives an alternating signal at a first frequency and an alternating signal at a second frequency and provides a binary output corresponding to the first and second frequencies. An input signal is received by a first and a second frequency filter. If the input signal is the first frequency, then it is attenuated in the second frequency filter and vice versa. A positive full wave rectifier receives the first frequency signal and provides a positive full wave rectification thereof. A negative full wave rectifier receives the second frequency signal and provides a negative full wave rectification thereof. The rectifications are summed in an operational amplifier, thereby providing a difference so that the positive rectification is reduced by the attenuated negative rectification and the negative rectification is reduced by the attenuated positive rectification. A binary output is thereby provided.

Abstract: A relatively low cost, high performance pressure responsive switch device comprises a base, switch means mounted on the base, and a discrete pressure-responsive unit which is separately testable for predetermining its pressure response characteristics and which is then mounted on the base for moving the switch means between selected switch positions in response to the application of a selected fluid pressure. The discrete pressure-responsive unit is particularly adapted for achieving long unit cycle life under high operating pressure conditions and for actuating the switch means incorporated in the device to achieve long cycle life as well.

Abstract: A digital synchronizer includes a latch connected to a level sensitive circuit. The latch is constructed to provide a rapid transition between logic "0" and logic "1". In addition, the latch is periodically cleared. The level sensitive circuit provides a propagation barrier to any metastable state that may be present in the latch. However, the level sensitive circuit is also constructed for rapid transition from logic "0" to logic "1" when such a state occurs within the latch. An additional latch is connected in a further embodiment to provide additional reliability of the synchronizer circuit. The second latch is a two inverter latch with refresh for 3/4 of a machine cycle to allow any transients conditions within the latch to dampen out.

Abstract: A data terminal having an error checking file transfer mode which tests received data to determine whether it is valid data and transmits an acknowledge or nonacknowledge signal dependent upon the results of the valid data test. This valid data test preferably takes the form of some type of logical redundancy check matching received data signal with a received redundancy signal. Valid received data is stored in an internal random access memory or an external mass memory. The data terminal preferably exchanges hand shaking signals prior to the initiation of data transfer. The data terminal preferably generates a nonacknowledge signal when a predetermined time has elapsed since the last received signal, echoes an end of file signal when an end of file signal is received and transmits a reset signal if the communications are garbled. In the preferred embodiment the data terminal includes a simple processing unit operating under the control of a program stored in a plug-in read only memory.

Abstract: Circuit detecting synchronization pulses in a composite signal constituted by synchronization pulses alternating with digital and/or analog signals. The composite signal is applied to first and second detectors. The first detector detects and stores the peak value of the synchronization pulses. The second detector follows and stores the peak value of the composite signal in the same direction as the synchronization pulses, and in particular the base of the synchronization pulse. A comparator receives at its two inputs the stored values and the comparator output assumes a first state when the difference between the stored values is below a predetermined value and a second state when the difference between the stored values is above the predetermined value. The comparator output is shaped and used to trigger a one shot multivibrator to produce narrow pulses of a predetermined duration, free of front and back porch noise, in synchronism with the synchronization pulses in the composite signal.

Abstract: A direct AC converter for converting a polyphase AC input supply into an output DC or single or polyphase AC supply of amplitude, phase, frequency or power factor which is different from the input supply using a matrix of bidirectional switches having contiguous width modulated conduction periods in cycles which synthesize the output supply voltage or voltages from samples of the input supply voltages taken cyclically at a much higher frequency than the supply frequency or frequencies. The switches are operated so that the or each output supply conductor is connected to only one of the input supply conductors at a time. The width modulation may be effected in response to phases of a sinusoidal oscillation to produce a frequency change. The output may have a "negative" frequency so that a phase displacement between current and voltage due to a reactive load appears in the opposite sense in the input supply.

Abstract: A fuel supply system for an internal combustion engine has an electrical resistance heater accommodated in a chamber in gasket means which space a throttle body flange from a mating flange on an intake manifold of the engine for transferring heat to the throttle body flange to avoid freeze up in the throttle body during furnishing of an air-fuel mixture to the engine.

Abstract: A speech synthesis circuit is provided with a variable frame length data converter and the speech synthesizer is preferably integrated on an integrated circuit chips. The variable frame length data converter reduces the amount of data required to synthesizer human speech at a given quality level. Preferably, a full frame of data includes, a pitch parameter, an energy parameter, a repeat bit and a plurality of speech coefficients. Each parameter or coefficient has a preselected length, but each frame has a variable number of parameters or coefficients associated therewith. The parameters and coefficients are encoded and a particular code of the pitch parameter indicates that the speech is to be unvoiced. An unvoiced frame includes fewer coefficients that a voiced frame and the converter detects this particular pitch parameter and automatically sets the unsent coefficients to zero.

Abstract: A magnetic bubble memory system controller is provided to interface a user system and a magnetic domain chip. The controller will functionally accept commands from a user system and deliver those same commands to the appropriate devices associated with the magnetic bubble memory. A further function of the controller device will be to enable multipage read and write functions within the major loop of a magnetic bubble memory chip organization.

Abstract: A global positioning system comprises an RF receiver for receiving L.sub.1, L.sub.2 p-code or ca code modulated frequency outputs from one or more space vehicles, a multiplexer operably connected to the receiver multiplexes the L.sub.1 and L.sub.2 signals to the receiver, and code and carrier tracking loops operably connected to the receiver, each loop including a plurality of filters, one for tracking line-of-sight dynamics and another for determining ionosphere effects on the L.sub.1 and/or L.sub.2 signals.

Abstract: An N-channel, double level poly, MOS read only memory or ROM array is electrically programmable by floating gates positioned beneath control gates formed by row address lines. The cells may be electrically programmed by applying selected voltages to the source, drain, control gate and substrate; the floating gate is charged through an insulator between the floating gate and the channel. A simplified process for fabrication of the devices eliminates photoresist and implant steps yet produces improved characteristics in the form of higher gain and lower body effect.

Abstract: This invention relates to improved components for an automatic temperature control system for automobiles. The control system operates on the proportional stroke principle and comprises an in-car air sensing tube biased with ambient air; a sensor in an aspirator at the end of the tube; a moving pivot operated directly by the output of the sensor; and a feedback valve operated by the moving pivot for driving a vacuum-assist motor, the output stroke of which operates the various electrical and vacuum functions of the heater-air conditioning system.

Abstract: A low insertion force connector has metal conductors disposed in respective openings in an insulating connector body. Each conductor has a bridge portion extending in a square inside its respective body opening and has integral leaf springs extending from respective sides of the square toward a terminal entry end of the body opening. Two pairs of the springs are disposed so that the springs in each pair face each other around a common axis for receiving a terminal therebetween. Each leaf spring has an obliquely disposed surface to intercept and be moved by a terminal as the terminal is inserted and a contact surface for engaging the terminal said surfaces of one pair of springs being relatively closer to the entry end of the body opening than said surfaces of the other pair of springs, thereby requiring lesser terminal insertion forces.

Abstract: The electronic learning aid of the present invention includes a scanning instrument for reading coded indicia which control the sound generated by the apparatus. In accordance with the present invention the coded indicia may be arranged to indicate a sub-part of nonspoken sound to be recalled from speech memory within the apparatus. In addition, a repeat command may also be entered via the scanning instrument. Upon entry of a repeat command, which includes a number indicating the number of repeats to be performed, the electronic learning aid repeatively generates sound corresponding to the stored element of nonspoken sound. This invention advantageously enables such an electronic learning aid to generate relatively long sound effects from short coded indicia.

Abstract: MESFET devices are fabricated on a semiconductor substrate using a LOCOS (localized oxidation of silicon) process twice during the fabrication. The first LOCOS process provides device separation with a self-aligned thick-field oxide (SATO). The second LOCOS provides separation of gate and source/drain regions for each device, and self-aligns the gate contact with the channel implant. Devices fabricated by this method exhibit reduced series resistance, and improved metal step coverage.

Abstract: A cell design for an MOS random access memory is disclosed. Two levels of polycrystalline silicon are used, one for the bias voltage side of the storage capacitors and another for the gates of the MOS transistors and as the bit select line or to connect the gates to the bit select line. The bit select or X address line may overlie both the first and/or second level poly, so space is saved in the cell layout. A "V-groove" anisotropically etched storage capacitor may include the MOS access transistor in one end, formed by double implant.

Abstract: A method for selectively depositing a composite material over high-thermal-conductivity areas (such as silicon) and not over low-thermal-conductivity areas (such as oxide), which does not require any additional patterning step. A composite material, such as TiW is deposited overall by sputtering. A short pulse of light is then applied, and the composite material over the oxide separates and flakes off, while the composite material over the high-thermal-conductivity area remains in place.