Abstract: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.

Abstract: In described examples, an apparatus includes: a set of control registers containing control bits for controlling circuitry coupled to receive register write enable signals and to receive input data; a memory for storing data corresponding to the control bits coupled to receive an address and a memory write enable signal; decode circuitry coupled to output the register write enable signals; a data output bus coupled to receive data from the memory but free from connections to the control registers; and a controller coupled to receive an address, coupled to output the address on an internal address bus, coupled to output a register write enable signal, and coupled to output the memory write enable signal, configured to cause data to be written to a selected control register corresponding to the address received, and to cause the data to be contemporaneously stored at a memory location corresponding to the address received.

Abstract: Disclosed embodiments provide a technique in which a memory controller determines whether a fetch address is a miss in an L1 cache and, when a miss occurs, allocates a way of the L1 cache, determines whether the allocated way matches a scoreboard entry of pending service requests, and, when such a match is found, determine whether a request address of the matching scoreboard entry matches the fetch address. When the matching scoreboard entry also has a request address matching the fetch address, the scoreboard entry is modified to a demand request.

Abstract: A method for dynamically monitoring a capacity of a battery includes estimating a first voltage threshold of the battery that is being discharged, wherein the first voltage threshold corresponds to a low capacity of the battery, and measuring a present voltage and a present current of the discharging battery. The method further includes re-scaling the present current based on the estimated first voltage threshold and the measured present voltage of the discharging battery, and calculating, based on re-scaling the measured present current, the battery's capacity before the present voltage level decreases below the first voltage threshold.

Abstract: A system includes an oscillator comprising a first switch, a current source, a capacitor, and a comparator, the capacitor and the comparator coupled at a node. The system includes one or more delay buffers coupled to the comparator. The system includes a first inverter coupled to the one or more delay buffers. The system includes a first buffer coupled to the one or more delay buffers. The system includes a first coupling capacitor coupled to the first inverter and the first buffer via second and third switches, respectively. The system includes a second inverter coupled to the one or more delay buffers. The system includes a second buffer coupled to the one or more delay buffers. The system includes a second coupling capacitor coupled to the second inverter and the second buffer via fourth and fifth switches, respectively. The first and second coupling capacitors are coupled to the oscillator.

Abstract: An encapsulated package is provided that includes an integrated circuit (IC) die. An encapsulation material encapsulates the IC die. A set of broadband spectral sensors on the IC die are configured to generate a set of signals in response to electromagnetic energy received by the spectral sensors. A photonic filter structure within the encapsulation material is positioned adjacent the set of spectral sensors. The photonic filter structure is configured to pass a different frequency band of electromagnetic energy to each of the set of spectral sensors.

Abstract: Described examples include microelectronic devices and integrated circuits with an active first circuit in a first segment of a first wafer, a second circuit in a second segment of the first wafer, and second and third wafers bonded to different surfaces of the first wafer to provide first and second cavities with surfaces spaced from the first segment. An opening extends through the first wafer between the first and second cavities to separate portions of the first and second segments and to form a sealed cavity that surrounds the first segment. A bridge segment of the first wafer supports the first segment in the sealed cavity and includes one or more conductive structures to electrically connect the first and second circuits.

Abstract: Described examples provide integrated circuits and methods, including forming a conductive seed layer at least partially above a conductive feature of a wafer, forming a conductive structure on at least a portion of the conductive seed layer, performing a printing process that forms a polymer material on a side of the wafer proximate a side of the conductive structure, curing the deposited polymer material, and attaching a solder ball structure to a side of the conductive structure.

Abstract: Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, (2) providing die on wafer with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, and (3) providing a connectivity mechanism between the bidirectional transceiver circuitry's of the tester and a selected group or all of the die on wafer for communication of the JTAG signals.

Abstract: A split-gate flash memory cell (cell) that can be formed by a method including self-aligned patterning for the select gates includes a semiconductor surface. A first control gate (CG) on a first floating gate (FG) and a second CG on a second FG are on the semiconductor surface. A common source/drain is between the first and second FG. A first select gate and a second select gate are on a select gate dielectric layer that is between a first BL source/drain in the semiconductor surface and the first FG and between a second BL source/drain and the second FG, respectively. The first select gate and the second select gate are spacer-shaped.

Abstract: Integrated circuits may be assembled by placing a batch of integrated circuit (IC) die on a leadframe. Each of the IC die includes a magnetically responsive structure that may be an inherent part of the IC die or may be explicitly added. The IC die are then agitated to cause the IC die to move around on the leadframe. The IC die are captured in specific locations on the leadframe by an array of magnetic domains that produce a magnetic response from the plurality of IC die. The magnetic domains may be formed on the lead frame, or may be provided by a magnetic chuck positioned adjacent the leadframe.

Abstract: A semiconductor device includes a medium voltage MOSFET having a vertical drain drift region between RESURF trenches containing field plates which are electrically coupled to a source electrode of the MOSFET. A split gate with a central opening is disposed above the drain drift region between the RESURF trenches. A two-level LDD region is disposed below the central opening in the split gate. A contact metal stack makes contact with a source region at lateral sides of the triple contact structure, and with a body contact region and the field plates in the RESURF trenches at a bottom surface of the triple contact structure. A perimeter RESURF trench surrounds the MOSFET. A field plate in the perimeter RESURF trench is electrically coupled to the source electrode of the MOSFET. An integrated snubber may be formed in trenches formed concurrently with the RESURF trenches.

Abstract: A circuit for measuring an impedance of a device under test (DUT). The circuit includes: (i) circuitry for generating a stimulus wave at a stimulus frequency; (ii) an amplifier circuit coupled to the DUT to present a response signal from the DUT in response to the stimulus wave; (iii) switching circuitry for selectively coupling, between the stimulus wave and an input to the amplifier, either the DUT, a first calibration impedance, or a second calibration impedance. With the switching functionality, calibrations are performed so to provide a measure of impedance of the DUT in response to the plural calibrations.

Abstract: A touch sensing apparatus for dual (adjacent) touch buttons (areas) defined on a touch surface (such as a sidewall of a mobile communications device). The apparatus includes first and second touch sensor assemblies, each including a support structure, a mounting structure to mount the touch sensor assembly to the back-side of the surface, and a sense inductor coil disposed on one of the support structure and the mounting structure. The first touch sensor assembly mounted to the back-side of the surface opposite the first touch area. The second touch sensor assembly mounted to the back-side of the surface opposite the second touch area.

Abstract: A vertical Hall element and method of fabricating are disclosed. The method includes forming a buried region having a first conductivity type in a substrate having a second conductivity type and implanting a dopant of the first conductivity type into a well region between the top surface of the substrate and the buried region. The buried region has a doping concentration increasing with an increasing depth from a top surface of the substrate and the well region has a doping concentration decreasing from the top surface of the substrate to the buried region. The method includes forming first through fifth contacts on the well region. First and second contacts define a conductive path and second and third contacts define another conductive path through the well region. The fourth contact is formed between first and second contacts and the fifth contact is formed between second and third contacts.

Abstract: These teachings apply with respect to a direct current (DC)-output converter and provide for adjusting a number of switching pulses per burst cycle as a function, at least in part, of converter output loading. This adjustment can be made by controlling burst frequency with respect to at least one predetermined threshold frequency. The predetermined threshold frequency can comprise a non-audible frequency such that the number of switching pulses is adjusted to prevent the burst frequency from itself constituting an audible signal. The adjustment of the number of switching pulses per burst cycle may only occur when the output loading is less than a predetermined level of loading. These teachings may also provide for clamping the pulse frequency for the pulses in each burst package to a particular value when dynamically controlling the number of pulses in each burst package. The aforementioned particular value may constitute, for example, a highest available switching frequency.

Abstract: Peak detection methods, apparatus, and circuits are disclosed. An example peak detector includes a first peak-hold circuit having a first input terminal and a first output terminal, the first peak-hold circuit to determine a first peak of a rectified input voltage at the first input terminal during a first time interval, and to track a second peak of the rectified input voltage during a second time interval, the second time interval distinct from the first time interval, and a second peak-hold circuit having a second input terminal and a second output terminal, the second peak-hold circuit to determine, during the second time interval, a greater of the first peak and the second peak, the first output terminal coupled to the second input terminal, the greater of the first peak and the second peak output at the second output terminal.

Abstract: A pressure transducer includes a cavity, a first dipolar molecule disposed within the cavity, and a second dipolar molecule disposed within the cavity. The first dipolar molecule exhibits a quantum rotational state transition at a fixed frequency with respect to cavity pressure. The second dipolar molecule exhibits a quantum rotation state transition at a frequency that varies with cavity pressure.

Abstract: An illustrate method (and device) includes etching a cavity in a first substrate (e.g., a semiconductor wafer), forming a first metal layer on a first surface of the first substrate and in the cavity, and forming a second metal layer on a non-conductive structure (e.g., glass). The method also may include removing a portion of the second metal layer to form an iris to expose a portion of the non-conductive structure, forming a bond between the first metal layer and the second metal layer to thereby attach the non-conductive structure to the first substrate, sealing an interface between the non-conductive structure and the first substrate, and patterning an antenna on a surface of the non-conductive structure.

Abstract: A method and apparatus for depth-fill algorithm for low-complexity stereo vision. The method includes utilizing right and left images of a stereo camera to estimate depth of the scene, wherein the estimated depth relates to each pixel of the image, and updating a depth model with the current depth utilizing the estimated depth of the scene.