Abstract: A method of video decoding is provided that includes receiving a data stream comprising a sequence of syntax elements that were compressed using context-adaptive binary arithmetic coding (CABAC), such that the encoding of each bin of a bin string representative of a syntax element was performed by arithmetic encoding. Two consecutive bins of a syntax element are decoded in parallel. Speculative computation and prefetching is used to reduce the critical path and thereby improve processing speed.

Abstract: An apparatus employing control words to present a synthesized output signal having an output frequency and a delay with respect to an input signal includes: (a) A multiplexer receiving the input signal and having an output and an address input. (b) An output unit generates the output signal in response to a drive signal from the multiplexer. (c) A first register coupled with the multiplexer output. (d) A second register coupled with the multiplexer and the first register. The first register responds to a multiplexer output signal to provide a first control signal to the second register based upon the control words. The second register responds to the multiplexer output signal to provide a second control signal to the address input based upon the first control signal and the control words. The multiplexer presents the drive signal in response to the second control signal.

Abstract: A method for manufacturing a semiconductor device. The method comprises forming a metal layer on a silicon-containing layer located on a semiconductor substrate. The method also comprises reacting a portion of the metal layer with the silicon-containing layer to form a metal silicide layer. The method further comprises removing an unreacted portion of the metal layer on the metal silicide layer by a removal process. The removal process includes delivering a flow of an acidic solution to a surface of the unreacted portion of the metal layer, wherein the acidic solution delivered to the surface is substantially gas-free.

Abstract: Exemplary embodiments provide methods for implementing an ultra-high temperature (UHT) anneal on silicon germanium (SiGe) semiconductor materials by co-implanting carbon into the SiGe material prior to the UHT anneal. Specifically, the carbon implantation can be employed to increase the melting point of the SiGe material such that an ultra high temperature can be used for the subsequent anneal process. Wafer warpage can then be reduced during the UHT anneal process and potential lithographic mis-alignment for subsequent processes can be reduced. Exemplary embodiments further provide an inline control method, wherein the wafer warpage can be measured to determine the litho-mis-alignment and thus to control the fabrication process. In various embodiments, the disclosed methods can be employed for the fabrication of source/drain extension regions and/or source/drain regions of transistor devices, and/or for the fabrication of base regions of bipolar transistors.

Abstract: A method and apparatus for providing music information for a wireless CD player is disclosed. The CD player may transmit a substantially unique CD tag to a music information service computer system across a network via a wireless communications protocol. The music information service system then matches the CD tag to music data stored in a database. This music data is then transmitted to the CD player to be displayed to the user.

Abstract: The invention discloses integrated circuits (ICs), molded IC packages, and to leadframe arrays, package arrays and methods for their manufacture. Leadframe arrays and package arrays used for the manufacture of IC packages by transfer molding processes include a locking feature adapted for encapsulation. The locking feature is situated in a strap of the leadframe array overlying a gate between mold cavities. The strap lock formed by curing encapsulant in the locking feature of the strap strengthens the resulting package array and provides improved mold extraction and handling characteristics.

Abstract: A circuit is designed with a matched filter circuit including a plurality of fingers (700, 702, 704) coupled to receive a data symbol. Each finger corresponds to a respective path of the data symbol. Each finger produces a respective output signal. A plurality of decoder circuits (706, 708, 710) receives the respective output signal from a respective finger of the plurality of fingers. Each decoder circuit produces a respective output signal. A joint detector circuit (1310) is coupled to receive each respective output signal from the plurality of decoder circuits. The joint detector circuit produces an output signal corresponding to a predetermined code.

Abstract: An imaging system 10 includes an image source providing an image having a resolution of X by Y pixels. The system also includes a digital mirror device 16 that includes an array of mirror elements. Each mirror element includes an edge that is not parallel to an edge of a neighboring mirror element. The array 16 includes fewer than X*Y mirror elements.

Abstract: A system and method for power conversion synchronizes multiple phases at a desired phase angle difference. The power conversion involves variable frequency switching, fixed on-time and provides power factor correction. A relative measure of a phase angle difference between two phases permits each phase to be controlled to obtain the desired phase angle difference. The power conversion involves transition mode switching to help reduce switching losses. A phase angle difference detector may be provided for each phase. The various phases may have different inherent frequencies that vary with switching frequency, and are synchronized to an average frequency.

Abstract: A distributed method and apparatus for assigning a unique identifier number to devices connected in a sequential fashion and determining a total device count is presented. Additionally, a method and apparatus for enabling the support of a variable number and type of time slots within a time division multiplexed serial protocol is presented.

Abstract: A novel and useful fast hopping frequency synthesizer and transmitter associated therewith. The frequency synthesizer and transmitter incorporates a digitally controlled oscillator (DCO) adapted to operate open loop. Instantaneous frequency switching is achieved by changing an oscillator tuning word (OTW) to imitate the three oscillators of a UWB transmitter. In one embodiment, the DCO can change the frequency instantaneously within the 1/fT of the varactor devices used to construct the DCO. An all digital phase lock loop (ADPLL) is used for offline calibration prior to the start of packet transmission or reception. Any phase shift during the switching is tracked by a digital circuit in the transmitter. In a second embodiment, additional frequency accuracy is provided by use of a numerically controlled oscillator (NCO) that functions to generate a fine resolution complex exponential waveform which effectively shifts the synthesized frequency.

Abstract: A method of tracing data processor activity includes trace data markers indicating initiation and termination of at least one trace function at a specified program counter address and emulation pause related markers indicating initiation and termination of an emulation halt state at a specified program counter. Each emulation pause related marker includes a conflict bit indicating the presence or absence of a simultaneous trace data marker having a different program counter address.

Abstract: A system for detecting a direct current (DC) component of a pulse-width modulated (PWM) signal includes a modulator configured to provide at least one PWM signal to an input of an amplifier. A DC detector is configured to detect a DC component of a selected one of the at least one PWM signal as a function of a switching frequency of the selected PWM signal. The DC detector provides at least one report signal that indicates a level of the DC component of the selected PWM signal relative to a predetermined threshold.

Abstract: A semiconductor device (1700), which comprises a workpiece (1201) with an outline (1711) and a plurality of contact pads (1205) and further an external part (1701) with a plurality of terminal pads (1702). This part is spaced from the workpiece, and the terminal pads are aligned with the workpiece contact pads, respectively. A reflow element (1203) interconnects each of the contact pads with its respective terminal pad. Thermoplastic material (1204) fills the space between the workpiece and the part; this material adheres to the workpiece, the part and the reflow elements. Further, the material has an outline (1711) substantially in line with the outline of the workpiece, and fills the space (1707) substantially without voids. Due to the thermoplastic character of the filling material, the finished device can be reworked, when the temperature range for reflowing the reflow elements is reached.

Abstract: A power converter receiving a single-sided supply which is ground-terminated and providing a regulated positive supply and a regulated negative supply that is optimized to the expected output range of a class AB amplifier, as well as providing excellent efficiency. The converter finds application as a compact converter to power an audio amplifier driving an audio device which is ground terminated, such as a speaker.

Abstract: A light-emitting diode control circuit is provided, that includes: a duration selection circuit for selecting one of a first duration value, a second duration value, a third duration value, or a fourth duration value as a selected duration value based on a selection signal; a control clock generator for generating a control clock signal based on a slow clock signal and the selected duration value; a selection signal generator for generating the selection signal based on the control clock signal; an intensity signal generator for generating a current intensity signal based on a first intensity value, a second intensity value, the control clock signal, and the selection signal; a reference wave generator for generating a reference wave based on a fast clock signal; and a comparator for comparing the current intensity signal and the reference wave to generate a pulse width modulation signal to control the light-emitting diode.

Abstract: An electronic integrated circuit includes a signal path connected between the functional logic (15) thereof and an external output terminal. The signal path includes a switch (S), a bus holder circuit (121B), and an output buffer (19).

Abstract: An integrated circuit containing hydrogen permeable dummy vias configured in a linear or rectangular array and symmetrically positioned over a component in the integrated circuit. An integrated circuit containing matching components with identical layouts and hydrogen permeable dummy vias in identical configurations over the matching components. A process of forming an integrated circuit containing matching components with identical layouts and hydrogen permeable dummy vias in identical configurations over the matching components.

Abstract: A network transmitter and receiver are for use with a network MIMO super cell. The network transmitter includes a rank control unit configured to provide a rank indication for a dedicated beamforming transmission from the network MIMO super cell, wherein the rank indication corresponds to spatial multiplexing of multiple data streams for the dedicated beamforming transmission. The network transmitter also includes a transmission unit configured to signal the rank indication. The network receiver includes a reception unit configured to receive a dedicated beamforming transmission within the network MIMO super cell. The network receiver also includes a rank processing unit configured to process a rank indication for the dedicated beamforming transmission corresponding to spatial multiplexing of multiple data streams for the dedicated beamforming transmission.

Abstract: Scan distributor, collector, and controller circuitry connect to the functional inputs and outputs of core circuitry on integrated circuits to provide testing through those functional inputs and outputs. Multiplexer and demultiplexer circuits select between the scan circuitry and the functional inputs and outputs. The core circuitry can also be provided with built-in scan distributor, collector, and controller circuitry to avoid having to add it external of the core circuitry. With appropriately placed built-in scan distributor and collector circuits, connecting together the functional inputs and outputs of the core circuitry also connects together the scan distributor and collector circuitry in each core. This can provide a hierarchy of scan circuitry and reduce the need for separate test interconnects and multiplexers.