Abstract: A PLC network system and method operative with OFDM for generating MIMO frames with suitable preamble portions configured to provide backward compatibility with legacy PLC devices and facilitate different receiver tasks such as frame detection and symbol timing, channel estimation and automatic gain control (AGC), including robust preamble detection in the presence of impulsive noise and frequency-selective channels of the PLC network. To reduce collisions in a network, a MIMO PLC transmitter device may selectively perturb legacy FCH data so as to ensure a maximum back-off time by a legacy PLC receiver.

Abstract: From at least a first microphone, first microphone signals are received that represent first sound waves. From at least a second microphone, second microphone signals are received that represent second sound waves. In response to the first microphone signals, first noise in the first sound waves is estimated, and first cancellation signals are output for causing a speaker array to generate first additional sound waves via at least a first acoustic beam for cancelling at least some of the first noise. In response to the second microphone signals, second noise in the second sound waves is estimated, and second cancellation signals are output for causing the speaker array to generate second additional sound waves via at least a second acoustic beam for cancelling at least some of the second noise.

Abstract: A method for fabricating packaged semiconductor devices; attaching a batch-sized metallic grid with openings onto an adhesive tape having an insulating clear core covered by a layer of UV-releasable adhesive, the openings sized larger than a semiconductor chip; attaching a semiconductor chip onto the tape of each window, the chip terminals facing the adhesive surface; laminating insulating material of low coefficient of thermal expansion to fill gaps between each chip and respective grid; turning over assembly to place a carrier under backside of chips and lamination and to remove the tape; plasma-cleaning the assembly front side and sputtering uniform at least one metal layer across the assembly; optionally plating metal layers; and patterning the metal layers to form rerouting traces and extended contact pads for assembly.

Abstract: A first sensor detects whether an object is within a first region that surrounds the first sensor. A second sensor detects whether the object is within a second region that surrounds the second sensor. The first and second sensors are omnidirectional capacitive electrodes. In response to the first sensor detecting that the object is not within the first region, a device determines that the object is not proximate to a particular side of the first and second sensors. In response to the first sensor detecting that the object is within the first region, and the second sensor detecting that the object is within the second region, the device determines that the object is not proximate to the particular side. In response to the first sensor detecting that the object is within the first region, yet the second sensor detecting that the object is not within the second region, the device determines that the object is proximate to the particular side.

Abstract: An embodiment of the invention includes a memory and apparatus for packet processing in a switching network. The memory includes a plurality of words where each word includes a plurality of bits. Each word in the plurality of words is addressed by separate and distinct read address. A logic circuit performs a logical “OR” function on all the bit in all the words addressed by the separate and distinct read addresses and outputs a result.

Abstract: Methods, control apparatus and series resonant or LLC power conversion systems are presented in which a resonant series circuit current is compared with a threshold during a portion of a modulation switching cycle following turn on of a corresponding switching device and one or more indications or remedial actions are undertaken to modify modulation control of a switching circuit in response to a determination that the resonant current is below the threshold to facilitate our promote zero voltage switching or near-zero voltage switching and provide current reversal protection.

Abstract: An enable circuit receives an input enable signal that is referenced to a first voltage and generates a level-shifted output enable signal referenced to a second voltage. Bias control circuitry prevents shoot-through currents during ramping of the first voltage and from causing indeterminate logic levels of the level-shifted output enable signal. An enabled level-shifting circuit receives an input logic signal that is referenced to the first voltage and generates a level-shifted output logic signal referenced to the second voltage. Enable circuitry operates in response to the level-shifted output enable signal to enable normal level-shifting operation while the first and second voltages are at normal operating levels and prevents shoot-through currents in the enabled level-shifting circuit from causing indeterminate levels of the level-shifted output logic signal.

Abstract: The present disclosure relates to an apparatus comprising at least one sensing capacitor and a controller, wherein the controller is configured to receive a signal from the at least one sensing capacitor indicative of a change of charge of the sensing capacitor, and wherein the controller is configured to determine an amount of force applied to the sensing capacitor, an acceleration of the sensing capacitor, a torsion of the sensing capacitor, a vibration of the sensing capacitor or a pulling force applied to the sensing capacitor based on the change of charge of the at least one sensing capacitor.

Abstract: A system and method for managing power in a subnet having a hub in communication with one or more nodes is disclosed. The hub and nodes communicate using one or more non-contention access methods, such as scheduled, polled or posted access. The node may enter a sleep or hibernation state while no scheduled, polled or posted allocation interval is pending. The hibernation state allows the node to hibernate through one or more entire beacon periods. In the sleep state, the node may be asleep between any scheduled, polled and posted allocation intervals for the node or during another node's scheduled allocation interval in a current beacon period. By selecting which access scheme is in use, the node and hub can increase the node's chances to be in hibernation or sleep state and minimize power consumption.

Abstract: A system and method for tracking noise in a received signal uses a forward/backward Decision-Directed Phase Tracking Loop to generate a phase-noise compensation signal that removes phase noise from received single-carrier signals.

Abstract: An integrated analog data receiver for a capacitive touch screen. An analog data receiver circuit for a touch screen device is provided including a sigma delta analog to digital converter configured for direct connection to an analog output of a touch screen device, and further including an integrator circuit having an input coupled for receiving the analog output signal and outputting an integrated output voltage; a comparator coupled to the integrated output voltage and a first bias voltage and outputting a comparison voltage; a clocked sampling latch coupled to the comparison voltage and to a clock signal and outputting quantized data bits corresponding to samples of the comparison voltage; and a digital filter and decimator coupled to the clocked sampling latch and outputting serial data bits which form a digital representation corresponding to the output of the touch screen device. Additional circuits and systems are disclosed.

Abstract: A device wirelessly receives first and second identifiers contemporaneously from a network. The first identifier indicates that the network operates in a first mode that is not secure. The second identifier indicates that the network operates in a second mode that is secure. In response to wirelessly receiving the first and second identifiers, the device wirelessly connects to the network in the first mode to determine whether the network accepts the device for the second mode, irrespective of whether the network previously accepted the device for the second mode, and irrespective of whether the device already stores authentication information for the second mode. In response to determining that the network accepts the device for the second mode, the device wirelessly connects to the network in the second mode to securely communicate with the network in response to the authentication information.

Abstract: An optimal idle state of a processor is selected using dynamically derived parameters. For example, the idle state is selected from a group of possible idle power states. A current detector is arranged to perform power measurements of the processor and to report a total power consumption of the processor for each time value of a range of discrete values for each possible idle power state. A calibration unit is arranged to communicate with the current detector and the processor, and to automatically activate a calibration sequence that is used to produce data from which idle power state is optimal for the processor for an estimated idle period.

Abstract: This invention is a cache system with a memory attribute register having plural entries. Each entry stores a write-through or a write-back indication for a corresponding memory address range. On a write to cached data the cache the cache consults the memory attribute register for the corresponding address range. Writes to addresses in regions marked as write-through always update all levels of the memory hierarchy. Writes to addresses in regions marked as write-back update only the first cache level that can service the write. The memory attribute register is preferably a memory mapped control register writable by the central processing unit.

Abstract: Systems and methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols based on a chirp signal that yields a low peak-to-average power ratio (PAPR). According to some techniques, the preamble may be constructed with one or more different types and/or number of symbols configured to identify a PLC domain operating in close physical proximity to another PLC domain. According to other techniques, one or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise. According to yet other techniques, a PLC detector may be capable of receiving and decoding two or more types of PLC frames (e.g., using different PLC standards).

Abstract: A tunable DCO (digitally controlled oscillator), for example, includes a clock generator that is arranged to provide a converter clock signal for driving a frequency-to-voltage (F2V) converter. The F2V converter, for example, includes a frequency target control input for selecting an operational frequency and in response generates a frequency control signal using a DAC (digital-to-analog converter). The example F2V converter is arranged using a split capacitor DAC to provide a linear voltage response over a range of trim codes. The clock generator is arranged to generate the converter clock signal in response to the frequency control signal.

Abstract: One embodiment includes a back-electromagnetic force (BEMF) sense system. The system includes a sense amplifier configured to measure an amplitude of a selected one of a plurality of phase voltages relative to a center tap voltage associated with a servo motor for the calculation of an associated BEMF voltage. The plurality of phase voltages can be provided to the sense amplifier via a respective plurality of control nodes. The selected one of the plurality of phase voltages on a respective one of the control nodes can be selected based on coupling the other of the plurality of control nodes associated with the other of the plurality of phase voltages to a voltage source configured to provide a predetermined voltage magnitude.

Abstract: A level shifter circuit has a plurality of channels for providing signals to a capacitive load and has circuits for sharing charge stored in the capacitive load between the channels. A first pair of channel clock generating circuits are coupled respectively to a first pair of channels. A second pair of channel clock generating circuits are coupled respectively to a second pair of channels. A pair of switches couple the first pair of channels together and the second pair of channels together, respectively, for sharing charge between the channels. A single resistor is coupled in circuit with all of the channels for controlling a slope of charge sharing between channels.

Abstract: An apparatus for rotating a load about a predetermined rotation axis of the apparatus. The apparatus includes a rotatable shaft having a central longitudinal axis; a turntable fixedly mounted on the rotatable shaft; an annular centering surface; and a stud member positioned opposite the annular centering surface. Either the annular centering surface or the stud member is affixed to the turntable. The annular centering surface and the stud member are adapted to co-act to maintain the central longitudinal axis of the rotatable shaft in alignment with the predetermined rotation axis of the apparatus.

Abstract: A light system (FIG. 2) is disclosed. The light system includes a plurality of series connected light emitting diodes (240-246). Each of a plurality of switching devices (230-236) has a control terminal and each has a current path coupled in parallel with a respective LED. A plurality of fault detector circuits (220-226) are each coupled in parallel with a respective light emitting diode. Each fault detector circuit has a first comparator (FIG. 7, 704) arranged to compare a voltage across the respective light emitting diode to a respective first reference voltage (708). When a fault is defected, a control signal is applied to the control terminal to turn on a respective switching device of the plurality of switching devices.