Patents Assigned to Texas Instruments
  • Patent number: 9224642
    Abstract: An integrated circuit structure includes a first conductive layer (MET4) including a first forked conductive structure (310), an insulating layer (320, ILD45) substantially disposed over the first forked conductive structure (310), a plurality of conductive vias (331-334) through the insulating layer (ILD45) and electrically connecting with the first forked conductive structure (310), and a second conductive layer (MET5) including a second forked conductive structure (340) substantially disposed over at least a portion of the insulating layer (ILD45) and generally perpendicular to the first forked conductive structure (310), the plurality of conductive vias (331-334) electrically connecting with the second forked conductive structure (340). Other structures, devices, and processes are also disclosed.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Hugh Thomas Mair
  • Patent number: 9224724
    Abstract: An integrated circuit includes a bidirectional ESD device which has a plurality of parallel switch legs. Each switch leg includes a first current switch and a second current switch in a back-to-back configuration. A first current supply node of each first current switch is coupled to a first terminal of the ESD device. A second current supply node of each second current switch is coupled to a second terminal of the ESD device. A first current collection node of each first current switch is coupled to a second current collection node of the corresponding second current switch. The first current collection nodes in each first current switch is not coupled to any other first current collection node, and similarly, the second current collection node in each instance second current switch is not coupled to any other second current collection node.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Akram A. Salman, Farzan Farbiz, Ann Margaret Concannon, Gianluca Boselli
  • Patent number: 9224656
    Abstract: An integrated circuit containing PMOS transistors may be formed by forming a dual layer hard mask. A first layer of the hard mask is carbon-containing silicon nitride formed using a hydrocarbon reagent. A second layer of the hard mask is chlorine-containing silicon nitride formed on the first layer using a chlorinated silane reagent. After SiGe epitaxial source/drain regions are formed, the hard mask is removed using a wet etch which removes the second layer at a rate at least three times faster than the first layer.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Deborah Jean Riley, Seung-Chul Song
  • Patent number: 9224657
    Abstract: An integrated circuit is formed to include a first polarity MOS transistor and a second, opposite, polarity MOS transistor. A hard mask of silicon-doped boron nitride (SixBN) with 1 atomic percent to 30 atomic percent silicon is formed over the first polarity MOS transistor and the second polarity MOS transistor. The hard mask is removed from source/drain regions of the first polarity MOS transistor and left in place over the second polarity MOS transistor. Semiconductor material is epitaxially grown at the source/drain regions of the first polarity MOS transistor while the hard mask is in place. Subsequently, the hard mask is removed from the second polarity MOS transistor.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: David Gerald Farber, Tom Lii, Brian K. Kirkpatrick
  • Patent number: 9225264
    Abstract: Systems, apparatus and methods are presented for multiphase inverter control in which PWM switching control signals are generated for operating inverter switching devices according to current feedback values, and a given inverter phase is identified in a given PWM switching cycle having the lowest low side duty cycle on-time. A phase current feedback value is selectively computed for the identified phase at least partially according to the low side current shunt voltage values corresponding to other output phases, and the phase current feedback values are updated with the computed phase current feedback value and the low side current shunt voltage values of the remaining output phases to provide feedback for closed loop PWM switching control.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Stephen John Fedigan, Paul LeRoy Brohlin
  • Patent number: 9222802
    Abstract: A sensor power management arrangement includes a signal processing circuit configured to receive signal from a sensor, to test the signal against at least one criterion, and to pass the signal for further processing in response to the signal passing the at least one criterion. In this way, only signals that are of a sufficient importance or significance will consume the maximum amount of processing energy and through processing by later processes or circuitry. Should a signal from a sensor not be strong enough or meet other criteria, power will not be wasted in preparing that signal for provision to the microcontroller or microprocessor. Additional flexibility in the sensor power management can be realized by adjusting the criteria against which the sensor signal is compared based on a status of the sensor apparatus.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sriram Narayanan, David Louis Freeman, Marco Corsi
  • Patent number: 9224480
    Abstract: A non-volatile memory, such as a one-time programmable memory, with a dual purpose read/write cache. The read/write cache is used as a write cache during programming, and stores the data to be written for a full row of the memory array. The programming operation simultaneously programs all cells in the selected row based on the contents of the write cache. In subsequent read operations, the read/write cache is used as a read cache. A full row of the array is simultaneously read in a read access, and the contents of that row are stored in the read cache. Subsequent access to that same row causes the data to be read from the read cache rather than requiring access of the array.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: David Alexander Grant, Louis A. Williams, III
  • Patent number: 9225179
    Abstract: A system includes multiple power supplies connected in series and an active balancing circuit. The active balancing circuit includes an LC resonance circuit and multiple switches configured to selectively couple different ones of the power supplies to the LC resonance circuit. The LC resonance circuit includes a capacitor, an inductor, and an additional switch. The capacitor is configured to store energy to be transferred between two or more of the power supplies. The additional switch is configured to selectively create a resonance between the capacitor and the inductor in order to reverse a discharge current direction through the capacitor.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Qingguo Liu
  • Patent number: 9224653
    Abstract: In an integrated circuit that includes an NMOS logic transistor, an NMOS SRAM transistor, and a resistor, the gate of the SRAM transistor is doped at the same time that the resistor is doped, thereby allowing the gate of the logic transistor to be separately doped without requiring any additional masking steps.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Himadri Sekhar Pal, Ebenezer Eshun, Shashank S. Ekbote
  • Patent number: 9223545
    Abstract: A system including an integrated circuit chip also includes a microcontroller in the chip and an algorithm for execution by the microcontroller. The algorithm includes addition, subtraction, and multiplication operators (e.g. 25,15,20) and shift-left and shift-right operators (e.g., 48,21) configured for solving particular equations (Eqns. 1-4). Input numbers are within particular ranges to allow the shift operators to shift binary bits so each number so it fits within a register of a particular width. An IR sensor (4) may convert IR radiation (3) to produce a voltage (Vobj) representing the temperature (Tobj) of an IR emitting object (2). The algorithm (100) operates in conjunction with the microcontroller (7) to convert the voltage (Vobj) into a value representing the temperature (Tobj) of the remote object (2) without keeping track of decimal points and resolution of the numbers.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Habib Sami Karaki, Ankit Khanna
  • Patent number: 9225843
    Abstract: In response to a first signal, a first sound wave is output. A second sound wave is received that includes an acoustic echo of the first sound wave. In response to the second sound wave, a second signal is output that cancels an estimate of the acoustic echo. The estimate of the acoustic echo is iteratively adapted to increase a statistical independence between the first and second signals, irrespective of whether a first voice is present in the first sound wave, and irrespective of whether a second voice is present in the second sound wave.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Muhammad Z. Ikram
  • Patent number: 9225952
    Abstract: A method of color processing determines whether a pixel color is within at least one range of predetermined colors corresponding to a viewer expected color. If so, the method altering the pixel color to better approximate the viewer expected color. For detection of skin tones determining whether the pixel color is within a range of predetermined colors includes discounting an illuminant of the pixel color. The viewer expected colors are preferably skin tone, grass green and sky blue. The saturation level of grass green and sky blue are enhanced and that of skin tones are suppressed. The saturation s is limited based upon lightness J and hue h to convert to an allowable RGB color format range.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shereef Shehata, Weider P. Chang
  • Patent number: 9225397
    Abstract: The present disclosure provides a receiver, a transmitter and methods of operating a receiver or a transmitter. In one embodiment, the receiver includes a receive unit configured to receive transmissions from multiple antennas. The receiver also includes a rank feedback unit configured to feed back a transmission rank selection, wherein the transmission rank selection corresponds to a transmission rank feedback reduction scheme. The receiver further includes a precoding feedback unit configured to feed back a precoding matrix selection, wherein the precoding matrix selection corresponds to a precoding matrix feedback reduction scheme.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Runhua Chen, Eko N. Onggosanusi, Badri Varadarajan, Anand G. Dabak
  • Publication number: 20150371638
    Abstract: A low power sound recognition sensor is configured to receive an analog signal that may contain a signature sound. Sparse sound parameter information is extracted from the analog signal. The extracted sound parameter information is sampled in a periodic manner and a context value is updated to indicate a current environmental condition. The sparse sound parameter information is compared to both the context value and a signature sound parameter database stored locally with the sound recognition sensor to identify sounds or speech contained in the analog signal, such that identification of sound or speech is adaptive to the current environmental condition.
    Type: Application
    Filed: August 28, 2013
    Publication date: December 24, 2015
    Applicant: Texas Instruments Incorporated
    Inventors: Wei Ma, Bozhao Tan
  • Publication number: 20150371985
    Abstract: A first silicon controlled rectifier has a breakdown voltage in a first direction and a breakdown voltage in a second direction. A second silicon controlled rectifier has a breakdown voltage with a higher magnitude than the first silicon controlled rectifier in the first direction, and a breakdown voltage with a lower magnitude than the first silicon controlled rectifier in the second direction. A bidirectional electrostatic discharge (ESD) structure utilizes both the first silicon controlled rectifier and the second silicon controlled rectifier to provide bidirectional protection.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Henry Litzmann Edwards, Akram A. Salman, Md Iqbal Mahmud
  • Publication number: 20150370031
    Abstract: A lens driver circuit determines the resonant frequency at a number of positions that a lens can move to so that the lens can move from an old position to a new position in two steps where the second step occurs a delay time after the first step. The delay time can be one-half of the period of the resonant frequency at the new position.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Applicant: Texas Instruments Incorporated
    Inventors: Jussi Petteri Tikkanen, Juha Jorma Sakari Karttunen
  • Patent number: 9218892
    Abstract: Potential errors that might result from operating logic and/or memory circuits at an insufficient operating voltage are identified by electrically altering nodes of replica or operational circuits so that the electrically altered nodes are susceptible to errors. The electrically altered nodes in an embodiment are controlled using parametric drivers. A minimized operating voltage can be selected by operating at a marginal operating voltage and detecting a voltage threshold at which errors in the electrically altered nodes are detected, for example.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: December 22, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dharin N. Shah, Sharad Gupta, Vinod Joseph Menezes, Vish Visvanathan
  • Patent number: 9218981
    Abstract: An integrated circuit with a passivation trapping layer. An integrated circuit with a hydrogen or deuterium releasing layer underlying a passivation trapping layer. Method for forming an integrated circuit having a hydrogen or deuterium releasing layer. Method for forming an integrated circuit having a passivation trapping layer.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: December 22, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Gul B. Basim, Scott R. Summerfelt, Ted S. Moise
  • Patent number: 9218504
    Abstract: A method and apparatus for a hand-held device for ensuring a secured mode transition. The method includes receiving a request to transition to a mode, determining the mode of the hand-held device, transitioning to a transition mode relevant to the received request, wherein the relevant transition mode ensures that the transition is securely executed, setting the device in accordance with the received request, and transitioning to the mode requested.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: December 22, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Russell Melvin Rosenquist
  • Patent number: 9217773
    Abstract: This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is limited. The bus may be used for a variety of serial communication operations such as, but not limited to, serial communication related test, emulation, debug, and/or trace operations of an IC or core design. Other aspects of the disclosure include the use of reduced pin buses for emulation, debug, and trace operations and for functional operations. In a fifth aspect of the present disclosure, an interface select circuit, FIGS. 41-49, provides for selectively using either the 5 signal interface of FIG. 41 or the 3 signal interface of FIG. 8.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: December 22, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Lee D. Whetsel