Abstract: A method and system for performing spatial temporal multiplexing using a multi-threshold mask. A mask generator (404) outputs a threshold value for each pixel of a display. The mask generator typically creates a blue noise mask for a given pixel array that is replicated over the face of the entire display. The blue noise mask generator (404) typically is implemented as a memory lookup table. An index generator (402) provides an offset into the memory lookup table that allows the table to be shifted from time to time. The output of the blue noise mask generator (404), which may be the threshold value itself or a signal representing which threshold is being used, is an input to a selective inverter (406). The selective inverter (406) provides the option of inverting the blue noise mask. To reduce artifacts, the mask is periodically shifted and/or inverted. The value from the mask generator (404), whether inverted or not, is compared to the LSBs of the input data word to yield the fractional bit values.

Abstract: Determining piece-wise polynomials which together would represent large data sets having multi-dimensional input vectors and corresponding output element. In an embodiment, a function/procedure/routine is recursively called/invoked to determine piece-wise polynomial is a data set cannot be entirely modeled by one polynomial. Another aspect of the present invention reduces the number of combinations (of orders for sub-polynomials forming the polynomials) to be tried in determining polynomials, meeting various accuracy requirements. Such a reduction is obtained based on a recognition that when the order in one dimension alone is increased and the result does not lead to acceptable accuracy of the polynomial, the combinations with a lesser number for the order (of the dimension) can be ruled out.

Abstract: An all-digital frequency synthesizer architecture is built around a digitally controlled oscillator (DCO) that is tuned in response to a digital tuning word (OTW). In exemplary embodiments: (1) a gain characteristic (KDCO) of the digitally controlled oscillator can be determined by observing a digital control word before and after a known change (?fmax) in the oscillating frequency; (2) a portion (TUNE_TF) of the tuning word can be dithered (1202), and the resultant dithered portion (dkTF) can then be applied to a control input of switchable devices within the digitally controlled oscillator; and (3) a non-linear differential term (187, 331) can be used to expedite correction of the digitally controlled oscillator when large phase error changes (335) occur.

Abstract: A transponder device having an LC oscillator circuit, an energy storage capacitor and an integrated transponder circuit powered by energy from the storage capacitor. The device operates either in a charge mode in which RF energy is received through the LC oscillator circuit and stored in the energy storage capacitor, or in a transmit mode in which data from the transponder circuit are transmitted from the transponder device through the LC oscillator circuit by sustaining oscillation of the LC oscillation circuit and selectively modulating the oscillator frequency. The device further includes a stimulating circuit to feed energy from the storage capacitor into the LC oscillator circuit during the transmit mode and to sustain oscillation thereof, a peak detector for detecting a peak voltage level of an RF oscillator signal in the LC oscillator circuit and a pulse generator for providing trigger pulses to the stimulating circuit in response to an output from the peak detector.

Abstract: The objective of this invention is to provide a drive circuit and display system that can efficiently transfer prescribed information indicating an abnormality in the drive current supplied to the display elements to a control device. The control data used for controlling the turning on and off of LEDs are shifted sequentially from the first section to the final section of LED drivers 10-1-10-K connected in cascade. In the drive circuit of each section, the control data input from the previous section are held in the first data holding means synchronously with clock signal CLK. Then, the data held in the first data holding means are held in the second data holding means synchronously with latch signal XLAT. Current corresponding to the control data of the second data holding means is supplied to LEDs 40-1-40-M. On the other hand, when new control data are held in the second data holding means, the data indicating prescribed information concerning abnormal functioning of the LED, etc.

Abstract: A micromirror array 110 fabricated on a semiconductor substrate 11. The array 110 is comprised of four operating layers 12, 13, 14, 15. An addressing layer 12 is fabricated on the substrate. A raised electrode layer 13 is spaced above the addressing layer by an air gap. A hinge layer 14 is spaced above the raised electrode layer 13 by another air gap. A mirror layer 15 is spaced over the hinge layer 14 by a third air gap.

Abstract: The present invention facilitates semiconductor device fabrication and performance by providing a semiconductor device that can improve channel mobility for both N type and P type transistor devices. The semiconductor device of the present invention is fabricated on a semiconductor substrate 802 that has a first and second crystallographic orientation axes (e.g., <110>, <100>) 804 and 806. Source to drain channel regions for P type devices are formed 904 and aligned along the first crystallographic orientation axis. Source to drain channel regions for N type devices are formed 906 rotated from the channel regions of the P type devices by an offset angle so that the source to drain channel regions for the N type devices are aligned with the second crystallographic orientation axis.

Abstract: The invention provides a method and apparatus for evaluating the product quality and performances of micromirror array devices through measurements of the electromechanical responses of the individual micromirrors to the driving forces of electric fields. The electromechanical responses of the micromirrors according to the present invention are described in terms of the rotational angles associated with the operational states, such as the ON and OFF state angles of the ON and OFF state when the micromirror array device is operated in the binary-state mode, and the response speed (i.e. the time interval required for a micromirror device to transit form one state to another) of the individual micromirrors to the driving fields.

Abstract: Filtering image information to generate a dithered image includes receiving input image information corresponding to an image generated using a first array comprising a first number of smaller pixels. Intermediate image information is generated from the input image information. The intermediate image information is generated to produce the image using a second array comprising a second number of larger pixels, where the second number less than the first number. A frequency response associated with the image produced using the second array exhibits effects. The intermediate image information is repeatedly filtered to generate updated image information from the intermediate image information and to compensate for the effects. Sub-image information is generated from the updated image information, the sub-image information corresponding to a dithered image.

Abstract: A method and system providing boundary dispersion to pixel values displayed on a binary spatial light modulator to reduce temporal contouring artifacts. Pixel code values are offset from a nominal value when displayed on the SLM to disperse a large bit transition for a pulse width modulation (PWM) system. The offset value varies as a function of the pixel digital code, the pixel spatial location on the screen, and pixel temporal location in time. The set of offsets applied to pixels is varied over a repeating sequence of 2 displayed frames.

Abstract: A method for manufacturing a semiconductor device that method comprises forming a thin film resistor by a process that includes depositing a resistive material layer on a semiconductor substrate. The process also includes depositing an insulating layer on the resistive material layer, and performing a first dry etch process on the insulating layer to form an insulative body. The process further includes performing a second dry etch process on the resistive material layer to form a resistive body. The resistive body and the insulative body have substantially identical perimeters.

Abstract: Various embodiments of the present invention provide voltage converters and methods for using such. As one example, a voltage converter is disclosed that includes a transformer with a first winding and a second winding. A voltage is applied to the first winding for a period that is followed by an OFF time. The voltage converter further includes an OFF time controller that is operable to adjust the OFF time based at least in part on a load current traversing the second winding.

Abstract: A system and method is provided for driving a power field-effect transistor (FET). In one embodiment, a system comprises a control circuit that generates a control signal to provide a gate voltage of the power FET. The system further comprises a slope control circuit coupled between the control circuit and the power FET that is operative to dynamically control the rate-of-change of a gate voltage of the power FET to reduce electromagnetic interference (EMI) emissions and power loss resulting from switching the power FET.

Abstract: A comparator presents a linear load to input signals when providing a comparison output of two input signals. The comparator contains a transistor configured in a source/emitter follower configuration, and operates in the saturation region for substantially the entire range of strengths of the input signals. As a result, the comparator presents a substantially constant load to the input signals. When incorporated in circuits such as a pipeline ADC, the comparator may substantially eliminate errors due to non-linear loads.

Abstract: A low-power data conversion system for converting a serial digital data input signal (DIN) to an analog output signal (Vout) by generating the serial digital data input signal (DIN) at a first sample rate (fsin) in a burst mode, wherein the sampling frequency of the serial digital data input signal (DIN) has a predetermined ratio to the frequency of an external reference clock signal (SLEEPCLK or WCLK). The serial digital data input signal (DIN) is converted into parallel format. A FIFO system temporarily stores a predetermined number of samples (Din) of the parallel format digital data input signal. The samples (Din) have a first sample rate (fsin). The samples (Din) are converted to an analog output signal (Vout).

Abstract: The present invention provides, in one embodiment, a process for fabricating a metal oxide semiconductor (MOS) device (100). The process includes forming a gate (120) on a substrate (105) and forming a source/drain extension (160) in the substrate (105). Forming the source/drain extension (160) comprises an abnormal-angled dopant implantation (135) and a dopant implantation (145). The abnormal-angled dopant implantation (135) uses a first acceleration energy and tilt angle of greater than about zero degrees. The dopant implantation (145) uses a second acceleration energy that is higher than the first acceleration energy. The process also includes performing an ultrahigh high temperature anneal of the substrate (105), wherein a portion (170) of the source/drain extension (160) is under the gate (120).

Abstract: The disclosed embodiments combine an electrothermal actuator system with an electrostatic attraction system, in order to orient bistable micromirrors in digital micromirror devices (DMDs). The micromirror, pivotally supported, can switch between two orientations. While typical DMD systems use electrostatic electrodes to orient the micromirror, stiction forces can restrict micromirror motion, affecting optical performance. The disclosed embodiments use an electrothermal actuation system to mechanically assist the electrodes, overcoming stiction without the need for a high-voltage reset pulse.

Abstract: A delay locked loop (DLL) circuit in which situations of lock to multiple periods of a reference signal is determined by a lock detector using dummy delay elements and a duty cycle correction circuit (DCC). The lock detector, the dummy delay elements and the delay control circuit are used in a path parallel to the delay elements which generate the desired delayed signals having different delays in relation to the reference signal. Due to the use of the parallel path, the throughput performance of the DLL circuit is not impeded. In an embodiment, separate charge pumps are used by a phase comparator and the lock detector used in the parallel path.

Abstract: A solid-state image pickup device that can suppress the dark current with respect to the photo-electrons overflowing from the photodiode, as well as its manufacturing method. Each pixel has the following parts: photodiode, transfer transistor, floating diffusion, accumulating capacitive element, and accumulating transistor.

Abstract: The uplink data rate is dynamically adjusted in a mobile station according to the mobile station's ability to meet QoS (quality of service) requirements of applications executing on the mobile station. In an embodiment, the transition probabilities received from a mobile network are first compensated according to the ability to meet QoS requirements, and the uplink data rate is then computed based on the compensated transition probabilities. According to another aspect of the present invention, the base station dynamically adjusts the transition probabilities based on delay bound requirement of packets and/or average delay or data flow rate requirement.