Abstract: A solid state illumination system is provided for image projection. Red, green and blue light is generated using a blue laser light source and phosphor emissions. The red, green and blue light is passed by TIR or TRIR elements of red, green and blue light channels of an X-cube prism structure for separate modulation by different spatial light modulators. The modulated red, green and blue light is passed by the TIR or TRIR elements into the X-cube and combined into a combined modulated RGB image forming light stream for image formation via projection optics onto a target imaging surface.

Abstract: A system on a package (SOP) can include a galvanic isolator. The galvanic isolator can include an input stage configured to transmit an input RF signal in response to receiving an input modulated signal. The galvanic isolator can also include a resonant coupler electrically isolated from the input stage by a dielectric. The resonant coupler can be configured to filter the input RF signal and transmit an output RF signal in response to the input RF signal. The galvanic isolator can further include an output stage electrically isolated from the resonant coupler by the dielectric. The output stage can be configured to provide an output modulated signal in response to receiving the output RF signal.

Abstract: A method for disparity cost computation for a stereoscopic image is provided that includes computing path matching costs for external paths of at least some boundary pixels of a tile of a base image of the stereoscopic image, wherein a boundary pixel is a pixel at a boundary between the tile and a neighboring tile in the base image, storing the path matching costs for the external paths, computing path matching costs for pixels in the tile, wherein the stored path matching costs for the external paths of the boundary pixels are used in computing some of the path matching costs of some of the pixels in the tile, and computing aggregated disparity costs for the pixels in the tile, wherein the path matching costs computed for each pixel are used to compute the aggregated disparity costs for the pixel.

Abstract: Systems and methods for radiation-tolerant overcurrent detection are disclosed. In some embodiments, an integrated circuit may include a plurality of overcurrent detectors, each of the plurality of overcurrent detectors configured to detect a candidate overcurrent event. The integrated circuit may also include a voting circuit coupled to the overcurrent detectors, the voting circuit configured to indicate an overcurrent in response to receiving a selected number of candidate overcurrent events from the overcurrent detectors. At least one of the overcurrent detectors may be subject to detecting the candidate overcurrent in error, at least in part, due to exposure to ionizing radiation.

Abstract: In at least some embodiments, an apparatus includes a hardware accelerator subsystem with a pipeline. The hardware accelerator subsystem is configured to perform error recovery operations in response to a bit stream error. The error recovery operations comprise a pipe-down process to completely decode a data block that is already in the pipeline, an overwrite process to overwrite commands in the hardware accelerator subsystem with null operations (NOPs) once the pipe-down process is complete, and a pipe-up process to restart decoding operations of the pipeline at a next synchronization point.

Abstract: A system and method for providing wireless communications between a medical controller hub and an implant node are disclosed. The hub transmits signals to facilitate communication connections with the node. The signals include connection invitation polls with identification parameters. A node monitors the hub's transmissions for the connection invitation polls. When a poll is detected, the node compares the identification parameters to a list of preferred identification values. If the received identification parameter is on the preferred list, and the node and hub are not already connected, then the node responds to the connection invitation poll. If the received identification parameter is not on the preferred list, then the node continues to monitor hub transmissions for other connection invitation polls that include identification parameters that are on the preferred list.

Abstract: An electronic assembly includes a copper pillar attach substrate that has a dielectric layer and a solder resist layer overlying the dielectric layer. The solder resist layer has a plurality of solder resist openings. A plurality of parallel traces are formed on the dielectric layer. Each trace has a first end portion, a second end portion and an intermediate portion. The first and second end portions of each trace are covered by the solder resist layer and the intermediate portions are positioned in the solder resist openings. Each of the intermediate portions has at least one conductive coating layer on it and has a height measured from the dielectric layer to the top of the topmost conductive coating layer that is at least as great as the solder resist layer thickness.

Abstract: A DC-DC converter, having an input voltage and an output voltage, includes an inductor and a switch switching the input voltage to an input side of the inductor, where a feedback path controlling initiation of closing the switch includes capacitive coupling of the voltage at the input side of the inductor.

Abstract: Methods for processing of video sequences that may contain telecined (3:2 pull down) frame sequences are provided. A method for detecting 3:2 pull down is provided that measures vertical detail in frames of a video sequence and uses the variation in vertical detail over time to decide whether the video sequence contains normal interlace content or 3:2 pull down content. A method for improving the compression of detected 3:2 pull down content is also provided that controls the selection of field or frame coding mode for frames of 3:2 pull down content and the selection of reference fields for encoding duplicated fields in the 3:2 pull down content.

Abstract: A circuit includes an input that receives a current that increases as a tunneling current sensor moves closer to a media. A high gain path is operatively coupled to the input to amplify the received current as a first amplified output. The first amplified output increases until a saturation threshold is attained for the high gain path. Further increases in the received current beyond the saturation threshold are diverted from the input as an overflow current. A low gain path is operatively coupled to the input to amplify the overflow current as a second amplified output. The second amplified output increases with the overflow current as the tunneling current sensor continues to move closer to the media.

Abstract: A process and apparatus provide a JTAG TAP controller (302) to access a JTAG TAP domain (106) of a device using a reduced pin count, high speed DDR interface (202). The access is accomplished by combining the separate TDI and TMS signals from the TAP controller into a single signal and communicating the TDI and TMS signals of the single signal on the rising and falling edges of the TCK driving the DDR interface. The TAP domain may be coupled to the TAP controller in a point to point fashion or in an addressable bus fashion. The access to the TAP domain may be used for JTAG based device testing, debugging, programming, or other type of JTAG based operation.

Abstract: Integrated circuits as well as fabrication and operating methods are presented in which user circuitry of the IC is selectively disabled in response to detection of a single event latchup condition in a sensing circuit that is prone to latchup in response to ionic radiation at a specific linear energy transfer level.

Abstract: A method for allocating resources for a scheduling request indicator (SRI) is disclosed. An SRI cycle period for use by user equipment (UE) within a cell is transmitted from a NodeB in a cell to UE within the cell. The NodeB transmits a specific SRI subframe offset and an index value to the particular UE within the cell. The specific SRI subframe offset and the index value enable the UE to determine a unique combination of cyclic shift, RS orthogonal cover, data orthogonal cover, and resource block number for the UE to use as a unique physical resource for an SRI in the physical uplink control channel (PUCCH).

Abstract: A method of separating dies of a singulated wafer is disclosed. The method may include supporting the singulated wafer on a supporting portion of a sheet of dicing tape that has a first ring attached to a first annular portion of the sheet that encompasses the supporting portion. The method may further include radially expanding the supporting portion by relative axial displacement of the supporting portion with respect to the first ring. The method may also include further expanding the supporting portion by radially outward displacement of a support surface that supports at least an annular portion of the sheet. The method may also include attaching a second ring to a second annular portion of the sheet.

Abstract: A method of separating dice of a singulated wafer that is supported on a dicing tape sheet is disclosed. The method may include attaching the dicing tape sheet to a ring frame; relatively raising a portion of the dicing tape sheet supporting the wafer with respect to the ring frame; and attaching support tape to the ring frame and the dicing tape sheet.

Abstract: Power-supply ripple rejection (PSRR) at high frequencies is improved for an LDO voltage regulator with an NMOS pass transistor (MN1). A ripple voltage (Vripple) present on the input voltage causes a ripple current (Iripple) through parasitic gate-drain capacitance of the pass transistor. A small ripple current (Ifraction) proportional to the ripple current (Iripple) is generated and amplified to generate a cancellation current (Icancel). The cancellation current is drawn from the gate of NMOS pass transistor (MN1) to cancel the ripple current so that no net ripple current flows through the finite output impedance of an error amplifier (2), to thereby achieve the PSRR improvement.

Abstract: A method for sample adaptive offset (SAO) filtering of largest coding units (LCUs) of a video frame in an SAO component is provided that includes receiving, by the SAO component, an indication that deblocked pixel blocks of an LCU are available, and applying SAO filtering, by the SAO component, to each pixel block of pixel blocks of an SAO processing area corresponding to the LCU responsive to the indication, wherein pixels of each pixel block of the SAO processing area are filtered in parallel.

Abstract: A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.

Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.

Abstract: An integrated circuit includes isolation capacitors which include a silicon dioxide dielectric layer and a polymer dielectric layer over the layer of silicon dioxide. The silicon dioxide dielectric layer and the polymer dielectric layer extend across the integrated circuit. Top plates of the isolation capacitors have bond pads for wire bonds or bump bonds. Bottom plates of the isolation capacitors are connected to components of the integrated circuit. Other bond pads are connected to components in the integrated circuit through vias through the silicon dioxide dielectric layer and the polymer dielectric layer.