Abstract: A programmable, flexible, vector correlation engine for CDMA mobile and base station chip rate signal processing. A correlator co-processor (CCP) performs the de-spreading tasks for a RAKE receiver, early/late correlations for time tracking, and has provision for coherent accumulation of different lengths. The CCP also performs energy estimation and non-coherent accumulation functions. The CCP can also perform correlation functions required for delay profile estimation, and for search/acquisition functions. The same centralized Data Path is used to perform all these functions; a common controller generates signals into the Data Path in response to tasks initiated by a host processor (e.g., DSP). The tasks written into the CCP are performed effectively in parallel by the CCP Data Path.

Abstract: A variable function calculator utilizes a fixed program memory array such as a programmed read only memory in which a number of programs are stored depending upon the desired functions of the calculator. The calculator also includes a program counter, an instruction register, control decoders, jump-condition circuits, a clock generator, a timing generator, digit and FLAG mask decoders, key input logic, a register and FLAG data storage array, a decimal and FLAG arithmetic logic unit, an output decoder, and a digit scanner which scans both the keyboard and display outputs. Aside from providing basic desk top calculator functions, the read only memory may be programmed so that the system provides metering functions, arithmetic teaching functions, control functions, etc.. A preferred embodiment of the invention is capable of being fabricated as a monolithic integrated semiconductor system utilizing contemporary metal-insulator-semiconductor techniques.

Abstract: A multiple mode switching regulator with a bootstrap technique includes an inductor 20; a high side input switch 22 coupled to a first end of the inductor 20; a low side input switch 24 coupled to the first end of the inductor 20; a high side driver 34 coupled to a control node of the high side input switch 22; a low side driver 36 coupled to a control node of the low side input switch 24; a high side output switch 26 coupled to a second end of the inductor 20; a low side output switch 28 coupled to the second end of the inductor 20; a first bootstrap capacitor 30 coupled between the first end of the inductor 20 and a voltage supply node of the high side driver 34; a second bootstrap capacitor 32 coupled between the second end of the inductor 20 and a voltage supply node of the low side driver 36; and a first diode 40 coupled between the voltage supply node of the high side driver 34 and the voltage supply node of the low side driver 36.

Abstract: The invention includes a method and apparatus for detecting the position of a stationary rotor in a polyphase electric motor. The method includes providing one or more short duration voltage pulses to the motor and determining the rotor position based on measurements of one or more phase voltages. The invention allows identification of a region in which the rotor is positioned, through polarity sensing, whereby the rotor position may be quickly and accurately determined, to allow a stationary electric motor to be properly energized to rotate in a desired direction.

Abstract: The ultra-short channel transistor in a semiconductor substrate includes a gate structure that is formed on the substrate. Side-wall spacers are formed on the side walls of the gate structure as an impurities-diffusive source. Source and drain regions are formed in the substrate. A metal silicide contact is formed on the top surface of the gate structure, and on the surface of the source and drain regions. Extended source and drain regions are formed beneath the side-wall spacers and connect next to the source and drain regions.

Abstract: The regulator circuit with an auxiliary boundary regulator that provides enhanced transient response includes: an upper comparator 24 having a first input coupled to a feedback node and a second input coupled to a first reference voltage node V_HIGH; a lower comparator 26 having a first input coupled to the feedback node and a second input coupled to a second reference voltage node V_LOW; a first switching device 30 having a control node coupled to an output of the upper comparator 24; a second switching device 28 having a control node coupled to an output of the lower comparator 26; an inductor 36 having a first end coupled to the first and second switching devices 28 and 30, and a second end coupled to an output node Vout; and a feedback circuit 32 and 34 coupled between the output node Vout and the feedback node.

Abstract: A work station for a chip bonder, and/or for a wire bonder includes a clampless, porous ceramic vacuum chuck where the substrate under assembly is securely and uniformly held by vacuum applied through many tiny pores distributed across the work surface. Porous ceramic work stations are applicable to a family of packages, or to a substrate outline, and may include one or more chips within the same indexing operation. Reliability and yield of the assembled semiconductor devices is enhanced by avoiding uneven or warped substrates. In addition, the porous ceramic work holder provides a cost effective apparatus by eliminating device specific clamps and work holders, the time required for change-out and set-up.

Abstract: A capacity gauge is provided that measures a selected battery capacity of a plurality of batteries in a multiple battery system. A capacity gauge and a battery current sense resistor reside on the end equipment, while the battery pack contains minimal information associated with the battery pack. Control circuits provide for proper pack selection and pack connection timing, as well as capacity gauge synchronization. Power up/down circuits provide power to control logic, the selection circuits and capacity gauge at power up, power down and battery pack removal. The system is powered by a selected battery pack after the battery pack selection is executed, and the selected battery pack monitored by the capacity gauge.

Abstract: A vertical bipolar transistor is described which utilizes ion implantation steps which are used to form an nMOS field effect device and a pMOS field effect device. The implantation steps form an n-well, a p-well region, a pocket base region and an emitter region which are vertically oriented within a semiconductor substrate. The resulting bipolar device may have a significant relative gain and is constructed with no additional mask steps.

Abstract: A snapshot arbiter system for servicing multiple interrupt requests for a central processing unit (CPU) in a digital processor system, and for providing interrupts to the CPU corresponding to the interrupt requests. The system includes a synchronizer adapted to synchronize interrupt requests to a clock as they are received, and an interrupt masker adapted to receive a set of indicators identifying interrupt requests to be masked and to output active indicators that are a set of active interrupt request values corresponding to received interrupt requests that are not masked. Also included is a priority encoder block adapted to receive a set of priority values for respective interrupt requests and to provide as an output priority indicators that are a set of codes representing the priority values. A snapshot enable block is included, adapted to store enable indictors that are a set of bits representing currently enabled interrupt requests, and output those bits as enable bits.

Abstract: The present invention is a method of reducing latency in transmitting frames of data in a shared access media environment whereby the preamble of the next frame to be transmitted is transmitted while the data portion of the next frame to be transmitted is being retrieved. In another aspect, the early transmission of the preamble of the next frame is started no later than the time it normally takes to fetch and prepare the next frame for transmission less the time it takes to transmit the preamble.

Abstract: Patterns are processed minimizing resources such as memory and/or processing power. According to one aspect, when a pattern object is received with the same identifier as that of an earlier received pattern, a count is maintained reflecting a number of times the earlier pattern is to be used in rendering. When the earlier pattern is used as many times as the count in the rendering operations, the earlier pattern is deleted from the memory. According to another aspect, when two patterns are defined based on the same pattern data, the pattern is stored in a common storage area, and a pointer is maintained to the storage area from both the patterns. According to another aspect, even if a pattern is to be used only in the expanded form while rendering, the pattern is stored in non-expanded form until the time of rendering to minimize memory consumption.

Abstract: A method and system in which a semiconductor wafer having a plurality of dies is inspected through a visual inspection and/or an electrical test. If certain of the dies on the wafer pass the inspection, then windows are mounted or affixed above those certain dies while they are still a part of the wafer.

Abstract: According to one aspect, a printer supports transparency operations by generating mask data at interpretation stage which indicates whether each bit of a page content would be determined by the result of a raster operation or a prior destination value. The mask data can be used to complete quickly rendering of a page image once the rendering starts. Another aspect enables color fills of objects to be performed efficiently. A raster operations engine may determine whether all the points (pixels) of the object would have the same value if the raster operation is performed. If all pixels would have the same value, the value for only one pixel is computed and used for multiple pixels of the object. According to another aspect, when a pattern is to be tiled on an entire image portion, the pattern data is stored in a memory and provided as an input to rendering operation multiple times.

Abstract: In one embodiment of the present invention, a semiconductor device within an integrated circuit includes an active region associated with a contact structure of the semiconductor device. The semiconductor device also includes a conductive layer providing electrical conductivity between the contact structure of the semiconductor device and one or more other semiconductor devices within the integrated circuit. The semiconductor device also includes a number of carbon nanotubes connected to the active region at first ends of the carbon nanotubes, connected to the conductive layer at second ends of the carbon nanotubes, and extending within a via of the contact structure from the active region to the conductive layer to provide electrical conductivity between the active region and the conductive layer.

Abstract: An improved window frame and window piece for a micromirror assembly is disclosed herein. The window frame includes a stress-relieving contour positioned in the middle of the frame that can absorb the mechanical stresses applied to the window frame from the ceramic base and from the window piece. The window frame may be comprised of a single piece of sheet metal that has been stamped to include a stress-relieving contour. The stress-relieving contour may be comprised of a variety of shapes, including a “U” shape, an inverted “U” shape, a curved step shape, or other combinations thereof.

Abstract: A method of performing color space conversion and under color removal. Pixelated data is first resampled (102) to an efficient word size—typically 8-bits wide. The RGB color format data words are then subtracted from a maximum intensity to yield CMY color format data words. The minimum value of the three intensity words for each pixel is determined and used as an initial black value. A scaled version of the initial black value is then subtracted from each of the four CMYK intensity words (104). The resulting CMYK values are then limited to a range bounded by the maximum and minimum producible intensities for each color.

Abstract: A temperature stabilized optical mirror is disclosed. A rotatable mirror for switching optical light signals between optical fibers is mounted on a support structure. One or more PTC (Positional Temperature Coefficient) resistors are mounted to the support structure to provide heat to the combination support structure and mirror so as to maintain the mirror and support structure above a lower limit of a selected temperature range. The PTC resistor is selected to have a switching temperature substantially equal to the lower limit of the select temperature range.

Abstract: A vertical bipolar transistor is described which utilizes ion implantation steps which are used to form an nMOS field effect device and a pMOS field effect device. The implantation steps form an n-well, a channel stop p-well region and emitter region which are vertically oriented within a semiconductor substrate. The resulting bipolar device is junction isolated from other circuits formed on the substrate by a p-well region.

Abstract: A method of improving the battery charge measurement range in a sigma delta converter associated with portable applications such as a cell phone is implemented by interruption of the sigma delta modulator measurement process and changing its reference voltage and measurement time to allow an integrated current to occur over a wider dynamic range.