Abstract: An integrated circuit (100) includes functional input and output signal leads (101,111), input and output circuits (102,112) connected to the functional input and output signal leads, core circuitry (120, 122, 124), and interconnect wires and circuits (103) connecting the input and output circuits and the core circuitry. The integrated circuit further includes an addressable test port (105, 115, 135) for each core circuitry. Each test port is connected to its respective core circuitry and to the interconnect wires and circuits. External test signal leads (106) connected to each test port.

Abstract: A microelectromechanical switch includes a substrate, an insulator layer disposed outwardly from the substrate, and an electrode disposed outwardly from the insulator layer. The switch also includes a dielectric layer disposed outwardly from the insulator layer and the electrode, the dielectric layer having a dielectric constant of greater than or equal to twenty. The switch also includes a membrane layer disposed outwardly from the dielectric layer, the membrane layer overlying a support layer, the support layer operable to space the membrane layer outwardly from the dielectric layer.

Abstract: A T-network containing three impedances is provided between two terminating ends connected to a non-fixed voltage level. Two impedances are connected in series between the two terminating ends. A third impedance is connected between the junction of the first two impedances and a fixed voltage. Switches may be used to trim the third impedance, thus obtaining a desired voltage between the two terminating ends. A terminal of any switches used for trimming can be connected to the fixed voltage node, thereby ensuring that the impedance introduced by the switches does not change substantially during different operating situations.

Abstract: A calibrated digital-to-analog converter (DAC) (15′) has a main DAC (17) having a digital input and an analog output. An on-chip memory (21) stores measured INL values of the main DAC at a few selected input codes, and digital interpolation (50,17) is used to approximate INL error values at all input codes (14 . . . 14VI). To cancel the INL errors of the main DAC, outputs of this digital interpolation are sent to a calibration DAC (19), which has an analog output subtracted from the analog output of the main DAC. This subtraction can also be done in the digital domain, removing the need for a calibration-DAC when a main DAC with higher bit-count is designed.

Abstract: An optical unit (20, 30) for color projection display system that has three SLMs (21, 31) and three projection lenses (27, 37). Each SLM (21, 31) receives light of a different primary color, which it modulates to form images for that color. Each SLM (21, 31) and its associated projection lens (27, 37) provides a “channel” for that color of the final image, with the channels being converged out of the projection lenses (27, 37) to the viewing screen.

Abstract: A method of implementing a digital filter utilizes a fast and accurate reciprocal estimate function to generate and recharacterize the digital filter on the fly. The reciprocal estimate function operates to synthesize a digital filter rapidly and efficiently without the necessity for trigonometric and/or division capabilities, thereby preserving integrated circuit real-estate.

Abstract: A first and second phase-locked loop each having their frequency of operation under programmable control by changing the divider ratio. A single programming word contains the divider ratio for the first phase-locked loop and addressing bits which address a plurality of auxiliary registers for changing the divider ratio of the second phase-locked loop. In a cellular telephone, this allows the digital signal processor to change from receive to transmit mode or from one transmit mode or from one frequency to another utilizing a single command word.

Abstract: A system and method for reliably managing a Flash ROM memory resource while preserving the integrity of the data held in the memory in spite of power outages that can occur during memory compressing operations. The memory management system uses three memory status registers to track the status to each page in the memory being managed. Two of the memory status registers give non-volatile memory and one is always determined to be the active memory status register. The third memory status register is located in RAM and used as a scratchpad. If the memory management routine determines the memory needs to be cleaned or compressed, the RAM memory status register is initialized and a swap segment is cleared. Valid pages are copied into the swap segment. After all of the valid pages from one application segment have been copied to the swap segment, the RAM memory status register is copied to a new valid non-volatile memory status register and the other non-volatile memory status register is erased at this time.

Abstract: A differential pulse transformer having a drive coil (10a) and differential sense coils (10b) are disposed on a planar surface with a target (10e, 10f) movable over the sense coils to cause an imbalance in magnetic field when a large di/dt pulse is generated in the drive coil. A detection circuit senses the imbalance and provides a digital output accurately identifying the position of the target. Coil and target embodiments include relatively small secondary coils and relatively long targets (10b, 10e/10f; 12b, 12e/12f and 14b) and relatively large secondary coils and short targets (16b, 16c; 18b, 18c; 20b and 22b).

Abstract: A circuit for removing a spurious component contained in the output signal in the locked state of a PLL circuit in a fractional frequency division system. For frequency synthesizer 1 in this invention, there is a period in which the current sunk by charge pump circuit 35 and the current output from it are different from each other, and the ON start time of the upper operation transistor on the source side is different from that of the lower operation transistor on the sink side. Consequently, the output signal of charge pump circuit 35 is free of the error component generated in the prior art due to that fact that the ON start times of the upper operation transistor and lower operation transistor are close to each other and the operation transistor that turns ON earlier affects the other operation transistor. Consequently, when a compensating current from compensating circuit 37 is superimposed on the output signal, it is possible to eliminate the ripple current completely.

Abstract: According to one embodiment of the present invention, a system (100) for measuring overall jitter is disclosed that includes a data converter (102) that measures a signal to generate a first measurement set (212) and a second measurement set (214), which are used to compute overall jitter. According to one embodiment of the present invention, a method for measuring overall jitter is disclosed. The data converter (102) generates the first measurement set (212) and the second measurement set (214) by measuring the signal. The overall jitter is computed using the measurement sets (212 and 214). According to one embodiment of the present invention, a system (400) for measuring internal jitter is disclosed that includes a splitter (404) that splits a signal into an input signal (406) and a clock signal (410). The data converter (102) measures the input signal (406) to generate a first data set and a second data set, which are used to compute the internal jitter of the data converter (102).

Abstract: A data communication system that provides different types of service (e.g., telephone services and high-speed data transmission services) to a remote site even when the remote site lacks a splitter is disclosed. A central site (e.g., central office) is able to communicate with at least two different types of remote sites. One type of remote site includes a full splitter (i.e., both low-pass and high-pass filters), and the other type of remote site has only a partial splitter (i.e., includes high-pass filter but lacks a low-pass filter). Although conventionally the transceivers (e.g., ADSL transceivers) at these remote sites would be of the same design and use the same modulation technique for upstream as for downstream transmissions, here the remote site that lacks a low-pass filter (i.e., partial splitter type remote site) uses a different modulation technique for upstream transmissions.

Abstract: A capacitively compensated voltage regulator, adapted to be supplied with power from a voltage supply, and having an input port and an output port. The voltage regulator includes a voltage regulation circuit responsive to a reference voltage at the input port to provide a regulated voltage at the output port, including a compensation capacitor having a plate connected to a node internal to the voltage regulator, and including a current source coupled between the voltage supply and the internal node. The voltage regulator also includes a low power control circuit responsive to a low power command signal.

Abstract: A current sensor and a method for measuring currents on an integrated circuit in an isolated manner. The current sensor uses a Peltier device as a thermal difference generator to generate a first temperature at a temperature generating junction and a second temperature at a second temperature generating junction. The two temperature generating junctions being spaced apart from one another and where the temperature difference between the first and second temperatures is a function of the sampled current. A Seebeck transducer operating as a thermal difference sensor has a first temperature sensing junction thermally coupled to the first temperature generating junction and a second temperature sensing junction thermally coupled to the second temperature generating junction.

Abstract: The standby power consumption of storage or memory cells is improved by ramping the wordline voltage down at a rate slow enough to allow the addressed storage cell to reach a more stable voltage before reading. The voltage change applied to the wordline can be staged through a series of intermediate voltages.

Abstract: N2O is used as the oxidant for forming an ultra-thin oxide (14). The low oxidation efficiency of N2O compared to O2 allows the oxidation temperature to be raised to greater than 850° C. while maintaining the growth rate. A cold wall lamp heater rapid thermal process (RTP) tool limits reaction to the surface of the wafer (10). Hydrogen is preferably added to improve the electrical properties of the oxide (14).

Abstract: An improved circuit and technique are provided that facilitate residual offset correction during chopper stabilization of an amplifier circuit. A chopper stabilized amplifier can be configured with an additional gain stage configured between input and following stages of the amplifier. Instead of a second switching block being configured on the output of the input stage, the second switching block is coupled to the output of the additional gain stage. As a result, the offset voltage of the additional gain stage appears across the output of the input stage in the same polarity during chopper stabilization. Thus, the offset voltage that appears across the output of the input stage remains constant at the end of each of the chopping phases. Accordingly, any residual offset voltage, for example that due to changes in voltage across parasitic capacitances on the output of the input stage, can be eliminated.

Abstract: Electrostatic discharge (ESD) protection structures utilizing bipolar conduction are disclosed. The structures each include a parasitic p-n-p bipolar transistor (102); some of the disclosed embodiments include this transistor within a silicon-controlled-rectifier (SCR) type of ESD protection structure. A p+ doped region (116, 216, 316, 416, 516) is disposed at a surface of an n-well (112, 212, 312, 412, 512) overlying a location (115, 215, 315, 415, 515) that receives both the n-well (112, 212, 312, 412, 512) implants and also the p-well (213, 313, 413, 513) implants. Preferably, the well implants are designed to provide retrograde doping profiles. The number of net impurities is reduced, and thus the base Gummel number is lowered, at the compensated well portion (112′, 212′, 312′, 412′, 512′), resulting in improved gain for the vertical bipolar device.

Abstract: A packaged micromirror assembly (21, 21′) is disclosed. The assembly (21, 21′) includes a mirror element (41) having a mirror surface (29) that can rotate in two axes. Magnets (53) are attached to the mirror element (41), to permit rotation of the mirror surface (29) responsive to the energizing of coil drivers (36). A sensor (63, 80) is disposed under the mirror surface (29) to detect mirror orientation. In one aspect of the invention, the sensor (63) includes a light source such as an LED (68) that imparts light through an aperture (66) at the underside of the mirror surface (29). Light detectors (65) are arranged at varying angles, and detect relative intensity of light reflected from the underside of the mirror surface (29), from which the rotational position of the mirror (29) can be derived.

Abstract: The present invention provides an apparatus and system (300) supplying a regulated voltage of sufficient magnitude to enable de-latching of a head carriage from a latching device. In at least one embodiment, providing a voltage source for the voice coil motor (14) includes a regulator (310) having an input for receiving a first voltage potential and operably configured to provide a second voltage potential to an output selectively coupled to the voice coil motor (14) by a switch (345). A current source (315) is operably configured to provide a predetermined limited current via a pass transistor (325) associated with the regulator is also included. Further included is a capacitor (335) coupled to the regulator output and operably configured for charging by the current source via the current limited pass transistor.