Abstract: An integrated circuit structure and method of making the same is disclosed, in which the adhesion of copper conductors (12, 22) to a low-dielectric constant insulating layer (10, 16) is improved. During the fabrication of the structure, exposed surfaces of the low-k insulating layers (10, 16), including the surfaces of these layers within contact, via, or trench openings, are exposed to nitrogen gas, preferably in a sputtering chamber. An optional plasma treatment of the insulating layers (10, 16) in the presence of nitrogen gas may also be performed. As a result, the surface portions of the insulating layers (10, 16) is made to be nitrogen-rich. A liner layer (8, 21) is then formed by reactive sputtering of tantalum nitride over the nitrogen-rich surfaces of the insulating layers (10, 16), followed by the sputtering of tantalum. Copper electrodes (12, 22) are then deposited into the openings in the corresponding insulating layers (10, 16) with improved adhesion resulting.

Abstract: A method for measuring a capacitance of a device under test is provided that includes selectively charging and discharging a first conductor with a first set of p and n element-pairs in response to a voltage potential applied to the first set of p and n element-pairs. The method further includes selectively charging and discharging a second conductor with a second set of p and n element-pairs in response to a voltage potential applied to the second set of p and n element-pairs. Currents are measured at drains associated with the first set of p element-pairs as the first and second conductors charge and discharge such that a capacitance associated with the first conductor may be determined that is based on the drain currents.

Abstract: The present application describes a system and method for selecting the best modulation sequence for an image (e.g., video, graphics or the like) on a frame-by-frame basis to optimize the system contrast ratio, brightness and black level based on a histogram of pixels in each frame. Embodiments described in this application include Pulse-Width Modulation (PWM) display systems such as DMD™. In an embodiment, the present invention uses the histogram of pixels in each frame of an image to select alternate color sequences for each frame of the image wherein the alternative color sequence includes reduced number of bits for color representations than the original color sequence.

Abstract: A method is provided of correlating integrated circuit NBTI-induced performance degradation to discrete transistor NBTI-induced performance degradation and using that correlation to estimate integrated circuit degradation over time using test results based on a discrete transistor. Because discrete transistors are easier and cheaper to test, the technique described herein makes it easier, faster and cheaper to estimate the degradation of an integrated circuit over time than testing the integrated circuit itself.

Abstract: Methods and apparatus for optimizing wireless communications channels by employing multi-channel modulation techniques in wireless communication systems is disclosed. The wireless communications channel may comprise tones, and data may be allocated differently among the different tones according to the channel characterization measurements. In one embodiment, a method may include: transmitting data over a wireless channel using a first station (e.g., an access point), receiving the data using a second station, performing calculations on the received data, and allocating subsequent data transmissions among the tones according to the calculations. Other embodiments may utilize superfluous data transmissions—for example, data coming from the access point that is intended for other stations—in order to calculate channel characterization. Preferably, any portion of the transmitted data (e.g., preamble, header, data, etc.) may be used to calculate channel characterization.

Abstract: Multiple fuse circuits are used associated with a corresponding number of bits forming a desired value which may need to be stored in a non-volatile storage. Assuming the desired value contains a first count number of zeros and a second count number of ones, the fuse circuits at bit positions having values equaling the logical value with smaller count are blown. If the blown fuse circuits generate the logical value associated with larger one of the two counts, the outputs of all the fuse circuits are inverted. Thus, a desired value can be always generated while reducing the number of fuse circuits blown.

Abstract: A method for processing data using a multiplexing architecture is provided that includes performing a selected one of a plurality of first multiplexer operations on the data such that a first output is produced. The method also includes performing a selected one of a plurality of second multiplexer operations on the first output such that a second output is produced. A result is then generated that reflects the first and second outputs produced by first and second multiplexers respectively.

Abstract: A low-cost header for connecting an electronic components board to a circuit board is disclosed, consisting of side walls made of an unwarpable plastic material and joined together to form a frame around an area substantially the same as the area of the components board. A plurality of metal pins are located in the frame, each having one end extending from said frame such that these ends can be soldered to the components board concurrently with the solder attachment of the components to the board. The other ends of the pins can be formed so that they are adjusted for either through-hole attachment to circuit boards, or for surface mounting.

Abstract: A delayed adaptive least-mean-square (LMS) filter, which has one filter coefficient per tap and acquires a new data sample each frame, calculates a finite impulse response (FIR) filter output and updates the filter coefficients using an error term based on the FIR filter output calculated during the preceding frame. The calculations for each tap are performed in a single clock cycle. The filter can be implemented using a general purpose, programmable digital signal processor (DSP) architecture having two multiply and accumulate circuits (MACs), with or without an arithmetic logic unit (ALU), and preferably implements its memory buffers as dual-access or dual-port RAM or banked memory.

Abstract: A digital signal system (10, 100) for determining an approximate reciprocal of a value of x. The system includes an input (12) for receiving a signal, and circuitry (18) for measuring an attribute of the signal. The measured attribute relates at least in part to the value of x. The system further includes circuitry (104) for identifying a bounded region within which x falls. The bounded region is one of a plurality of bounded regions, and each bounded region has a corresponding slope value and first and second endpoints. The system further includes circuitry (106, 108, 110) for determining the approximate reciprocal by adjusting a reciprocal value at one of the first and second endpoints by a measure equal to a distance of the value of x from the one of the first and second endpoints times the slope value corresponding to the bounded region within which x is identified as falling.

Abstract: A preamplifier that is substantially resilient to temperature and input common-mode variations includes a feedback network coupled to regulate a common mode voltage of the preamplifier. The preamplifier can be implemented as a first stage of a multi-stage op amp, which provides an intermediate output to a next stage of the op amp. The feedback and associated temperature stability can be facilitated by downshifting the output voltage of the preamplifier and increasing the output impedance of the preamplifier.

Abstract: A projection device includes one or more deformable mirror arrays (803) arranged to spatially modulate incident light. A totally internally reflecting surface (809) is arranged to direct light to and from the deformable mirror array (803). The device may include one or more dichroic layers (805) arranged such that the light incident on each dichroic layer (805) is substantially normal incidence to the layer.

Abstract: A method for processing a partially fabricated semiconductor wafer having a layer of nichrome resistor material patterned to form a plurality of nichrome resistors on a surface of the wafer includes performing a wet pre-metallization cleaning step on the wafer surface, performing an RF argon plasma sputter etching process on the wafer surface, advancing the wafer into a second reactor without breaking a vacuum in either reactor, depositing a layer of metal on the surface, patterning the metal to form a predetermined metal interconnection pattern thereof, performing a stabilization bake cycles on the wafer, measuring the TCR of the nichrome resistor material, and rejecting the wafer if the measured TCR is greater than a predetermined value.

Abstract: A method of mapping diagonal rows and columns of two-dimensional grid elements to rectangular rows and columns of two-dimensional grid elements. The method is of particular use with a spatial light modulator in optical equalization application.

Abstract: A delayed adaptive least-mean-square (LMS) filter, which has one filter coefficient per tap and acquires a new data sample each frame, calculates a finite impulse response (FIR) filter output and updates the filter coefficients using an error term based on the FIR filter output calculated during the preceding frame. The calculations for each tap are performed in a single clock cycle. The filter can be implemented using a general purpose, programmable digital signal processor (DSP) architecture having two multiply and accumulate circuits (MACs), with or without an arithmetic logic unit (ALU), and preferably implements its memory buffers as dual-access or dual-port RAM or banked memory.

Abstract: A drop-in environmental control material carrier assembly 55, which improves the performance and lowers the cost of semiconductor packages. The environmental control materials are positioned inside the package cavity by means of a drop-in environmental control material carrier assembly 54, which can hold up to eight materials. Three types of environmental control materials are typically used in micromirror packages: (1) one for absorbing moisture inside the package, (2) one for absorbing adhesive outgassing constituents inside the package, and (3) one for storing the PFDA lubricant used to prevent the micromirror mirrors from sticking. The performance and lifetime of the micromirror devices are improved and the cost of projection display systems, in which these micromirrors are central components, is lowered.

Abstract: A control circuit generates a current that remains substantially constant over temperature using a bandgap reference for providing a PTAT current. A first current mirror generates a current proportional to the PTAT current. A novel complementary to absolute temperature (CTAT) current source provides a CTAT current void of bipolar transistor base current, regardless of whether it is implemented in a CMOS digital process or not. It includes a first bias current source that connects to a first resistive circuit and a first subcircuit portion. The first subcircuit portion, including a first bipolar transistor, generates a current proportional to the base emitter voltage of the first bipolar transistor and the base current of the first bipolar transistor. A second bias current source connects to a second resistive circuit and a second subcircuit portion. The second subcircuit portion, including a second bipolar transistor, generates a current proportional to the base current of the second bipolar transistor.

Abstract: A method of processing data comprises the receiving a frame of data having a predetermined number of time slots (502,504,506). Each time slot comprises a respective plurality of data symbols (520). The method further comprises a primary (508), a secondary (510) and a tertiary (512) synchronization code in each said predetermined number of time slots.

Abstract: This invention enables a program controlled cache state operation on a program designated address range. The program controlled cache state operation could be writeback of data cached from the program designated address range to a higher level memory or such writeback and invalidation of data cached from the program designated address range. A cache operation unit includes a base address register and a word count register loadable by the central processing unit. The program designated address range is from a base address for a number of words of the word count register. In the preferred embodiment the program controlled cache state operation begins upon loading the word count register. The cache operation unit may operate on fractional cache entries by handling misaligned first and last cycles. Alternatively, The cache operation unit may operate only on whole cache entries. The base address register increments and the word count register decrements until when the word count reaches zero.

Abstract: A method of communicating data across a channel that experiences near-end cross talk (NEXT) interference and far-end cross talk (FEXT) interference in alternate intervals. In one embodiment, the method comprises: a) determining NF, the number of bits per symbol usable in a FEXT-only mode of operation; b) determining NS, a number of bits per symbol usable in a single mode of operation; c) determining whether the FEXT-only mode or the single mode provides a higher data rate; and d) configuring a modem to transmit using the mode having a higher data rate. The FEXT-only mode may be determined to have a higher data rate when 126NF>340NS.