Patents Assigned to Texas Instruments
  • Quad state logic design methods, circuits, and systems
    Patent number: 6636076
    Abstract: Quad-state logic elements and quad-state memory elements are used to reduce the wiring density of integrated circuits. The resulting reduction in wiring interconnects between memories and logic elements results in higher speed, higher density, and lower power integrated circuit designs.
    Type: Grant
    Filed: January 22, 2001
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Lee D. Whetsel
  • Decimated digital phase-locked loop for high-speed implementation
    Patent number: 6636120
    Abstract: A phase lock loop to control phase error from a first input signal and a second input signal including a phase error detector to detect a phase error signal between the first input signal and the second input signal at a predetermined rate, a down-sampling circuit to down-sample the phase error signal and to output a down-sampled signal at a reduced rate with respect to the predetermined rate, a loop filter to filter the down-sampled signal to obtain a filtered signal, and an up-sampling circuit to up-sample the filtered signal at the predetermined rate.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Bhavesh G. Bhakta, Younggyun Kim
  • Increased bit rate of telephony modems using controlled intersymbol interface
    Patent number: 6636560
    Abstract: The operation of a line card in the local exchange of a point-to-point switched telephone network is modified to increase the data rate of voiceband modem transmission by increasing the sampling rate and providing controlled intersymbol interference using partial response techniques.
    Type: Grant
    Filed: January 20, 1999
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Alan Gatherer
  • Sample and hold circuit
    Patent number: 6636084
    Abstract: A sample and hold circuit includes an operational amplifier and a plurality of switched capacitors, the switched capacitors introducing a closed loop gain of one-half for the operational amplifier.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Maher M. Sarraj
  • Deep trench isolation for reducing soft errors in integrated circuits
    Patent number: 6635551
    Abstract: An integrated circuit having improved soft error protection and a method improving the soft error protection of an integrated circuit are disclosed. The integrated circuit comprises a substrate 72, a transistor formed in the substrate 72, a first region 74 (e.g. a well) formed in the substrate having a first conductivity type, a second region 84 below the first region 74 having a second conductivity type, and a trench formed in the substrate having a depth at least substantially as deep as the well. The trench 70 is filled with a non-conductive material 71 that forms a frame around the transistor, whereby soft errors due to electron-hole pairs caused by ionizing radiation in the frame are substantially eliminated.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Thomas J. Aton
  • Two pass process for producing a fine pitch lead frame by etching
    Patent number: 6635407
    Abstract: A method of fabricating a lead frame. The method includes providing an electrically conductive layer having a pair of opposing major surfaces. A pattern is etched in the layer extending partially through the layer to form cavities with sidewalls in the layer. A patterned mask is provided on the etched layer including masking of the sidewalls. The layer is again etched within the cavities. The patterned mask is preferably a liquid photo resist and the electrically conductive layer is preferably one of a copper or copper-based material or ALLOY 42. The etch can take place from both major surfaces.
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Gijsbert W. Lokhorst, Robert M. Fritzsche, Ronald B. Wheelock
  • Method and system for decoding a compressed data file
    Patent number: 6636832
    Abstract: A data file having a plurality of frames is received, with each frame having a syncword located at a first predefined length from a known data value that is inconsistent with a data pattern of the syncword. A data string including a plurality of potential syncwords is identified. A first portion of the data string in excess of a second predefined length is skipped from syncword verification processing. The second predefined length includes the first predefined length plus the length of the syncword. A second remaining portion of the data string is processed for syncword verification.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Hsiao Yi Li
  • Automatic frequency control system with improved argument approximation
    Patent number: 6636571
    Abstract: An argument approximation method is used to estimate the frequency offset for an automatic frequency control (AFC) circuit. An angle of rotation can be calculated as arctan(Q/I), where Q is the imaginary component of the rotation and I is the real component of the angle. Rather than use the arctangent calculation, which is resource intensive, to calculate the angle of rotation, the angle of rotation is calculated as the sine of the angle of rotation, which is easily calculated from Q and I, and the sine approximation is offset by a correction factor of 1−cos (&thgr;) in order to reduce approximation errors.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Shigenori Kinjo
  • Versatile system for forming uniform wafer surfaces
    Patent number: 6635584
    Abstract: A system for fabricating an integrated circuit is disclosed that includes providing a semiconductor substrate (10), and forming a gate oxide layer (12) on an active area on the substrate. A polysilicon gate (14) is formed, on top of the gate oxide, by etching. Etch damage (16) on the substrate surface is repaired by anneal in an inert gas environment—e.g., He, Ne, N2, Ar gas, or combinations thereof.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Zhiqiang Jeff Wu, Mark S. Rodder, Manoj Mehrotra
  • Semiconductor on insulator device architecture and method of construction
    Patent number: 6635550
    Abstract: An SOI architecture is provided that comprises an inner substrate 10 which has a buried conductor layer 12 formed on an outer surface thereof. A bonding layer 14 is used to provide a cohesive bond with a buried insulator layer 18. The semiconductor device layer 20 is formed on the outer surface of buried insulator layer 18. An inductive well 22 can be formed to provide a platform for the formation of inductive devices 34 within an inductive region 26.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Theodore W. Houston
  • Method for low perfluorocarbon compound emission
    Patent number: 6635229
    Abstract: A method of reducing perfluorocarbon emissions wherein a plasma reactor or thermal chamber is provided and a gaseous single halogen-containing perfluorocarbon is entered into the reactor or thermal chamber. The perfluorocarbon is altered in the plasma reactor or thermal chamber to one of a bromine-containing and/or iodine-containing carbon species and expelled from the reactor or thermal chamber. The alteration includes entering into the plasma reactor or thermal chamber a species taken from the class consisting of iodine, bromine, hydrogen iodide, hydrogen bromide, bromocarbon compound and iodocarbon compounds. When the reactor is a thermal chamber, the temperature in the thermal chamber is at least 800° C. and the single halogen-containing species is located in the chamber for from about 1 minute to about 3 minutes.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: October 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Wei W. Lee, Albert H-B Cheng, Qizhi He
  • Efficient rasterizing sub-system for printers
    Publication number: 20030193681
    Abstract: Image content may be generated in high resolution by performing raster operations, and half-toning is then performed on the image content. Due to such a sequence, a substantially consistent image may be generated on different printers irrespective of the degree of half-toning. Another aspect of the present invention enables the computation requirements to be reduced by storing in a temporary buffer the image data (paint, destination, source) used multiple times.
    Type: Application
    Filed: April 10, 2002
    Publication date: October 16, 2003
    Applicant: Texas Instruments Incorporated
    Inventor: Santhosh Trichur Natrajan Kumar
  • Balanced MR head bias technique for magneto-resistive preamplifier operating in a single supply environment
    Publication number: 20030193731
    Abstract: An MR head bias circuit (60) in a preamplifier includes a balanced driving circuit (62,64) for connection to the MR head (12) at respective first (66) and second (68) output nodes and impedance matching elements (72,74) to match an output impedance at each output node (66,68) to each other. The impedance matching elements (72,74) may match an output impedance at each output node (66,68) to make them substantially the same.
    Type: Application
    Filed: April 11, 2002
    Publication date: October 16, 2003
    Applicant: Texas Instruments Incorporated
    Inventor: Davy H. Choi
  • Method and apparatus for using a universal serial bus to provide power to a portable electronic device
    Patent number: 6633932
    Abstract: A method and apparatus for using a universal serial bus “USB” in a computer as a power source for a portable electronic device. In one embodiment of the invention, a computer (26) having an external USB connector (38) is coupled to the external power input connector on a portable electronic device, such as a cellular telephone (14). The computer (26) is coupled to the cellular telephone (14) via a cable having one end connected to a first connector and another end connected to a second connector, the first connector being connected to the USB connector (38) on said computer (26), and the second connector being connected to external power input connector on the portable electronic device. The cable includes electronic circuitry (42, 62) for converting the voltage level supplied by the USB to a voltage level usable by the portable electronic device.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: October 14, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Stephan Bork, Carl Panasik
  • High voltage protection circuit for improved oxide reliability
    Patent number: 6633468
    Abstract: A structure is designed with an external terminal (100) and a reference terminal (130). A first transistor (106) has a current path coupled to the external terminal and has a first control terminal (114). A second transistor (110) has a current path coupled between the current path of the first transistor and the reference terminal and has a second control terminal (126). A bias circuit comprises a third transistor (116) having a first conductivity type and a fourth transistor (124) having a second conductivity type. The third and fourth transistors have respective current paths coupled in series to the reference terminal. The bias circuit is arranged to produce a first voltage at the first control terminal and a second voltage different from the first voltage at the second control terminal.
    Type: Grant
    Filed: July 5, 2000
    Date of Patent: October 14, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Charvaka Duvvury, Bernhard H. Andresen
  • Disposable spacer technology for reduced cost CMOS processing
    Patent number: 6632718
    Abstract: A method of fabricating a CMOS transistor using a silicon germanium disposable spacer (114) for the source/drain implant. After gate etch, silicon germanium disposable spacers (114) are formed. A NMOS resist pattern (116) is formed exposing the NMOS regions (120) and the n-type source/drain implant is performed. The disposable spacers (114) in the NMOS regions are removed and, with the NMOS resist mask (116) still in place, the LDD/MDD implant is performed. The process may then be repeated for the PMOS regions (122).
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: October 14, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Douglas T. Grider, Terence Breedijk
  • Speech recognition front-end feature extraction for noisy speech
    Patent number: 6633842
    Abstract: An estimate of clean speech vector, typically Mel-Frequency Cepstral Coefficient (MFCC) given its noisy observation is provided. The method makes use of two Gaussian mixtures. The first one is trained on clean speech and the second is derived from the first one using some noise samples. The method gives an estimate of a clean speech feature vector as the conditional expectancy of clean speech given an observed noisy vector.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: October 14, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Yifan Gong
  • Sense amplifier-based flip-flop with asynchronous set and reset
    Patent number: 6633188
    Abstract: A flip-flop including a first stage and a second stage. The first stage receives a pair of differential signals to generate a set and reset signal. The complement of the set and reset signal generates output signals Q and {overscore (Q)}′. These signals have rising and falling transistors with the same delays for the Q signal and the {overscore (Q)} signal. The second stage has symmetrical pull-up and pull-down circuits.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: October 14, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Wenyan Jia, Borivoje Nikolic
  • Display system
    Patent number: 6631993
    Abstract: A projecting display system includes a light source (101) which produces light which is spatially modulated by a number of spatial light modulators (105, 107). A splitting means (103) is provided in the light path between the light source (101) and the spatial light modulators (105 and 107) such that the overall luminous flux produceable by the system is not determined by the maximum luminous flux which each spatial light modulators (105, 107) can accommodate.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: October 14, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Raymond G. Fielding
  • Log-spectral compensation of PMC Gaussian mean vectors for noisy speech recognition using log-max assumption
    Patent number: 6633843
    Abstract: Reducing mismatch between HMMs trained with clean speech and speech signals recorded under background noise can be approached by distribution adaptation using parallel model combination (PMC). Accurate PMC has no closed-form expression, therefore simplification assumptions must be made in implementation. Under a new log-max assumption, adaptation formula for log-spectral parameters are presented, both for static and dynamic parameters.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: October 14, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Yifan Gong