Abstract: There is provided a wafer on which a plurality of electronic devices and circuits under test are to be formed, where each circuit under test includes a plurality of transistors under measurement provided in electrically parallel, a selecting section which sequentially selects the respective transistors under measurement, and an output section which sequentially outputs the source voltages of the transistors under measurement sequentially selected by the selecting section.

Abstract: Perpendicular magnetic recording media enabling high-density recording and reproduction of information, as well as a production process thereof, and a magnetic recording and reproducing apparatus, are provided. Perpendicular magnetic recording media, having at least a soft magnetic underlayer and perpendicular magnetic recording layer on a disc-shaped nonmagnetic substrate, in which the soft magnetic underlayer has at least two soft magnetic layers, and Ru or Re between the two soft magnetic layers, are provided; the easy axis of magnetization of the soft magnetic underlayer has a desired direction; the easy axis of magnetization of the soft magnetic underlayer is substantially distributed in a direction except a radial direction of the nonmagnetic substrate, and, the bias magnetic field of the antiferromagnetic coupling in the direction of the easy axis of magnetization of the soft magnetic underlayer is 10 Oersteds (790 A/m) or greater.

Abstract: A method of coloring a surface of a zirconium-based metallic glass component that includes the step of imparting interference colors by carrying out an anodizing process using an alkaline solution to form a film having a thickness of 300 nm or less on the surface of the zirconium-based metallic glass component.

Abstract: It is an object of the present invention to provide a nonvolatile semiconductor memory including memory cells using side walls of island semiconductor layers which avoid lowing of the writing speed and the reading speed.

Abstract: To provide a NOR-type nonvolatile semiconductor memory that can inject electric charge into a charge accumulation layer through the use of an FN tunnel current without compromising an increase in the packing density of memory cells. The above problem is solved by a nonvolatile semiconductor memory in which nonvolatile semiconductor memory cells are arranged in a matrix, each nonvolatile semiconductor memory cell having an island semiconductor layer in which a drain diffusion layer formed in the upper part of the island semiconductor layer, a source diffusion layer formed in the lower part of the island semiconductor layer, a charge accumulation layer formed on a channel region of the side wall sandwiched between the drain diffusion layer and the source diffusion layer via a gate insulation film, and a control gate formed on the charge accumulation layer are formed.

Abstract: A method of coloring a surface of a zirconium-based metallic glass component that includes the step of imparting interference colors by carrying out an anodizing process using an alkaline solution to form a film having a thickness of 300 nm or less on the surface of the zirconium-based metallic glass component.

Abstract: A wiring structure of a semiconductor device or the like includes an interlayer insulating film having a fluorocarbon film formed on an underlayer, and a conductor buried in the interlayer insulating film. The fluorocarbon film contains nitrogen and is low in dielectric constant, excellent in reproducibility and stable.

Abstract: A reporter vector which can evaluate the ability of a drug to induce CYP1A2 or both of CYP1A1 and CYP1A2 and a method for evaluation of the ability of a drug to induce CYP1A2 or both of CYP1A1 and CYP1A2 by using the reporter vector. A reporter system which can evaluate the ability of a drug capable of inducing CYP1A2 or both of CYP1A1 and CYP1A2 is completed by constructing a reporter vector having a reporter gene linked to the 3? end of a region between CYP1A1 and CYP1A2 or a reporter vector having different reporter genes linked to the both ends of the region, respectively, so as to sandwich the region, and a reporter vector having a deletion mutation in the region, and confirming that the expression of a reporter molecule is increased by the drug capable of inducing CYP1A2 or both of CYP1A1 and CYP1A2 in the reporter system using the reporter vector.

Abstract: It is intended to provide a benzoxazole derivative or a pharmaceutically acceptable salt or solvate thereof which is useful in the early diagnosis of a conformation disease; a composition or a kit containing the same for diagnosing a conformation disease; a medical composition for treating and/or preventing a conformation disease; and so on.

Abstract: A metallic glass laminate of the present invention is characterized in that a metallic glass layer of amorphous phase is formed on the substrate surface, and there is no continuous pore (pinhole) through the metallic glass layer. The metallic glass laminate is preferably obtained by solidification and lamination of at least part of the metallic glass powder in the molten state or in the supercooled liquid state on the substrate surface. Because of the dense metallic glass layer of homogenous amorphous phase, the functionalities of metallic glass such as corrosion resistance and wear resistance can be satisfactorily provided. A thick and a large-area metallic glass layer can be formed. The metallic glass layer can also be formed into various shapes within the supercooled liquid temperature range. In addition, a metallic glass bulk can be obtained by removing the substrate.

Abstract: A contact plug structure formed on a contact hole of an insulating layer of a semiconductor device includes a metal silicide layer formed on a bottom part of the contact hole of the insulating layer, a manganese oxide layer formed on the metal silicide layer in the contact hole, and a buried copper formed on the manganese oxide layer which substantially fills the contact hole.

Abstract: A fluid injection device includes: a pulse generation section that includes a fluid chamber whose volume is changeable, and an inlet flow passage and an outlet flow passage that are connected to the fluid chamber; a first connection flow passage connected to the outlet flow passage, having an end portion; a second connection flow passage connected to the inlet flow passage; a fluid injection opening formed at the end portion of the first connection flow passage, having a diameter smaller than the diameter of the outlet flow passage; a connection flow passage tube including the first connection flow passage and having rigidity adequate to transmit pulses of fluid flowing from the fluid chamber to the fluid injection opening; and a pressure generation section that supplies fluid to the inlet flow passage.

Abstract: A method is provided for quantifying a plasma membrane protein present by using a stable-isotope labeled peptide as a probe by mass spectrometry in a simple, quick and accurate manner. A plasma membrane protein is fragmented to prepare an oligopeptide fragment, identified by LC/MS/MS. A subject peptide for quantification is selected if the peptide is obtained by fragmenting with a protease, the peptide is specific to a target molecule, and if the peptide has a high total score value based on selective criteria for hydrophobic amino acids content, sequence conditions, number of amino acid residues, specific amino acid sequence conditions, etc. According to these criteria, a subject peptide fragment that can be ionized by ESI method is selected. By using the subject peptide for and a stable-isotope labeled peptide, the plasma membrane protein is quantified accurately by mass spectrometry.

Abstract: In one embodiment of the present invention, a power IC device is disclosed containing a power MOS transistor with a low ON resistance and a surface channel MOS transistor with a high operation speed. There is also provided a method of manufacturing such a device. A chip has a surface of which the planar direction is not less than ?8° and not more than +8° off a silicon crystal face. The p-channel trench power MOS transistor includes a trench formed vertically from the surface of the chip, a gate region in the trench, an inversion channel region on a side wall of the trench, a source region in a surface layer of the chip, and a drain region in a back surface layer of the chip. The surface channel MOS transistor has an inversion channel region fabricated so that an inversion channel current flows in a direction not less than ?8° and not more than +8° off the silicon crystal direction.

Abstract: A semiconductor device according to this invention is provided with a MOS transistor of at least one type, wherein the MOS transistor has a semiconductor layer (SOI layer) provided on an SOI substrate and a gate electrode provided on the SOI layer and is normally off by setting the thickness of the SOI layer so that the thickness of a depletion layer caused by a work function difference between the gate electrode and the SOI layer becomes greater than that of the SOI layer.

Abstract: A laser oscillator includes a ring resonator. The ring resonator includes an optical circulator having first, second, third, and fourth ports and a first optical amplification fiber connected to the optical circulator. Light incident on the first port is exited from the second port, and light incident on the second port is exited from the third port. The fourth port provides an exciting light and injects the exciting light into the ring resonator through the first port. The first optical amplification fiber amplifies light exited from the third port with the exciting light provided by the fourth port. The laser oscillator also includes an optical member connected to the optical circulator. The optical member reflects at least a part of the light exited from the second port and injects the same into the second port again.

Abstract: A heat equalizer includes a container structure having a heating block in which a working fluid is held for heating and vaporizing a material to be heated, a heater placed at the bottom of the container structure, and a material feed pipe allowing the outside and the inside of the container structure to communicate with each other. In the heating block, as a flow path in which the material to be heated flows, a main header pipe connected to the material feed pipe and extending in the horizontally, and a riser pipe branching from the main header pipe and extending vertically are formed. As a condensation path in which the working fluid is cooled and condensed, condensation holes formed respectively on the opposite sides of the riser pipe and extending horizontally, and a condensation pit formed under the riser pipe are formed. Between the condensation holes and the condensation pit, the main header pipe is placed.

Abstract: Provided is a high-speed, super-low-power-consumption nonvolatile memory with a high thermal stability. A nonvolatile magnetic memory is equipped with high-output tunnel magnetic resistance devices to each of which a free layer with a high thermal stability is applied, while a writing method by spin transfer torque is applied to the memory. The tunnel magnetic resistance device has a free layer including a first ferromagnetic film and the second ferromagnetic film each of which has a body center cubic structure and each of which contains Co, Fe and B. The free layer, additionally, includes a first non-magnetic layer. The tunnel magnetic resistance device has a layered structure formed of the free layer and a pinned layer with a MgO insulating film with a (100) orientation rock-salt structure interposed in between.

Abstract: A working rod with a tip end extending into a vacuum process chamber and moving in the axial direction, two static-pressure gas bearings supporting the rod in the non-contact manner, and an internal moving body of a magnet coupling type driving mechanism driving the rod are housed in a rod housing cylindrical portion leading to the vacuum process chamber, and an exhaust portion by suction is provided at a part of the rod housing cylindrical portion so that the pressure of the rod housing cylindrical portion is lowered than the pressure of the vacuum process chamber by the exhaust from the exhaust portion.

Abstract: A liquid crystal display device including, a pair of substrates, a gate electrode of a thin film transistor (TFT) formed on one of the substrates, and a wiring layer connected to the gate electrode or an electrode of the thin film transistor, wherein at least a part of the gate electrode or a part the wiring layer is formed by a layer structured by a pure copper layer and a Cu—Mn alloy layer including Mn, wherein a concentration of Mn in the Cu—Mn alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of Mn in the copper, and wherein a boundary surface between the Cu—Mn alloy layer and said one of the substrate includes an oxide layer having a Mn oxide layer.