Abstract: A recess is formed by partially etching a silicon carbide substrate. A mask layer is formed on the silicon carbide substrate by means of photolithography using the recess as an alignment mark. An impurity is implanted into the silicon carbide substrate using the mask layer. The silicon carbide substrate is annealed. After the annealing, a first electrode layer is deposited on the silicon carbide substrate. The first electrode layer is patterned by means of photolithography using the recess in the silicon carbide substrate as an alignment mark.

Abstract: Methods for depositing metal layers, and more specifically TaN layers, using CVD and ALD techniques are provided. In one or more embodiments, the method includes sequentially exposing a substrate to a metal precursor, or more specifically a tantalum precursor, followed by a high frequency plasma.

Abstract: A method for forming a semiconductor device is provided including processing a wafer having a spacer layer and a structure layer, the spacer layer is over the structure layer. The method continues including forming a first sidewall spacer from the spacer layer, forming a structure strip from the structure layer below the first sidewall spacer, forming a masking structure over and intersecting the structure strip, and forming a vertical post from the structure strip below the masking structure.

Abstract: An OLED device is disclosed. The device includes a substrate defined to have a first active area and a dummy area. First electrodes are formed on the substrate, and a first bank pattern is formed to overlap with edges of each first electrode and to expose a part of an upper surface of each first electrode. A second bank pattern is formed on the first bank pattern within the first active area, and a third bank pattern is formed on the first bank pattern within the dummy area in the same layer as the second bank pattern. The second bank pattern is formed to have a larger width than that of the third bank pattern. As such, an organic emission layer can be evenly formed in the active area.

Abstract: Provided is a method of manufacturing a semiconductor device, which is capable of increasing the controllability of the concentration of carbon in a film by increasing the yield when a boron carbonitride film or a boron nitride film is formed. The method includes forming a film containing boron, carbon and nitrogen or a film containing boron and nitrogen on the substrate by performing, a predetermined number of times, a cycle including supplying a source gas consisting of boron and a halogen element to a substrate and supplying a reactive gas consisting of carbon, nitrogen and hydrogen to the substrate.

Abstract: A method for the fabrication of thin-film transistors together with micromechanical components, other active electrical components or both on an amorphous or polycrystalline substrate includes disposing the thin-film transistors and the other components on different areas of the substrate.

Abstract: Provided are methods of forming field effect transistors. The method includes preparing a substrate with a first region and a second region, forming fin portions on the first and second regions, each of the fin portions protruding from the substrate and having a first width, forming a first mask pattern to expose the fin portions on the first region and cover the fin portions on the second region, and changing widths of the fin portions provided on the first region.

Abstract: Embodiments of the invention are directed to a transparent up-conversion device having two transparent electrodes. In embodiments of the invention, the up-conversion device comprises a stack of layers proceeding from a transparent substrate including an anode, a hole blocking layer, an IR sensitizing layer, a hole transport layer, a light emitting layer, an electron transport layer, a cathode, and an antireflective layer. In an embodiment of the invention, the up-conversion device includes an IR pass visible blocking layer.

Abstract: Provided is a semiconductor wafer evaluation method of performing an evaluation of electrical characteristics of a semiconductor wafer by bringing mercury into contact with a surface of the semiconductor wafer, the method including using a probe constituted of a fixed electrode having a tip end portion and a transparent covering portion that covers a portion other than the tip end portion of the fixed electrode, the fixed electrode being made of a metal having stronger wettability with respect to the mercury than the semiconductor wafer and the covering portion, and measuring the electrical characteristics by attaching the mercury to the tip end portion of the fixed electrode and then bringing the mercury into contact with the surface of the semiconductor wafer.

Abstract: A method of fabricating a three-dimensional integrated circuit comprises attaching a wafer to a carrier, mounting a plurality of semiconductor dies on top of the wafer to form a wafer stack. The method further comprises forming a molding compound layer on top of the wafer, attaching the wafer stack to a tape frame and dicing the wafer stack to separate the wafer stack into a plurality of individual packages.

Abstract: A gas for an etching process and a treatment process of a metal stacked film in which an insulating layer is interposed between two layers of magnetic materials can be optimized. An etching method of etching a multilayered film including a metal stacked film in which an insulating layer is interposed between a first magnetic layer and a second magnetic layer includes etching the metal stacked film with plasma generated by supplying a gas containing at least C, O, and H into a processing chamber; and treating the metal stacked film with plasma generated by supplying a gas containing at least a CF4 gas into the processing chamber.

Abstract: Provided is an organic light-emitting diode (OLED) display including: a first plastic layer; a first barrier layer formed on the first plastic layer; a first intermediate layer formed on the first barrier layer; a second plastic layer formed on the intermediate layer; an OLED layer formed on the second plastic layer; and a thin-film encapsulation layer encapsulating the OLED layer.

Abstract: Redistribution layers for microfeature workpieces, and associated systems and methods are disclosed. One method for processing a microfeature workpiece system includes positioning a pre-formed redistribution layer as a unit proximate to and spaced apart from a microfeature workpiece having an operable microfeature device. The method can further include attaching the redistribution layer to the microfeature workpiece and electrically coupling the redistribution layer to the operable microfeature device.

Abstract: A capacitor and methods for forming the same are provided. The method includes forming a bottom electrode; treating the bottom electrode in an oxygen-containing environment to convert a top layer of the bottom electrode into a buffer layer; forming an insulating layer on the buffer layer; and forming a top electrode over the insulating layer.

Abstract: An integrated circuit (IC) includes a high-voltage (HV) MOSFET on a substrate. The substrate includes a handle substrate region, an insulating region, and a silicon region. Source region and drain regions, which have a first conductivity type, are disposed in the silicon region and spaced apart from one another. A gate electrode is disposed over an upper region of the silicon region and is arranged between the source and drain regions. A body region, which has a second conductivity type, is arranged under the gate electrode and separates the source and drain regions. A lateral drain extension region, which has the first conductivity type, is disposed in the upper region of the silicon region and extends laterally between the body and drain regions. A breakdown voltage enhancing region, which has the second conductivity type, is disposed in the silicon region under the lateral drain extension region.

Abstract: A method for making an interconnection component is disclosed, including forming a plurality of metal posts extending away from a reference surface. Each post is formed having a pair of opposed end surface and an edge surface extending therebetween. A dielectric layer is formed contacting the edge surfaces and filling spaces between adjacent ones of the posts. The dielectric layer has first and second opposed surfaces adjacent the first and second end surfaces. The dielectric layer has a coefficient of thermal expansion of less than 8 ppm/° C. The interconnection component is completed such that it has no interconnects between the first and second end surfaces of the posts that extend in a lateral direction. First and second pluralities of wettable contacts are adjacent the first and second opposed surfaces. The wettable contacts are usable to bond the interconnection component to a microelectronic element or a circuit panel.

Abstract: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.

Abstract: To provide a temporary bonding adhesive for a semiconductor wafer that reduces damage to a semiconductor wafer, makes it readily detachable, and can shorten the time required for thermal decomposition, and a manufacturing method for a semiconductor device using this. A temporary bonding adhesive for a semiconductor wafer, being a temporary bonding adhesive used for temporarily bonding a semiconductor wafer onto a supporting substrate in order to process a semiconductor wafer, and for detaching a semiconductor wafer from a supporting substrate by heating after processing, containing a resin composition whereof the 50% weight loss temperature decreases after irradiation by active energy rays.

Abstract: An OLED display includes pixels, each including a first light emission region having a first area and a first perimeter and a second light emission region disposed neighboring the first light emission region and having a second area and a second perimeter. The first area, the first perimeter, the second area, and the second perimeter respectively satisfy an equation of A1*P2=A2*P1, where A1 is the first area, P1 is the first perimeter, A2 is the second area, and P2 is the second perimeter.

Abstract: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.