Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate and a gate stack covering a portion of the fin structure. The gate stack includes a work function layer and a gate dielectric layer. The semiconductor device structure also includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the gate dielectric layer, and a lower width of the isolation element is greater than an upper width of the isolation element.

Abstract: A method of manufacturing a semiconductor device includes alternately stacking sacrificial layers and interlayer insulating layers on a substrate, to form a stack structure; forming channels penetrating through the stack structure; forming separation regions penetrating through the stack structure; forming lateral openings by removing the sacrificial layers through the separation regions; and forming gate electrodes in the lateral openings. Forming the gate electrodes may include forming a nucleation layer in the lateral openings by supplying a source gas and a first reaction gas, and forming a bulk layer on the nucleation layer to fill the lateral openings by supplying the source gas and a second reaction gas, different from the first reaction gas. The first reaction gas may be supplied from a first reaction gas source, stored in a gas charging unit, and supplied from the gas charging unit.

Abstract: A manufacturing process and device are provided in which a first opening in formed within a substrate. The first opening is reshaped into a second opening using a second etching process. The second etching process is performed with a radical etch in which neutral ions are utilized. As such, substrate push is reduced.

Abstract: A semiconductor device includes a composite gate structure formed over a semiconductor substrate. The composite gate structure includes a gate dielectric layer, a metal layer, and a semiconductor layer. The metal layer is disposed on the gate dielectric layer. The semiconductor layer is disposed on the gate dielectric layer. The metal layer surrounds the semiconductor layer.

Abstract: An operation method and an electronic device are provided. A proximity detection mode is activated in response to deactivating the display during an execution of a call application. In response to activating the proximity detection mode, a proximity distance of an object is identified based on outputting the light through the light emitting unit and receiving the light through the light receiving unit. If the identified proximity distance is larger than a pre-defined proximity recognition distance, the proximity detection mode is deactivated and the display is activated.

Abstract: A semiconductor light-emitting device comprises a substrate; a first adhesive layer on the substrate; multiple epitaxial units on the first adhesive layer; a second adhesive layer on the multiple epitaxial units; multiple first electrodes between the first adhesive layer and the multiple epitaxial units, and contacting the first adhesive layer and the multiple epitaxial units; and multiple second electrodes between the second adhesive layer and the multiple epitaxial units, and contacting the second adhesive layer and the multiple epitaxial units; wherein the multiple epitaxial units are totally separated.

Abstract: A method for calibration including determining a temperature induced offset in a pedestal of a process module under a temperature condition for a process. The method includes delivering a wafer to the pedestal of the process module by a robot, and detecting an entry offset. The method includes rotating the wafer over the pedestal by an angle. The method includes removing the wafer from the pedestal by the robot and measuring an exit offset. The method includes determining a magnitude and direction of the temperature induced offset using the entry offset and exit offset.

Abstract: A semiconductor device includes a first substrate, a through substrate via, a second substrate, and a bonding structure. The first substrate includes a first dielectric material, and the first dielectric material includes a first conductive pad embedded therein. The through substrate via is formed in the first substrate. The second substrate includes a second dielectric material, the second dielectric material includes a second conductive pad embedded therein, the first dielectric material is different from the second dielectric material, the second conductive pad has a first height, the second dielectric material has a second height, and the first height is less than the second height. The bonding structure is formed between the first substrate and the second substrate, wherein the bonding structure includes the first conductive pad bonded to the second conductive pad and the first dielectric material bonded to the second dielectric material.

Abstract: A display panel and a method for manufacturing the same are provided. According to the present disclosure, one mask is used to form the planarization layer and the pixel defining layer, or to form the planarization layer, the pixel defining layer, and the spacer. Thus, each of the light-emitting units is disposed within the area covered by the anode, and light emitted from the light-emitting unit can be reflected by the anode and be focused. Therefore, the risk where display panel has color mixing problem is decreased, and the intensity of light emitted therefrom is enhanced.

Abstract: A stiffener apparatus for reducing warpage of an integrated circuit package during heating and cooling are provided. The stiffener apparatus includes an IC substrate configured to receive an IC die on a top side of the IC substrate. The stiffener apparatus includes a primary stiffener ring adhered to the top side of the IC substrate and defining an opening in a region of the IC die such that the primary stiffener ring surrounds the region of the IC die. The primary stiffener ring defines a plurality of grooves. The stiffener apparatus includes a secondary stiffener ring having a plurality of catches configured to engage with the plurality of grooves to removably attach the secondary stiffener ring to the primary stiffener ring on a side of the primary stiffener ring opposite the IC substrate. A method of using a stiffener apparatus during a manufacturing operation is also provided.

Abstract: A circuitized substrate for mounting at least one electronic component having a plurality of terminals. The circuitized substrate includes a first portion of electrical insulating material embedding a first electric circuit for coupling a first subset of the terminals. The first electric circuit including one or more patterned conductive layers of electrically conductive material extending parallel to a plane of the circuitized substrate. The circuitized substrate further includes a second portion of electrically conductive material. One or more insulating elements of electrical insulating material cross the second portion transversally to the plane to insulate a plurality of conductive elements thereof for coupling a second subset of the terminals. One or more auxiliary components of the electronic component are mounted on the second portion. Each auxiliary component having a first terminal and a second terminal coupled with a first one and a second one, respectively, of a pair of the conductive elements.

Abstract: A circuitized substrate for mounting at least one electronic component having a plurality of terminals. The circuitized substrate includes a first portion of electrical insulating material embedding a first electric circuit for coupling a first subset of the terminals. The first electric circuit including one or more patterned conductive layers of electrically conductive material extending parallel to a plane of the circuitized substrate. The circuitized substrate further includes a second portion of electrically conductive material. One or more insulating elements of electrical insulating material cross the second portion transversally to the plane to insulate a plurality of conductive elements thereof for coupling a second subset of the terminals. One or more auxiliary components of the electronic component are mounted on the second portion. Each auxiliary component having a first terminal and a second terminal coupled with a first one and a second one, respectively, of a pair of the conductive elements.

Abstract: A laser beam irradiation device includes a light source that emits a laser beam; and a projection lens that irradiates a plurality of different areas of an amorphous silicon thin film attached to a thin-film transistor with the laser beam, wherein the projection lens irradiates the plurality of different areas of the amorphous silicon thin film with the laser beam such that a source electrode and a drain electrode of the thin-film transistor are connected in parallel to each other by a plurality of channel regions.

Abstract: A semiconductor structure with current flow path direction controlling is provided, which comprises a substrate and an epitaxial layer having a first conductivity type on the substrate. A first doped region is on the substrate and the first doped region has the first or a second conductivity type. A second doped region is enclosed by the epitaxial layer and has the second conductivity type. A third doped region is located in the epitaxial layer and between the first and second doping regions, and the third doped region has the second conductivity type. A fourth doped region is enclosed by the third doped region and has the first conductivity type. A fifth doped region is enclosed by the first doped region and the conductivity type is opposite to that of the first doped region.

Abstract: A display device includes a window member and a display module coupled to the window member. The window member includes a first resin layer and a second resin layer. The first resin layer is on the display module and has a first elongation, a first thickness, and a first hardness. The second resin layer is on the display module and the first resin layer and has a second elongation smaller than the first elongation, a second thickness greater than the first thickness, and a second hardness greater than the first hardness.

Abstract: A portable field maintenance tool system for performing a plurality of different functional tasks on one or more equipment assets in a plant includes a handheld base and a plurality of functional modules for attachment to the handheld base. Each functional module, when operatively attached to the handheld base, interacts with computer circuits on the handheld base to perform a pre-defined one or more of the functional tasks. A portable handheld field maintenance tool for performing one or more pre-selected ones of the functional tasks on an equipment asset in a plant is formed by operatively mounting any one of the functional modules to the handheld base.

Abstract: Methods and apparatus are described. An apparatus includes a hexagonal oxide substrate and a III-nitride semiconductor structure adjacent the hexagonal oxide substrate. The III-nitride semiconductor structure includes a light emitting layer between an n-type region and a p-type region. The hexagonal oxide substrate has an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the III-nitride semiconductor structure.

Abstract: A solid-state image sensor includes: a pixel array that includes first pixels, each having first and second photoelectric conversion units, and second pixels, each having third and fourth photoelectric conversion units; first to fourth transfer gates via which a signal charge respectively generated in the first to fourth photoelectric conversion units is respectively transferred to first to fourth charge voltage conversion units. At least one of a gate width, a gate length and an installation position of at least one transfer gate among the first to fourth transfer gates is altered to achieve uniformity in voltage conversion efficiency at the first to fourth charge voltage conversion units.

Abstract: A display device includes a plurality of pixels each including a first light emitting element with a first light reflecting layer, a second light emitting element with a second light reflecting layer, and a third light emitting element with a third light reflecting layer, arranged in a two-dimensional matrix. Each of the light emitting elements includes a first electrode, an organic layer, and a second electrode. Grooves that each have a light shielding layer are formed in a boundary region between the light emitting elements. A bottom of the first groove and a bottom of the third groove are located at a position higher than a top surface of the first light reflecting layer. A bottom of the second groove is located at a position higher than a top surface of the second light reflecting layer.

Abstract: An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active region extending in the first direction and spaced apart from the first fin active region in a second direction different from the first direction; a gate line intersecting the first and second fin active regions; a first source/drain region on one side of the gate line in the first fin active region; and a second source/drain region on one side of the gate line in the second fin active region and facing the first source/drain region, wherein a cross-section of the first source/drain region perpendicular to the first direction has an asymmetric shape with respect to a center line of the first source/drain region in the second direction extending in a third direction perpendicular to the top surface of the substrate.