Patents Examined by Bot L. Ledynh
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Patent number: 5539619Abstract: A branch joint box comprising: a casing which is made of resin and includes a bottom wall; a plurality of connector blocks which are provided on a front face of the bottom wall and each include a plurality of terminals erected from the front face of the bottom wall such that distal ends of the terminals are projected from a rear face of the bottom wall; and a sheetlike flexible printed circuit board which is secured to the rear face of the bottom wall and has a conductive pattern such that the distal ends of the terminals are soldered to the conductive pattern of the flexible printed circuit board.Type: GrantFiled: October 24, 1995Date of Patent: July 23, 1996Assignee: Sumitomo Wiring Systems, Ltd.Inventor: Koji Murakami
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Patent number: 5539620Abstract: In an electronic module two or more circuit packs are included in a housing and are connected to a printed circuit board extending laterally of the circuit packs and also within the housing. The housing is an electromagnetic radiation shield. The printed circuit board has a single connector for connection to a back plane. This structure avoids misalignment and insertion force problems found when two or more packs are housed within a housing and are individually connected to a back plane.Type: GrantFiled: June 16, 1994Date of Patent: July 23, 1996Assignee: Northern Telecom LimitedInventors: Geoffrey N. Gale, Dieter O. Marx
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Patent number: 5537294Abstract: A printed circuit card having a printed circuit board therein with ground contact pads. The printed circuit card is made of a conductive housing in which the printed circuit board resides. At least one ground contact clip is interfaced with both the ground contact pad on the printed circuit board and the conductive housing to complete a ground circuit for the printed circuit board and for protecting the connector against electromagnetic interference and electrostatic discharge. The ground clip further ensures that the printed circuit card has a high ground-to-signal ratio, thereby ensuring good data transmission through the card.Type: GrantFiled: June 1, 1994Date of Patent: July 16, 1996Assignee: The Whitaker CorporationInventor: Paul P. Siwinski
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Patent number: 5532907Abstract: A power bus is described that connects a matrix of power supplies to a circuit board in a computer system. The power bus is substantially planar and attached to the circuit board so that the power bus and circuit board are parallel to one another. This parallel relationship decreases the amount of space utilized by the circuit board in the computer system. The circuit board also has connectors for delivering power directly to a load which increases the efficiency of power delivery.Type: GrantFiled: November 2, 1993Date of Patent: July 2, 1996Assignee: International Business Machines CorporationInventors: John A. Asselta, Albert L. Balan, Stephen Boyko, James E. Myers
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Patent number: 5532906Abstract: A wiring substrate includes a ceramic substrate having a first conductive connection pattern on an lower surface of the ceramic substrate and a second conductive connection pattern on an upper surface or the lower surface of the ceramic substrate, a multilayered wiring portion arranged on the lower surface of the ceramic substrate through the first conductive connection pattern and including an insulating layer made of an organic polymer, on which an integrated circuit and/or a circuit part are/is mounted, and a flexible wiring substrate, connected to the second conductive connection pattern, for connecting the integrated circuit and/or the circuit part to an external circuit.Type: GrantFiled: July 21, 1995Date of Patent: July 2, 1996Assignee: Kabushiki Kaisha ToshibaInventors: Jun Hanari, Takeshi Miyagi, Kazuhiro Matsumoto, Ayako Tohdake, Yoshitaka Fukuoka
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Patent number: 5530618Abstract: A capacitor mounting assembly uses a mounting assembly for mounting and aligning a plurality of DC can capacitors on a bulk power system assembly. The mounting assembly includes a metallic base member with a channel cross section having mounting flanges at the longitudinal edges with holes to allow fasteners to pass through and secure the base member to a power system assembly. A top metallic cover plate and a plastic layer cover the top surface of the base member to form a sandwich construction with the plastic layer between the two metallic surfaces. The plastic layer is a polypropylene sheet in the illustrative embodiment. The three layers have holes punched through the sandwich to accept the insertion of the can capacitors.Type: GrantFiled: September 2, 1994Date of Patent: June 25, 1996Assignee: AT&T Corp.Inventors: Mark A. Carroll, Charles H. Payne
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Patent number: 5528452Abstract: A capacitive absolute pressure sensor. The sensor includes a substrate having an electrode deposited thereon and a diaphragm assembly disposed on the substrate. As pressure increases, the diaphragm deflects, touches the electrode (in the touch mode), and changes the capacitance of the sensor. The changed capacitance is sensed to thus sense pressure changes. A buried feedthrough is used to sense the change in a capacitance in a chamber under the diaphragm and thus determine the pressure sensed. A vacuum in the chamber is maintained by proper selection of a thickness of a sensing electrode and an insulating layer, exposition thereof to a thermal cycle, and the hermetic bonding of the diaphragm assembly to the substrate.Type: GrantFiled: November 22, 1994Date of Patent: June 18, 1996Assignee: Case Western Reserve UniversityInventor: Wen H. Ko
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Patent number: 5528465Abstract: A reduced size three-terminal type capacitor for removing jamming signals from an electrical signal. The three-terminal type capacitor comprises a ceramic substrate with a first ground electrode layer formed on the ceramic substrate, and a first dielectric layer formed on the first ground electrode layer. On the first dielectric layer reaching at least from one end of the first dielectric layer to the other end is a signal electrode. A second dielectric layer is formed on the first dielectric layer to surround the signal electrode together with the first dielectric layer, and a second ground electrode layer is formed on the second dielectric layer together with the first ground electrode layer. The second ground electrode layer is electrically connected to the first ground electrode layer. The structure of this three-terminal capacitor is such that first and second conductive layers (i.e.Type: GrantFiled: March 22, 1995Date of Patent: June 18, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazunori Yamate, Chikara Watanabe, Youichi Ishibashi
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Patent number: 5528463Abstract: A socket system that comprises a printed circuit board; an electrical module; and a socket having a hollow core. The socket holds the electrical module and is capable of electrically coupling the electrical module to the printed circuit board. The electrical module has at least one electrical lead. The socket has at least one electrical lead capable of electrically coupling with the electrical lead(s) of the electrical module. The electrical module comprises a second printed circuit board having a first and second surface; a lithium battery positioned on the first surface of the second printed circuit board and electrically coupled with the second printed circuit board, a crystal positioned on the first surface of said second printed circuit board and electrically coupled with the second printed circuit board, and an integrated circuit positioned on the second surface of the second printed circuit board.Type: GrantFiled: July 16, 1993Date of Patent: June 18, 1996Assignee: Dallas Semiconductor Corp.Inventors: Neil McLellan, Mike Strittmatter, Joseph P. Hundt, Christopher M. Sells, Francis A. Scherpenberg
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Patent number: 5528462Abstract: The present invention provides an easily reworkable demountable means of electrically interconnecting an integrated circuit die to a substrate. The electrical assembly is comprised of an integrated circuit die having contact areas on a first surface, a substrate having contact areas aligned with the contact areas of the die for providing electrical connection to the integrated circuit die, and a compression means for maintaining the integrated circuit die contacts in electrical communication with the contacts of the substrate. The compression means typically includes a two-part spring system which provides superior electrical contact by causing the curvature of the integrated circuit die to be in the same direction as the curvature of the substrate.Type: GrantFiled: June 29, 1994Date of Patent: June 18, 1996Inventor: Rajendra D. Pendse
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Patent number: 5523542Abstract: A random access memory (RAM) cell capacitor and its method of fabrication. A bottom electrode plate of the capacitor is provided with a plurality of islands disposed on the surface thereof so as to attain an increase in the capacitance thereof.Type: GrantFiled: May 15, 1995Date of Patent: June 4, 1996Assignee: United Microelectronics Corp.Inventors: Anchor Chen, Gary Hong
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Patent number: 5521786Abstract: A semiconductor module including a plurality of circuit boards, each circuit board having two opposed surfaces on which IC packages having leads extending outward through upper or lower portions of side surfaces are mounted. The circuit boards are superposed one on another and the IC packages are arranged to prevent contact between the leads of the IC packages disposed close to or in contact with each other in a back-to-back relationship between each adjacent pair of circuit boards. The IC packages mounted between each adjacent pair of circuit boards in a back-to-back relationship are upper lead type IC packages on one of the circuit boards and lower lead type IC packages on the other circuit board.Type: GrantFiled: September 22, 1994Date of Patent: May 28, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hidenobu Gochi, Tetsuro Washida
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Patent number: 5521791Abstract: Respective arc-shaped portions of two cathode lead terminals are arranged in opposition across a capacitor element to surround the side periphery of the capacitor element. These arc-shaped portions have straight portions at respective one open ends, which straight portion extends in axial direction of the capacitor element, namely in a direction along which an anode lead terminal provided on the end face of the capacitor element extends. The straight portions of the cathode lead terminals also arranged in opposition across the capacitor element. Accordingly, two straight portions of the cathode lead terminals are aligned across the anode lead terminal. By this, a three-terminal dip type capacitor which can achieve high reliability of connection between the cathode lead terminals and the capacitor element and reduction of production cost.Type: GrantFiled: November 4, 1994Date of Patent: May 28, 1996Assignee: NEC CorporationInventor: Keiji Takada
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Patent number: 5521784Abstract: Filter unit for connectors comprising at least a substrate (2) made of electrically insulating material and having two mutually opposite sides and through openings (3) for contact elements of the connector, capacitors being situated at least one of the two sides of the substrate in the region of the through openings, which capacitors each comprise at least one first conducting layer (5) in contact with the substrate, a dielectric layer (7) and a second conducting layer (9) and there being provided above each of the capacitors a cover layer (13, 22) composed of at least one first flexible layer (13) substantially covering the top surface of each of the capacitors and having a low moisture absorption coefficient and a high moisture diffusion coefficient and a second hard layer (22) at least entirely covering the first flexible layer and having a high moisture absorption coefficient and a low moisture diffusion coefficient.Type: GrantFiled: August 2, 1995Date of Patent: May 28, 1996Assignee: Berg Technology, Inc.Inventor: Hubertus B. Libregts
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Patent number: 5519567Abstract: An electrolytic capacitor having aluminum anode and cathode members separated by a paper insulating spacer impregnated with a solution of mostly a glycol or a glycol ether and minor amounts of water, pelargonic acid, isophthalic acid or terephthalic acid and an aliphatic amine sufficient to provide a pH of 7.2-7.5.Type: GrantFiled: October 6, 1993Date of Patent: May 21, 1996Assignee: Philips Electronics North America CorporationInventor: Roland F. Dapo
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Patent number: 5519582Abstract: A magnetic induction coil is mounted directly on and integrated with a semiconductor wafer containing integrated circuitry for a stable power source. Grooves are etched in the reverse face of the wafer substrate, an insulating film is applied, and conducting material fills the grooves, forming the coil. The coil conductors are connected with wiring conductors from the opposite side through protruding electrodes.Type: GrantFiled: August 7, 1995Date of Patent: May 21, 1996Assignee: Fuji Electric Co., Ltd.Inventor: Kazuo Matsuzaki
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Patent number: 5519565Abstract: Inventive electromagnetic-wave-modulating capacitors with movable electrodes are low-cost, low-energy, reliable and fast-acting elements for employment in highly transparent, conductive fixed electrodes and are incorporated, among others, in reflective display pixels for large and small-scale video displays, including full-color displays where multiple such capacitors are aligned in a single pixel. Further embodiments, not necessarily with a transparent electrode, are assemblable into array antennas deployable in outer space; provide digitally controllable or responsive such variable capacitors; and in mechanically active applications can be constituted as accelerometers, or in microrobotics. Constructions with ultra-thin electrodes have special advantages.Type: GrantFiled: May 24, 1993Date of Patent: May 21, 1996Inventors: Charles G. Kalt, Mark S. Slater
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Patent number: 5519566Abstract: A semiconductor manufacturing method is directed to forming a ferroelectric film, and in particular a ferroelectric film of the bismuth layer structure type, that has a significant component of reversible polarization perpendicular to the plane of the electrodes. The manufacturing method is conducted at low temperatures on commercially suitable electrodes and is compatible with conventional CMOS fabrication techniques. A ferroelectric strontium-bismuth-tantalate ("SBT") film is formed using two sputtering targets. A first sputtering target is comprised primarily of bismuth oxide (Bi.sub.2 O.sub.3) and a second sputtering target is comprised primarily of SBT. An initial layer of bismuth oxide is formed on the bottom electrode of a ferroelectric capacitor stack. The initial layer of bismuth oxide is directly followed by a sputtered layer of SBT.Type: GrantFiled: March 14, 1995Date of Patent: May 21, 1996Assignee: Ramtron International CorporationInventors: Stanley Perino, Thomas E. Davenport
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Patent number: 5517385Abstract: A capacitor structure is described as having a plurality of dielectric materials located so that each dielectric material is in parallel between capacitor plates. The capacitor value of this structure is preset, therefore, for operation electrically at different specific temperatures. The description gives a specific stacked arrangement for the various dielectric materials in which this capacitor can be formed, as one example of that to which it is adaptable.Type: GrantFiled: July 20, 1994Date of Patent: May 14, 1996Assignee: International Business Machines CorporationInventors: John Galvagni, Richard G. Murphy, George J. Saxenmeyer
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Patent number: 5515241Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.Type: GrantFiled: June 7, 1995Date of Patent: May 7, 1996Assignee: Interconnect Systems, Inc.Inventor: William E. Werther