Abstract: Various methods and systems are provided for a multi-frequency transducer array. In one example, the transducer array may be fabricated via a wafer scale approach, where a first comb structure, with a first type of element, is formed by dicing a first acoustic stack and a second comb structure, with a second type of element, is formed by dicing a second acoustic stack. Combining the first and second comb structures may form a multi-frequency transducer array.

Abstract: A photoelectric conversion device includes: a substrate; a first photoelectric conversion element including a first substrate electrode, a first photoelectric conversion layer, and a first counter electrode; a second photoelectric conversion element including a second substrate electrode, a second photoelectric conversion layer, and a second counter electrode; and a connection including a groove, a conductive portion and a conductive layer, the conductive portion being provided in the groove and including a part of the first counter electrode, and the conductive portion and the conductive layer electrically connecting the first counter electrode and the second substrate electrode. The conductive layer overlaps the first counter electrode on an edge of the groove, and a total thickness of the conductive portion and the conductive layer is larger than a thickness of the first counter electrode.

Abstract: A semiconductor package includes a silicon substrate including a cavity and a plurality of through holes spaced apart from the cavity, a first semiconductor chip in the cavity, a plurality of conductive vias in the plurality of through holes, a first redistribution layer on the silicon substrate and connected to the first semiconductor chip and the conductive vias, and a second redistribution layer below the silicon substrate and connected to the first semiconductor chip and the plurality of conductive vias.

Abstract: A photoelectric conversion element for detecting the spot size of incident light, including a photoelectric conversion substrate provided with two main surfaces, and multiple first sensitivity sections and second sensitivity sections arranged in a prescribed direction. When sensitivity regions on the respective main surfaces of the multiple first sensitivity sections are defined as first sensitivity regions, and sensitivity regions that appear on the main surfaces of the second sensitivity sections are defined as second sensitivity regions, each of the first sensitivity regions receives at least a part of light incident on the main surfaces, and has a pattern in which, in accordance with enlargement of an irradiation region irradiated with incident light on the main surface, the proportion of the first sensitivity regions in the irradiation region with respect to the first sensitivity regions other than those in the irradiation region and the second sensitivity regions is decreased.

Abstract: Provided is an aluminum nitride film in which, aluminum nitride crystal grains containing a metal element differing from aluminum and substituting for aluminum are main crystal grains of a polycrystalline film formed of crystal grains, and a concentration of the metal element in a grain boundary between the aluminum nitride crystal grains in at least one region of first and second regions corresponding to both end portions of the polycrystalline film in a film thickness direction of the polycrystalline film is higher than a concentration of the metal element in a center region of the aluminum nitride crystal grain in the at least one region, and is higher than a concentration of the metal element in a grain boundary between the aluminum nitride crystal grains in a third region located between the first region and the second region in the film thickness direction of the polycrystalline film.

Abstract: A transistor heat dissipation module is adapted for at least one transistor. The transistor heat dissipation module includes a heat dissipation member and an elastic member. The heat dissipation member includes a first wall and a second wall opposite to each other and a first connecting member connected to the first wall and the second wall. An accommodating space is formed between the first wall and the second wall. The transistor is disposed in the accommodating space. The elastic member is disposed in the accommodating space and is located between the at least one transistor and the first wall to press the at least one transistor against the second wall. An assembly method of a transistor heat dissipation module is further provided.

Abstract: The present invention discloses a method for creating spin-affected electric currents passively and feeding them into electric devices. The invention can be realized as either a rectangular black box incorporating coatings on top of and on the bottom of a conducting volume of material, or by coating a round-shaped wire or thread(s) of a cable. This is obtained by using a specific coating material on the conducting piece of material. The material may be piezoelectric, such as silicon dioxide (i.e. quartz) but also silicon carbide (SiC) may be used. Also, mixtures and composite arrangements are possible in order to create a coating. The manufactured add-on unit, when supplied with the input power or input signal, will act as an electron spin feeding device to the electric device because the electrons will be moving strongly within the interface area of the coating and the conducting material with aligned spins.

Abstract: A photodetector is provided, including an active layer configured to generate charge carriers of a first type and of a second type by absorption of electromagnetic radiation; a first electrode configured to collect the charge carriers of the first type; and a second electrode configured to collect the charge carriers of the second type, the first electrode including a layer configured to collect the charge carriers of the first type, the layer including self-assembled monolayers, and nanowires comprising metal and functionalized by the self-assembled monolayers, the self-assembled monolayers of the layer are configured to functionalize the nanowires and to modify a work function of a material forming the nanowires. A method for manufacturing a photodetector and an electrode for a photodetector are also provided.

Abstract: A semiconductor module comprising a semiconductor apparatus and a cooling apparatus, where: the semiconductor apparatus includes a semiconductor chip and a circuit board on which the semiconductor chip is mounted; and the cooling apparatus includes: a top plate on which the semiconductor apparatus is mounted; a jacket including a side wall connected to the top plate, a bottom plate connected to the side wall and facing the top plate, and a cooling pin fin extending in such a manner as to taper from the bottom plate toward the top plate, where at least the bottom plate and the cooling pin fin are integrally formed, and at least one of ends of the cooling pin fin is firmly fixed to the top plate; and a coolant flow portion defined by the top plate and the jacket and for flow of coolant.

Abstract: A base substrate includes a supporting substrate comprising aluminum oxide, and a base crystal layer provided on a main face of the supporting substrate, comprising a crystal of a nitride of a group 13 element and having a crystal growth surface. At lease one of a metal of a group 13 element and a reaction product of a material of the supporting substrate and the crystal of the nitride of the group 13 element is present between the raised part and the supporting substrate. The reaction product contains at least aluminum and a group 13 element.

Abstract: This application discloses a pixel structure and a display device. The pixel structure includes a substrate unit, a first pixel unit, a second pixel unit, a scanning unit, a data unit, a switch unit, a shading unit and a plurality of electrode units. The first pixel unit, the second pixel unit, the scanning unit and the data unit are located on the substrate unit, respectively. The switch unit is electrically connected to the first pixel unit, the second pixel unit, the scanning unit and the data unit. The shading unit is located on the first pixel unit and the second pixel unit.

Abstract: In an imaging element, a plurality of pixels each having a photoelectric conversion part is arranged in a two-dimensional matrix. Some of the plurality of pixels each have a polarizer placed therein on a side of a light beam incidence plane. At least some of pixels having no polarizer placed therein each have a material layer placed therein that prevents transmission of a light beam having a wavelength of a predetermined range, to reduce color mixture in the pixel having the polarizer placed therein.

Abstract: The present invention discloses a two-dimensional AlN material and its preparation method and application, wherein the preparation method comprises the following steps: (1) selecting a substrate and its crystal orientation; (2) cleaning the surface of the substrate; (3) transferring a graphene layer to the substrate layer; (4) annealing the substrate; (5) using the MOCVD process to introduce H2 to open the graphene layer and passivate the surface of the substrate; and (6) using the MOCVD process to grow a two-dimensional AlN layer. The preparation method of the present invention has the advantages that the process is simple, time saving and efficient. Besides, the two-dimensional AlN material prepared by the present invention can be widely used in HEMT devices, deep ultraviolet detectors or deep ultraviolet LEDs, and other fields.

Abstract: Embodiments disclosed herein include an electronics package and methods of forming such electronics packages. In an embodiment, the electronics package comprises a plurality of build-up layers. In an embodiment, the build-up layers comprise conductive traces and vias. In an embodiment, the electronics package further comprises a capacitor embedded in the plurality of build-up layers. In an embodiment, the capacitor comprises: a first electrode, a high-k dielectric layer over portions of the first electrode, and a second electrode over portions of the high-k dielectric layer.

Abstract: The present invention provides a display screen and a display device, and the display screen includes at least one first display region and a second display region located outside the at least one first display region; the at least one first display region includes a substrate disposed in the at least one first display region and a light-shielding layer disposed on the substrate; wherein, the light-shielding layer includes at least one first opening located in a non-pixel region between neighboring pixels, and external light enters the display screen through the at least one first opening.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate comprises a base, a plurality of display units arranged on the base, a signal line and a control unit, wherein the signal line is configured to connect adjacent two display units of the plurality of display units; at least a part of the signal line is made of a shape memory material, and the part is deformed to different degrees under different excitation conditions; the control unit is configured to detect deformation of the base and apply a corresponding excitation condition to the signal line according to the deformation of the base, so that the signal line is in a deformation state adaptive to the deformation of the base.

Abstract: Systems, apparatuses, and methods related to semiconductor structure formation are described. An example apparatus includes a structural material for a semiconductor device. The structural material includes an orthosilicate derived oligomer having a number of oxygen (O) atoms each chemically bonded to one of a corresponding number of silicon (Si) atoms and a chemical bond formed between an element from group 13 of a periodic table of elements (e.g., B, Al, Ga, In, and Tl) and the number of O atoms of the orthosilicate derived oligomer. The chemical bond crosslinks chains of the orthosilicate derived oligomer to increase mechanical strength of the structural material, relative to the structural material formed without the chemical bond to crosslink the chains, among other benefits described herein.

Abstract: A nanowire structure includes a substrate, a patterned mask layer on the substrate, and a nanowire. The patterned mask layer is on the substrate and includes an opening through which the substrate is exposed. The nanowire is on the substrate in the opening of the patterned mask layer. The nanowire includes a buffer layer on the substrate, a defect filtering layer on the buffer layer, and an active layer on the defect filtering layer. The defect filtering layer is a strained layer. By providing the defect filtering layer between the buffer layer and the active layer of the nanowire, defects present in the buffer layer can be prevented from propagating into the active layer. Accordingly, defects in the active layer of the nanowire are reduced, thereby improving the performance of the nanowire structure.

Abstract: A method of forming an organic film according to one embodiment, includes: forming an organic film on a substrate with a pattern forming material; patterning the organic film to form a patterned film; and supplying a precursor of a metallic compound to the patterned film to form a mask pattern. The material contains a polymer having a side chain including an unshared electron pair and a group having oxidation activity to the precursor. The group includes at least one group selected the group consisting of a carboxyl group, a hydroxyl group, a sulfo group, and a nitro group. An average number of the group per monomer unit is 0.3 or more. The metallic compound contains a metal with an atomic number of 22 or more in group 3 elements to group 13 elements.

Abstract: To provide a semiconductor storage apparatus, a product-sum calculation apparatus, and electronic equipment in which memory cells are highly integrated and highly densified. A semiconductor storage apparatus including: a first transistor including a first gate electrode via a ferroelectric film on an activation region including source or drain regions; and a second transistor including source or drain regions in an activation layer provided on the first gate electrode and a second gate electrode on the activation layer via an insulating film.