Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, and a columnar part. The stacked body is provided on the substrate. The stacked body includes a plurality of first insulating films and a plurality of electrode films alternately stacked one layer by one layer. The columnar part includes a semiconductor pillar provided in the stacked body and extending in a stacking direction of the stacked body, and a memory film provided between the semiconductor pillar and the stacked body. The electrode films include a first portion provided on a side part of the columnar part, a second part contacting the first portion and provided further outside the columnar part, and a first conductive layer covering an upper surface and a lower surface of the first portion.

Abstract: With a method for manufacturing a semiconductor device, a semiconductor layer having a protrusion on a main face is formed. The protrusion includes an upper face and side faces. A conductive layer on a region that includes at least the upper face and the side faces of the protrusion is formed. A first mask that partially covers a surface of the conductive layer is formed. A part of the conductive layer is etched by using the first mask in a first etching process. A second mask that at least partially covers the surface of the conductive layer that has undergone the first etching process is formed. A part of the conductive layer is etched by using the second mask to expose a part of the semiconductor layer and to form the conductive layer into an electrode in a second etching process.

Abstract: A light emitting device includes an electrically conductive member, a light emitting element, a wire, and a sealing member. The wire contains gold and silver and connects the electrically conductive member and the light emitting element. The wire includes a ball portion and a recrystallized region. The ball portion is provided on an electrode of the light emitting element. The recrystallized region is provided on the ball portion and has a length in a range of 50 ?m to 90 ?m. The sealing member has a lower surface and an upper surface opposite to the lower surface and covers the light emitting element and the wire so that the lower surface faces the electrically conductive member and the light emitting element and so that a distance from a top of the ball portion to the upper surface of the sealing member is 90 ?m to 230 ?m.

Abstract: According to one embodiment, a method of manufacturing a display device, includes preparing a first substrate formed such that a first resin layer is formed on a first support substrate, and thereafter a display element portion and a mounting portion are formed above the first resin layer and a protection layer, which extends from an end portion of the first resin layer along the mounting portion onto the first support substrate, is disposed, preparing a second substrate formed such that a second resin layer is formed on a second support substrate, attaching the first substrate and the second substrate, and mounting a flexible printed circuit board, which is in a state in which the flexible printed circuit board is opposed to the protection layer, on the mounting portion.

Abstract: A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Metal oxide-comprising material is formed over the first conductive electrode. Etch stop material is deposited over the metal oxide-comprising material. Conductive material is deposited over the etch stop material. A second conductive electrode of the memory cell which comprises the conductive material received is formed over the etch stop material. Such includes etching through the conductive material to stop relative to the etch stop material and forming the non-volatile resistive oxide memory cell to comprise the first and second conductive electrodes having both the metal oxide-comprising material and the etch stop material therebetween. Other implementations are contemplated.

Abstract: A graphene layer, a method of forming the graphene layer, a device including the graphene layer, and a method of manufacturing the device are provided. The method of forming the graphene layer may include forming a first graphene at a first temperature using a first source gas and forming a second graphene at a second temperature using a second source gas. One of the first and second graphenes may be a P-type graphene, and the other one of the first and second graphenes may be an N-type graphene. The first graphene and the second graphene together form a P—N junction.

Abstract: A light emitting device package, and a lighting system includes a light emitting device. The light emitting device includes a substrate, a first conductive semiconductor layer on the substrate, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer on the active layer. A first via electrode contacts the first conductive semiconductor layer through a via hole formed through the substrate, and a second via electrode contacts the second conductive semiconductor layer through a second via hole formed through the substrate, the first conductive semiconductor layer, and the active layer.

Abstract: The present invention is directed to a chip diode with a Zener voltage Vz of 4.0 V to 5.5 V, including a semiconductor substrate having a resistivity of 3 m?·cm to 5 m?·cm and a diffusion layer formed on a surface of the semiconductor substrate and defining a diode junction region with the semiconductor substrate therebetween, in which the diffusion layer has a depth of 0.01 ?m to 0.2 ?m from the surface of the semiconductor substrate.

Abstract: A multiple quantum well structure includes a plurality of well-barrier sets arranged along a direction. Each of the well-barrier sets includes a barrier layer, at least one intermediate level layer, and a well layer. A bandgap of the barrier layer is greater than an average bandgap of the intermediate level layer, and the average bandgap of the intermediate level layer is greater than a bandgap of the well layer. The barrier layers, the intermediate level layers, and the well layers of the well-barrier sets are stacked by turns. Thicknesses of at least parts of the well layers in the direction gradually decrease along the direction, and thicknesses of at least parts of the intermediate level layers in the direction gradually increase along the direction. A method for manufacturing a multiple quantum well structure is also provided.

Abstract: The disclosure relates to a method for manufacturing an Au-free ohmic contact for an III-nitride (III-N) device on a semiconductor substrate and to a III-N device obtainable therefrom. The III-N device includes a buffer layer, a channel layer, a barrier layer, and a passivation layer. A 2DEG layer is formed at an interface between the channel layer and the barrier layer. The method includes forming a recess in the passivation layer and in the barrier layer up to the 2DEG layer, and forming an Au-free metal stack in the recess. The metal stack comprises a Ti/Al bi-layer, with a Ti layer overlying and in contact with a bottom of the recess, and a Al layer overlying and in contact with the Ti layer. A thickness ratio of the Ti layer to the Al layer is between 0.01 to 0.1. After forming the metal stack, a rapid thermal anneal is performed. Optionally, prior to forming the Ti/Al bi-layer, a silicon layer may be formed in contact with the recess.

Abstract: Provided is a lighting device, comprising: a light source module comprising: at least one light source disposed on a printed circuit board; and a resin layer disposed on the printed circuit board so that the light source is embedded; an indirect light emission unit which is formed in at least any one of one side and another side of the light source module and which reflects light irradiated from the light source; and a diffusion plate having an upper surface which is in contact with an upper part of the light source module, and a side wall which is integrally formed with the upper surface and formed to extend in a lower side direction and which is adhered onto an outer side surface of the indirect light emission unit, whereby flexibility of the product itself can be secured, and durability and reliability thereof can be also improved.

Abstract: A semiconductor physical quantity sensor includes: a first base material; an electrode formed on the first base material; a diaphragm which bends in accordance with a physical quantity applied from the outside; a second base material fixed to the first base material and supporting the diaphragm such that the diaphragm is opposed to the electrode with a space (S) in between; and an insulator formed on a surface on the first base material side of the diaphragm. Moreover, a wall portion to define the space (S) is formed between the insulator and the electrode.

Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.

Abstract: On-chip, doped semiconductor fuses are formed in FinFET structures using epitaxial growth processes. Recesses are formed in selected portions of the fins following dummy gate removal. Semiconductor regions are grown within the recesses on exposed, opposing surfaces of the fins, merging to form an integral structure. Further epitaxial growth on the merged structure completes the semiconductor fuse. The semiconductor fuses are encapsulated by non-functional gate structures or by a dielectric fill.

Abstract: A method and device for characterizing a DC parameter of a SRAM device based on TDCD are provided.

Abstract: [Problem] To provide a substrate bonding technique having a wide range of application. [Solution] A silicon thin film is formed on a bonding surface, and the interface with the substrate is surface-treated using energetic particles/metal particles.

Abstract: Some embodiments include a semiconductor device. The semiconductor device includes a transistor having a gate metal layer, a transistor composite active layer, and one or more contact elements over the transistor composite active layer. The transistor composite active layer includes a first active layer and a second active layer, the first active layer is over the gate metal layer, and the second active layer is over the first active layer. Meanwhile, the semiconductor device also includes one or more semiconductor elements forming a diode over the transistor. The semiconductor element(s) have an N-type layer over the transistor, an I layer over the N-type layer, and a P-type layer over the I layer. Other embodiments of related systems and methods are also disclosed.

Abstract: To provide a manufacturing method of a highly reliable TFT, by which a more refined pattern can be formed through a process using four or three masks, and a semiconductor device. A channel-etched bottom gate TFT structure is adopted in which a photoresist is selectively exposed to light by rear surface exposure utilizing a gate wiring to form a desirably patterned photoresist, and further, a halftone mask or a gray-tone mask is used as a multi-tone mask. Further, a step of lifting off using a halftone mask or a gray-tone mask and a step of reflowing a photoresist are used.

Abstract: A display device includes a display panel and a flexible printed circuit (FPC) connected to the display panel. The FPC includes a first region and a second region, the second region having greater flexibility than the first region.

Abstract: Disclosed herein are methods of forming SiC/SiCN film layers on surfaces of semiconductor substrates. The methods may include introducing a silicon-containing film-precursor and an organometallic ligand transfer reagent into a processing chamber, adsorbing the silicon-containing film-precursor, the organometallic ligand transfer reagent, or both onto a surface of a semiconductor substrate under conditions whereby either or both form an adsorption-limited layer, and reacting the silicon-containing film-precursor with the organometallic ligand transfer reagent, after either or both have formed the adsorption-limited layer. The reaction results in the forming of the film layer. In some embodiments, a byproduct is also formed which contains substantially all of the metal of the organometallic ligand transfer reagent, and the methods may further include removing the byproduct from the processing chamber. Also disclosed herein are semiconductor processing apparatuses for forming SiC/SiCN film layers.