Abstract: A printed circuit board 1 providing superior adhesion between a substrate 2 and a conductor pattern 3 and preventing damage of the substrate 2. The width c of the bottom surface 310 of the conductor pattern 3 is greater than the width d of the top surface 320. Accordingly, the conductor pattern 3 has a trapezoidal cross-section. The two side surfaces 315 of a lower portion 31 of the conductor pattern 3 are coated by a solder resist. The two side surfaces 325 at the upper portion 32 of the conductor pattern 3 are exposed from the solder resist 4. A solder ball 6 engages the two side surfaces 325.

Abstract: An electronic apparatus of the present invention comprises an electronic circuit board; an electrically conductive casing for encasing the electronic circuit board; a semiconductor element module electrically connected to the electronic circuit board; and a resin fixture intervening between the electrically conductive casing and the semiconductor element module, the resin fixture mounted with the semiconductor element module and fitted to the electrically conductive casing. As a result, the resin fixture can suppress a transfer of heat generated in the electronic circuit board to the semiconductor element module.

Abstract: Lands and Cu wirings are formed on surfaces of a glass epoxy substrate, and a solder mask is formed on the lands and the Cu wirings to form a chip-mounting substrate. A bottom surface of the chip-mounting substrate is made rough, and a semiconductor chip is mounted on a top surface of the chip-mounting substrate. Through holes communicating with the Cu wirings are formed on the solder mask to expose the Cu wirings. Solder balls are formed on the Cu wrings by thermal compression welding. Underfill material is injected into a clearance formed between the chip mounting substrate and a printed circuit board. Since the surface of the chip-mounting substrate is made rough, an area of a contact surface between the chip-mounting substrate and underfill material increases, hence an adhesive strength between the chip-mounting substrate and the printed circuit board is heightened.

Abstract: A power lead and a ground lead are connected to corresponding pads of a die through an intra-package wiring substrate. A ground plane is formed in a mold under the intra-package wiring substrate extending along the bottom surface of the mold, and connected to the ground lead. A decoupling capacitor is connected to power wiring and the ground plane to prevent EMI caused by switching noise current generated by the power circuit of the die.

Abstract: An optoelectronic semiconductor package device includes a semiconductor chip, an insulative housing and a conductive trace, wherein the chip includes an upper surface and a lower surface, the upper surface includes a light sensitive cell and a conductive pad, the insulative housing includes a first single-piece non-transparent insulative housing portion that contacts the lower surface and is spaced from the light sensitive cell and a second transparent insulative housing portion that contacts the first housing portion and the light sensitive cell, and the conductive trace extends outside the insulative housing and is electrically connected to the pad inside the insulative housing.

Abstract: A lead frame is described which has at least one integrated electronic circuit. The integrated electronic circuit is situated in a region of a main area of the lead frame. The lead frame has at least one signal line, at least one electrically insulating plate, and an electrically conductive, grounded plate are situated. The electrically insulating plate, and the electrically conductive, grounded plate are situated, at least in sections, between the integrated electronic circuit and the signal line. A method for producing the lead frame is also described.

Abstract: A hybrid structure or device is provided wherein carried on a single substrate is at least one micro-spring interconnect having an elastic material that is initially fixed to a surface of the substrate, an anchor portion which is fixed to the substrate surface and a free portion. The spring contact is self-assembling in that as the free portion is released it moves out of the plane of the substrate. Also integrated on the substrate is a sensor having an active layer and contacts. The substrate and sensor may be formed of materials which are somewhat partially transparent to light at certain infrared wavelengths. The integrated sensor/spring contact configuration may be used in an imaging system to sense output from a light source which is used for image formation. The light source may be a laser array, LED array or other appropriate light source. The sensor is appropriately sized to sense all or some part of light from the light source.

Abstract: The present invention discloses a semiconductor light emitting device comprising at least one semiconductor light emitting element of edge-emission type, a first heat sink and a second heat sink, wherein at least a part of an electrode for the first-conduction-type semiconductor of the semiconductor light emitting element is in contact with the first heat sink; at least a part of an electrode for the second-conduction-type semiconductor of the semiconductor light emitting element is in contact with the second heat sink; and the first heat sink and the second heat sink are in contact with each other in a junction overlooking one of the two side planes which do not compose the facets of the cavity in the semiconductor light emitting element.

Abstract: A semiconductor module (18) includes a ring-shaped metal frame (13) having a bottom surface for contact with a top surface of an external heat sink (11) and serving as a mounting surface. The ring-shaped metal frame (13) has a flange (20) along an inner periphery thereof for engagement with an outer peripheral part of an insulating substrate (17) at a first main surface of a ceramic plate (1). The metal frame (13) is fastened to the external heat sink (11) by screws (12) or bonded to the external heat sink (11) with an adhesive. The flange (20) of the metal frame (13) fastened or bonded to the external heat sink (11) presses the outer peripheral part of the insulating substrate (17) toward the external heat sink (11). This pressing force holds the insulating substrate (17) in pressure contact with the external heat sink (11). The semiconductor module (18) avoids the problem of a decreasing pressing force resulting from deformation to ensure a satisfactory heat dissipating property over a long period of time.

Abstract: A process for minimizing lateral spacer erosion of an insulating layer adjacent to a contact region and an apparatus whereby there is provided a contact opening with a small alignment tolerance relative to a gate electrode or other structure are disclosed. The process includes the steps of forming a conductive layer on a semiconductor body, then depositing an insulating layer adjacent to the conductive layer. Next, substantially rectangular insulating spacers are formed adjacent to the gate electrode. An etch stop layer is deposited adjacent the insulating layer, followed by an etch to remove the etch stop layer material from the contact region. This etch is conducted under conditions wherein the etch removes the etch stop layer, but retains the substantially rectangular lateral spacer profile of the first insulating layer.

Abstract: To provide a semiconductor wafer having dot marks produced by irradiating laser beam capable of selecting a marking region capable of reading and writing marks in a state in which the marks hardly vanish and the semiconductor wafer is contained in a wafer cassette, inscribing information of an identification number or electric properties in the region and grasping past history by a unit of the wafer in processing steps or semiconductor fabrication steps thereafter, a very small dot mark is formed by irradiating laser having a diameter of 1 through 13 &mgr;m on an inner wall face of a notch (1) formed on an outer peripheral face of a semiconductor wafer (W), particularly on an inclined face of its peripheral edge.

Abstract: An integrated circuit design is provided capable of operating in multiple insertion orientations. In particular, the inventive circuit design includes an integrated circuit package having a plurality of contact elements extending from the integrated circuit package and arranged symmetrically thereon for enabling the integrated circuit to be inserted on a circuit board in at least two discrete orientations. A plurality of the contact elements are designated as orientation pins, the orientation pins being arranged such that, upon integrated circuit package power up, the orientation pins transmit orientation signals indicative of the integrated circuit packages insertion orientation in the circuit board. A plurality of multiplexer devices are provided for routing signals between the contact elements and integrated circuit functional circuitry in response to the orientation signals from the orientation pins.

Abstract: An electronic representation of the electronic design is received which includes various connections between various blocks specifying functions performed within the electronic design. Each of the connections forms part of one or more paths through at least a portion of the electronic design. Each path has an associated timing constraint. The method assigns criticality values to at least one of the connections. These criticality values are based upon a slack ratio that is a function of the timing constraints and values of slack for paths on which the connections reside. The electronic representation may be revised in a manner that biases the representation toward a state in which connections having relatively high criticality are not changed in a manner which increases the delay in those connections or are changed in a manner that reduces delay.

Abstract: A surface mount package is composed of a package body and first and second terminals. The package body has first and second surfaces intersecting with each other. Also, the package body has an installing portion for an element to be installed. The first terminal is connected to the first surface, and the second terminal is connected to the second surface.

Abstract: Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.

Abstract: It is determined whether a short-run rule can be adapted into a position, where a via cell is parallel and adjacent to a portion of wiring or another via cell. The via cell and the portion of the wiring is arrayed at the smallest space in the wiring. When determined that the short-run rule can be adapted thereinto, via cell data is created. The via cell data includes a via margin which is so reduced in size that the via margin can be equal to or larger than the wiring minimum space. With the created via cell data, automatic layout and wiring is performed. The via cell data is replaced with art-work data including a via cell with an original via margin, so as to be output.

Abstract: An electronic device and method of making same wherein the device includes a substrate (e.g., a printed wiring board or semiconductor chip) having a circuit thereon, a first non-photosensitive layer (e.g., polyimide resin) positioned on the substrate and over the substrate's circuit, a second, photosensitive layer (e.g., epoxy resin) positioned on the first layer, and an electrically conductive layer positioned on the first, non-photosensitive layer and electrically coupled to the circuit through a hole in the first layer.

Abstract: In a semiconductor device having a heat spreader attached thereto, a semiconductor chip is mounted on a multi-layer wiring substrate via an electrode pad and an insulating resin. The sides of the semiconductor chip on the substrate are sealed with the insulating resin, and a copper paste film contacted to the exposed surface of the semiconductor chips are formed. The copper paste film functions as a heat spreader.

Abstract: The invention relates to a semiconductor device having improved wiring layers. The wiring is formed on the semiconductor substrate and has a first region and a second region. The first region comprises a conductive film and an insulating film formed by oxidizing a film connected to the conductive film and made of the same material thereof. The second region includes a wiring and is provided on the first region. The Gibbs free energy of the wiring decreases less than that of the conductive film when the wiring and the conductive film are oxidized.

Abstract: In a semiconductor device, an insulating substrate has a plurality of through holes. A plurality of conductive posts are buried in the through-holes. The conductive posts are classified to at least one first conductive post and a pair of second conductive posts. A semiconductor element has at least one surface electrode at a surface side. The surface electrode is connected to the first conductive post by a face-down method. A metal block is formed to a square-arch shape in a cross sectional view and has a ceiling portion and both end portions. A back surface of the semiconductor element is secured to the ceiling portion while the both end portions are secured to the second conductive posts. A sealing-resin seals the semiconductor element.