Abstract: The present disclosure provides a system for monitoring I/O traffic. The system includes a memory storing information, a device, and a translation lookaside buffer (TLB). The device is configured to send a request for accessing information from the memory. The TLB includes a counter register file having counter registers, and entries having corresponding counter ID fields. The TLB is configured to receive a source identifier of the device and a virtual address associated with the request from the device, select an entry of the entries using the source identifier and the virtual address, select a counter register from the counter registers in accordance with information stored in the counter ID field of the selected entry, and update a value of the selected counter register in accordance with data transferred in association with the request.

Abstract: A method, apparatus, and system for an architecture for machine learning acceleration is presented. An apparatus includes a plurality of processing elements, each including a tightly-coupled memory, and a memory system coupled to the processing elements. A global synchronization manager is coupled to the plurality of the processing elements and to the memory system. The processing elements do not implement a coherency protocol with respect to the memory system. The processing elements implement direct memory access with respect to the memory system, and the global synchronization manager is configured to synchronize operations of the plurality of processing elements through the TCMs.

Abstract: A serial communication protocol for daisy-chained slave devices does away with the requirement for an entire byte of dummy clocks to be cycled between a slave's input and output, instead requiring a shorter set of dummy clock cycles which improves efficiency of a serial communication system. According to a specification of a serial communications protocol, data is exchanged between master and slave devices in communication frames. Each communication frame has a command portion and a data portion, and each respective portion may comprise packages of one or more bytes.

Abstract: An example non-transitory machine-readable medium may store instructions, which may be executable by a processing resource. The instructions may be executable by a processing resource to cause a computing device to store a configuration profile update in a data structure associated with an interface communicatively coupled to the processing resource, determine, during runtime of the computing device, that a peripheral device is connected to the computing device, and update a configuration profile of the peripheral device using the configuration profile update stored in the data structure.

Abstract: A processor includes: a plurality of processor cores; an interconnector including a reduction operation device and configured to communicate with another processor; a memory controller configured to control a main memory; a bus configured to couple the plurality of processor cores, the interconnector, and the memory controller to each other; and a reduction operation buffer coupled to the bus and the interconnector, wherein each of the processor cores writes control information to control the reduction operation device included in the interconnector and a value to be operated by the reduction operation device in the reduction operation buffer, and the interconnector reads out the control information and the value from the reduction operation buffer and delivers the control information and the value to the reduction operation device.

Abstract: An electronic device is disclosed that includes a housing, a universal serial bus (USB) connector exposed through one region of the housing, a wireless communication circuitry supporting short-range wireless communication, at least one processor electrically connected with the USB connector and the wireless communication circuitry, and a memory electrically connected with the processor. The memory stores instructions, when executed, causing the at least one processor to, while the USB connector is connected with a first external device and while the wireless communication circuitry performs wireless communication with a second external device, determine a wired communication state with the first external device through the USB connector and adjust a power saving scheme for the wireless communication based at least in part on the determined state. In addition, various embodiments recognized through the specification are possible.

Abstract: Apparatus and methods implementing a hardware queue management device for reducing inter-core data transfer overhead by offloading request management and data coherency tasks from the CPU cores. The apparatus include multi-core processors, a shared L3 or last-level cache (“LLC”), and a hardware queue management device to receive, store, and process inter-core data transfer requests. The hardware queue management device further comprises a resource management system to control the rate in which the cores may submit requests to reduce core stalls and dropped requests. Additionally, software instructions are introduced to optimize communication between the cores and the queue management device.

Abstract: A processing unit includes a processor core that implements a physical function that supports multiple virtual functions. The processing unit includes a bus interface that supports communication between an external bus and the physical and virtual functions implemented using the processor core. During a reset of the processing unit, power is interrupted to the processor core power to the bus interface is maintained. The bus interface responds to requests for the physical and virtual functions received over the external bus concurrently with the power interruption. The bus interface responds based on state information associated with the virtual function. Power is restored to the processor core in response to the reinitialization of the GPU. The bus interface stops responding to requests for the physical and virtual functions received over the bus interface in response to restoring the power to the processor core and forwards requests received over the external bus from the bus interface to the processor core.

Abstract: Adapting target service times in a storage system, including: in response to detecting that a measured service time for I/O requests in a storage system is failing to meet a target service time for the I/O requests, reducing an I/O capacity of the I/O requests in the storage system; determining that reducing the I/O capacity of the I/O requests to meet to the target service time causes the I/O capacity of the I/O requests to cross a threshold I/O capacity for the storage system; and in response to determining that the I/O capacity of the I/O requests has crossed the threshold I/O capacity for the storage system: determining an updated service time based on the measured service time for the I/O requests in the storage system; and updating the target service time based on the updated service time.

Abstract: A method of generating data outputs as instructed by a configuration file on a computer system for an aircraft includes processing, as instructed by one or more parameters of the configuration file, data from a first data source. In some embodiments, the first data source comprises either a sensor associated with the aircraft or an addressable memory. In some embodiments, the one or more parameters comprise instructions for using one or more certified functions. The method also includes outputting the processed data to at least one of the addressable memory, a display, and an external device.

Abstract: A computer system includes a host system, a hardware controller and an operating system. The host system runs an application that includes at least one compression library and that outputs a compression request to compress a data stream having an initial data-representation size. The hardware controller compresses the data stream according to an encoding scheme indicated by the compression library to generate a compressed data stream having a reduced data-representation size with respect to the initial data-representation size. The operating system provides a communication interface between the hardware controller and the application allowing the exchange of protocol data blocks between the application and the hardware controller. A protocol data block identifies an update status of the compression library and the OS. The computer system selectively operates in a first compression mode and a second compression based on the update status, thereby varying a compression ratio of the compressed data stream.

Abstract: A communications control system is disclosed that includes a serial communications interface and a parallel communications interface for coupling a plurality of input/output modules with a control module. The serial communications interface is configured for connecting the plurality of input/output modules to the control module in parallel to transmit information between the plurality of input/output modules and the control module, and the parallel communications interface is configured for separately connecting the plurality of input/output modules to the control module to transmit information between the plurality of input/output modules and the control module, and to transmit information between individual ones of the plurality of input/output modules. The serial communications interface may comprise a multidrop bus, and the parallel communications interface may comprise a cross switch.

Abstract: Ensuring the fair utilization of system resources using workload based, time-independent scheduling, including: determining whether an amount of available system resources in the storage system has reached a predetermined reservation threshold; and responsive to determining that the amount of available system resources in the storage system has reached the predetermined reservation threshold: determining whether one or more entities in the storage system have utilized system resources in excess of their fair share by a predetermined threshold during one or more time-independent periods; and responsive to determining that one or more entities in the storage system have utilized system resources in excess of their fair share by the predetermined threshold during the time-independent period, limiting the one or more entities from issuing additional I/O requests to the storage system.

Abstract: A method includes receiving, by a storage drive and from a storage controller, a modified first submission queue command including a first logical unit identifier. The first submission queue command includes a first host identifier to identify a first host controller was previously received by the storage controller from the first host controller. The first submission queue command was modified by the storage controller to replace the first host identifier with the first logical unit identifier. The method also includes responsive to receiving the modified first submission queue command, identifying, by the storage drive, a first logical unit of storage based on the first logical unit identifier of the modified submission queue command. The method includes granting, by the storage drive, a reservation for access to the storage drive on behalf of the first host controller by associating the reservation for the first logical unit with a second logical unit of storage.

Abstract: Recovery points can be used for replicating a virtual machine and reverting the virtual machine to a different state. A filter driver can monitor and capture input/output commands between a virtual machine and a virtual machine disk. The captured input/output commands can be used to create a recovery point. The recovery point can be associated with a bitmap that may be used to identify data blocks that have been modified between two versions of the virtual machine. Using this bitmap, a virtual machine may be reverted or restored to a different state by replacing modified data blocks and without replacing the entire virtual machine disk.

Abstract: A method includes modifying a basic input/output system (BIOS) to load a virtual general purpose input/output (GPIO) driver in an operating system, the virtual GPIO driver comprising at least one control method to monitor a system control interrupt (SCI) (202). The method can also include detecting the system control interrupt invoking the virtual GPIO driver (204) and executing the control method corresponding to the system control interrupt, the control method to be identified in the modified BIOS (206). Furthermore, the method can include detecting an error from the execution of the control method (208) and modifying an operating system to prevent the error (208), the modification comprising a modification to the control method.

Abstract: A platform for actuation of at least one industrial field device in an industrial installation having control software includes: an execution environment, in which the control software is runnable; and an external interface for communicating between the control software and the at least one industrial field device. The execution environment has virtual hardware which, from a point of view of the control software, behaves in a manner of the at least one industrial field device. A switching unit is connected between the virtual hardware and the external interface. The switching unit bidirectionally translates data, interchanged between the control software and the virtual hardware, for communication with the at least one industrial field device via the external interface.

Abstract: In example implementations, an apparatus for detecting hardware components is provided. The apparatus includes a multipurpose integrated circuit comprising an input pin, a hardware component coupled to the input pin and a two-way communication bus coupled to the multipurpose integrated circuit. The multipurpose integrated circuit is to receive an interrogation signal from a processor for the hardware component coupled to the pin via the two-way communication bus. A response signal that indicates that the hardware component is detected on the pin is generated in response to the interrogation signal. The response signal is then transmitted to the processor over the two-way communication bus.

Abstract: The systems and methods for enabling a lightweight VMM to efficiently interrupt virtual machines are provided. In some examples, the lightweight VMM is configured to utilize a self IPI to deliver external interrupts to the virtual machines. The self IPI may be generated by writing one or more values, including an identifier of the external interrupt, to an ICR of a programmable interrupt controller. The programmable interrupt controller may retrieve the one or more values from the ICR, identify the external interrupt and process the external interrupt, which culminates in the external interrupt being written to an IDT of a virtual machine targeted for interrupt delivery by the lightweight VMM.

Abstract: A memory system includes a controller and a non-volatile memory device. The controller is connectable to a host device by a bus conforming to a serial peripheral interface (SPI) standard, and configured to recognize a command signal that is received over the bus immediately after a chip select signal is received over the bus. The non-volatile memory device stores first information indicating a data size, second information indicating a manufacturer ID, third information indicating a device ID, and fourth information. The controller, upon recognizing that the command signal is an identification (ID) read command, outputs to the host device, response information that has the data size indicated by the first information and includes any one of: (i) the second information and the third information, and (ii) the second information, the third information, and the fourth information.