Abstract: A docking station for receiving different types of seismic nodes, the docking station including a frame; a control module attached to the frame plural docking modules attached to the frame, wherein each docking module includes plural docking bays; a monitor attached to the frame and configured to display information about the plural docking modules; and a network connection device attached to the frame and configured to provide data transfer capabilities for each docking bay of the plural docking bays. The plural docking bays are configured to accept interchangeable ports that are compatible with the different types of seismic nodes.

Abstract: A bridge circuit includes an NVMe device controller, a network subsystem, and a data transfer circuit. The NVMe device controller is arranged to communicate with a host via a PCIe bus. The network subsystem is arranged to communicate with an NVMe-TCP device via a network. The data transfer circuit is coupled between the NVMe device controller and the network subsystem, and is arranged to deal with data transfer associated with the NVMe-TCP device without intervention of the host.

Abstract: A CAN communication protocol system for exchanging fuel consumption-optimizing and/or operating fluid consumption-optimizing and noise-optimizing messages between drive components and output components, which also help to increase the overall availability of the system, and method. Described is also a CAN communication protocol system for an internal combustion engine for exchanging fuel consumption-optimizing and/or operating fluid consumption-optimizing and noise-optimizing messages between drive components and output components, which also help to increase the overall availability of the system.

Abstract: A system and method checks packetized data retrieved from a bus that is ordinarily considered reliable that was already error checked and/or corrected before being placed on the bus by applying a hash or checksum or other function to each packet to produce a packet checksum and then applying another function to the ordered packet checksums and comparing the result to one sent by the device that checked and/or corrected, and sent, the data packets.

Abstract: A flexible input/output (I/O) expansion card connection and communication technique are provided. The flexible I/O expansion card is, in some examples, a mezzanine expansion card that may be a single width mezzanine expansion card, a double width expansion card, or a quad width expansion card. Multiple connectors on a mainboard provide a slot to receive plug in (insertion) of an expansion card. A slot is associated with a communication bus (e.g., Peripheral Component Interconnect (PCI)) established between the expansion card and an associated processor. The expansion card (or more than one expansion card) may be inserted in multiple orientations with respect to the multiple connectors. Automatic adjustment of communication on the communication bus may be implemented via one or more hardware level and/or software assisted translations to allow the mezzanine expansion card to function in a normal or a reverse (180 degrees relative to normal) orientation.

Abstract: First data is read out of a core storage array of a memory component over a first time interval constrained by data output bandwidth of the core storage array. After read out from the core storage array, the first data is output from the memory component over a second time interval that is shorter than the first time interval and that corresponds to a data transfer bandwidth greater than the data output bandwidth of the core storage array.

Abstract: A system and method for monitoring an offline state of an electronic device includes a dock and the electronic device. The dock includes a connection pin. The electronic device includes a connection port and an embedded controller, wherein a GPIO pin of the embedded controller is coupled to the connection port, the connection port is coupled to the connection pin, and the GPIO pin detects whether the connection port is in a first or second potential state. The connection port is in the first potential state in an online state, and is in the second potential state in an offline state. The embedded controller counts the number of signal transmissions by a second frequency, until the embedded controller detects that the connection port is in the online state. The embedded controller calculates an interrupt period according to the number of signal transmissions and the second frequency.

Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.

Abstract: Methods, systems, and devices for configurable memory termination are described. In one example, a memory system, such as a memory module or a memory assembly, may include one or more memory devices (e.g., memory arrays, memory chips), and an input/output circuit coupled with the one or more memory devices and for communicating over a channel. The memory system may also include a selection component operable to selectively isolate the input/output circuit from one or more signal paths of the channel based at least in part on receiving a signal from a host device. In some examples, the selection component may be operable to selectively couple the one or more signal paths of the channel with one or more termination resistance elements.

Abstract: A method of determining a configuration state of an I/O module connected to a fieldbus controller is disclosed, the method comprising the steps of receiving from the I/O module a key ID, comparing the key ID with at least one key ID stored on the fieldbus controller, and configuring the I/O module when the received key ID does not correspond to the at least one stored key ID stored. Further, a circuit for configuring a digital input of a fieldbus controller as either a PNP input or an NPN input is provided comprising a control circuit including a reference input, a first selection input, and a control output. The circuit also comprises a data circuit including a second selection input electrically connected to the control output, a data input electrically coupled to the digital input, and a data output.

Abstract: A docking computer storage system has a plurality of docking bays for receiving laptop computers. A male USB-C connector is provided at the rear of each bay such that, when a laptop computer is inserted into the docking bay, the male USB-C connector in the docking bay will automatically engage a corresponding female USB-C connector on the laptop computer. The male USB-C connector is disposed on a floating subassembly which enables vertical and horizontal relative movement of the male USB-C connector within the docking bay. The floating subassembly has self-orienting inactive “dummy” male connectors configured to engage one or more female connectors on the laptop computer other than the USB-C connector. The self-orienting inactive “dummy” male connectors cause the male USB-C connector of the docking station to be properly aligned with the female USB-C connector of the laptop computer.

Abstract: Methods, systems, and computer storage media for providing a Shell PCIe Bridge (SPB) and shared-link-interface services that support a shared common PCIe physical link between SPB clients in a PCIe system. In operation, shared-link-interface operations include accessing, at a Shell PCIe Bridge (SPB), an outbound transaction for a PCIe endpoint vendor IP or an inbound transaction for an SPB client. The SPB supports a shared common PCIe physical link based on a shared-link-interface comprising vendor-agnostic downstream custom interface and a vendor-specific upstream PCIe endpoint interface. The shared-link-interface operations further include processing the outbound transaction or the inbound transaction based on shared-link-interface services. In this way, processing transaction comprises executing shared-link-interface operations that provide protection enhancements associated with sharing a physical PCIe link.

Abstract: An electronic system is provided. The electronic system includes a platform controller and a plurality of peripheral devices. The platform controller has a first bus. The plurality of peripheral devices are respectively connected to the platform controller through the first bus. The plurality of peripheral devices include a master peripheral device and a slave peripheral device. The master peripheral device is connected to the slave peripheral device through a communication signal line. The master peripheral device communicates with the platform controller through the first bus. When the master peripheral device receives a communication request from the slave peripheral device through the communication signal line, the master peripheral device provides a communication signal corresponding to the communication request to the first bus, so the slave peripheral device communicates with the platform controller through the first bus.

Abstract: An in-vehicle relay device prevents an anomaly of a control command exchanged over networks having different transmittable data sizes in a frame. The in-vehicle relay device relays communication between multiple control devices in a vehicle over the networks to which the control devices are connected. The in-vehicle relay device receives control data from a first control network. The control data includes, in a frame, a plurality of control commands to be executed by at least one of the control devices. The in-vehicle relay device determines, as a first determination, whether types of the control commands included in the frame form a first combination that is preset as a combination of control commands that are executable simultaneously. The in-vehicle relay device thereafter determines, as a second determination, whether the control data is anomalous by using the result of the first determination, and outputs the result of the second determination.

Abstract: A system on chip including a first peripheral circuit, a second peripheral circuit, and a first bridge control circuit is provided. The first bridge control circuit stores a first attribute setting value and a second attribute setting value and determines whether the attribute information of the first output command matches the first attribute setting value or the second attribute setting value. In response to the attribute information of the first output command matching the first attribute setting value, the first bridge control circuit provides the first output command to the first peripheral circuit. In response to the attribute information of the first output command matching the second attribute setting value, the first peripheral circuit provides the first output command to the second peripheral circuit.

Abstract: In one embodiment, a system on chip includes a first endpoint to issue a non-posted memory write transaction to a memory and a Peripheral Component Interconnect (PCI)-based fabric including control logic to direct the non-posted memory write transaction to the memory, receive a completion for the non-posted memory write transaction from the memory and route the completion to the first endpoint. Other embodiments are described and claimed.

Abstract: A configuration management device provided with: a configuration storage means for storing a bridge that includes a virtual bridge and the configuration information of input/output devices; a bus recognition means for reading the configuration information of input/output devices connected to the bridge from the input/output devices and storing the read information in the configuration storage means; a virtual resource definition storage means for defining a virtual connection between the input/output devices connected to a connection means that is not the bridge and the virtual bridge; and a device access transfer means for receiving a configuration information read request for input/output devices connected to the virtual bridge that is transmitted by the bus recognition means, reading the configuration information from the input/output devices the virtual connection of which is defined, and transmitting the read configuration information to the bus recognition means.

Abstract: In some examples, a baseboard management controller (BMC) includes a communication interface to communicate with a device over a network; and a processor to present a virtual input/output (I/O) device that stores a hierarchical structure of data elements, write information in a first data element of the data elements, the information relating to a configuration of a computer system to be managed by the BMC, and receive an access of the first data element during a configuration stage of the computer system.

Abstract: Systems, methods, and apparatus managing access to a power management device are disclosed. A system has a primary integrated circuit and a power management integrated circuit. The primary integrated circuit has a communication controller configured to control access to a first serial bus for a plurality of subsystems in the primary integrated circuit. The power management integrated circuit is coupled to the first serial bus and to a second serial bus. An access control circuit in the power management integrated circuit is configured by the primary integrated circuit to control access to the power management integrated circuit through the second serial bus. The primary integrated circuit may be configured to write an access control configuration to the power management integrated circuit. The access control configuration may define write access rights for a secondary integrated circuit coupled to the power management integrated circuit through the second serial bus.

Abstract: A processing device in a memory sub-system iteratively processes input/output (I/O) operations corresponding to a plurality of logical devices associated with a memory device. Tor each of the plurality of logical devices, the processing includes identifying a current logical device, determining one or more I/O operations in queue for the current logical device, and determining a number of operation credits associated with the current logical device. The number of credits is based at least in part on a set of quality of service (QoS) parameters for the current logical device. The processing further includes responsive to determining that the number of operation credits satisfies a threshold condition, performing the one or more I/O operations for the current logical device and identifying a subsequent logical device of the plurality of logical devices.