Patents Examined by Christopher M Roland
  • Patent number: 10333008
    Abstract: Embodiments of the present disclosure provide for methods of making substrates having an antireflective layer, substrates having an antireflective layer, devices including a substrate having an antireflective layer, and the like.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: June 25, 2019
    Assignee: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Peng Jiang, Khalid Askar, Jiamin Wang, Christopher Kim
  • Patent number: 10326098
    Abstract: An organic light-emitting diode is disclosed. In an embodiment, the diode includes a first light-emitting segment and at least a second light-emitting segment, wherein the first and second light-emitting segments include a common first electrode and a common second electrode, and are configured to emit radiation with different brightnesses, wherein the first electrode includes at least one separating line that does not completely cut through the first electrode, wherein an electric conductivity of the first electrode is reduced in a region of the separating line, wherein the separating line separates the first light-emitting segment from the second light-emitting segment, and wherein the second light-emitting segment has a lower brightness during operation than the first light-emitting segment.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: June 18, 2019
    Assignee: OSRAM OLED GMBH
    Inventors: Karsten Diekmann, Andrew Ingle, Jörg Farrnbacher
  • Patent number: 10319940
    Abstract: An organic EL display device includes a rectangular first substrate, an organic EL diode unit formed on the first substrate, a rectangular second substrate formed on the organic EL diode unit, a frame-shaped adhesive section configured to attach the first substrate to the second substrate to surround the organic EL diode unit, an extraction interconnection group constituted by a plurality of extraction interconnections extracted from the organic EL diode unit, and a dummy interconnection group formed at an adhesive region at which the adhesive section of the first substrate is attached and constituted by a plurality of dummy interconnections that are separated from each other, wherein the extraction interconnection and the dummy interconnection cross the adhesive section in the same direction.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: June 11, 2019
    Assignee: FUTABA CORPORATION
    Inventors: Shinji Ide, Ikuo Ohmori, Nobuko Hayakawa
  • Patent number: 10317595
    Abstract: An organic light emitting device includes a display panel including a plurality of pixels and a circular polarizing plate disposed opposite to the display panel, where the circular polarizing plate has a plurality of retardations corresponding to the pixels of the display panel. A method of manufacturing an organic light emitting device includes preparing a display panel including a plurality of pixels, preparing a circular polarizing plate having a plurality of retardations, and assembling the display panel and the circular polarizing plate, where the display panel and the circular polarizing plate are assembled so that the retardations of the circular polarizing plate respectively correspond to the pixels of the display panel.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: June 11, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tsuyoshi Ohyama, Eun Sung Lee, Nobuo Hamamoto
  • Patent number: 10304859
    Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: May 28, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Yasutaka Nakazawa, Yukinori Shima, Masami Jintyou, Masayuki Sakakura, Motoki Nakashima
  • Patent number: 10290792
    Abstract: A thermoelectric element is formed with a thread portion on at least one end in an electromotive force generating direction.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: May 14, 2019
    Assignee: AISIN TAKAOKA CO., LTD.
    Inventor: Hitoshi Yoshimi
  • Patent number: 10239748
    Abstract: A microelectromechanical device includes: a substrate; a semiconductor die, bonded to the substrate and incorporating a microstructure; an adhesive film layer between the die and the substrate; and a protective layer between the die and the adhesive film layer. The protective layer has apertures, and the adhesive film layer adheres to the die through the apertures of the protective layer.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: March 26, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Maggi, Sebastiano Conti
  • Patent number: 10181429
    Abstract: The present invention relates to a method for forming an electronic device intended to accommodate at least one fully depleted transistor of the FDSOI type and at least one partially depleted transistor of the PDSOI type, from a stack of layers (10) comprising at least one insulating layer (100) topped with at least one active layer (200) made of a semiconductor material, the method comprising at least one step of dry etching and one step of height adjustment between at least two etched elements.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: January 15, 2019
    Assignee: X-FAB Semiconductor Foundries AG
    Inventors: Pascal Costaganna, Francis Domart, Gregory U'Ren
  • Patent number: 10181582
    Abstract: An organic EL element including an anode; a light-emitting layer above the anode; a first interlayer on the light-emitting layer, the first interlayer including a fluoride of a first metal that is an alkali metal or alkaline earth metal; a second interlayer on the first interlayer, the second interlayer including a second metal that has a property of cleaving a bond between the first metal and fluorine in the fluoride; a cathode on the second interlayer; and a sorption layer above the cathode, the sorption layer including a third metal that has a property of taking up and holding at least one of moisture and oxygen. A thickness D1 of the first interlayer and a thickness D2 of the second interlayer satisfy 5%?D2/D1?25%.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: January 15, 2019
    Assignee: JOLED INC.
    Inventors: Noriyuki Matsusue, Hiroshi Katagiri
  • Patent number: 10177329
    Abstract: Provided are an organic light-emitting diode (“OLED”) including a bottom electrode, a top electrode disposed opposite to the bottom electrode, and an organic layer that is interposed between the bottom electrode and the top electrode and includes a hole-transporting host and an electron-transporting host forming an exciplex and a phosphorescent dopant having a triplet energy which is lower than the triplet energy of the hole-transporting host, the triplet energy of the electron-transporting host, and the triplet energy of the exciplex, and a lighting device and a display apparatus including the OLED. Instead of a phosphorescent dopant, the fluorescent dopant having a singlet energy which is lower than the singlet energy of the exciplex may be also used.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: January 8, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Jang Joo Kim, Young Seo Park, Sung Hun Lee, Kwon Hyeon Kim
  • Patent number: 10147806
    Abstract: A method of fabricating a floating gate includes providing a substrate divided into a cell region and a logic region. A silicon oxide layer and a silicon nitride layer cover the cell region and the logic region. Numerous STIs are formed in the silicon nitride layer, the silicon oxide layer, and the substrate. Later, the silicon nitride layer within the cell region is removed to form one recess between the adjacent STIs within the cell region while the silicon nitride layer within the logic region remains. Subsequently, a conductive layer is formed to fill the recess. The conductive layer is thinned to form a floating gate.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: December 4, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Bin Tang, Jubao Zhang, Xiaofei Han, Chao Jiang, Hong Liao
  • Patent number: 10096624
    Abstract: Display substrates and display devices with reduced electrical resistance are disclosed. One inventive aspect includes a switching device, a first wiring and a second wiring. The switching device includes a first semiconductor layer, first and second gate insulation layers, a source electrode and a drain electrode. The source and drain electrodes are formed to electrically connect, through the first and second gate insulation layers, to the first semiconductor layer. The second wiring is formed on the second gate insulation layer and electrically connected to the first wiring.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: October 9, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji-Yong Park, Tae-Gon Kim
  • Patent number: 10094801
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity. An amplification factor of the BioFET device may be provided by a difference in capacitances associated with the gate structure on the first surface and with the interface layer formed on the second surface.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: October 9, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, LTD.
    Inventors: Yi-Shao Liu, Rashid Bashir, Fei-Lung Lai, Chun-wen Cheng
  • Patent number: 10074557
    Abstract: A first film having a repetitive line pattern is formed on an under film. A second film is formed on a side surface of the first film. The second film has an etching selectivity different from that of the first film. A third film is formed on an upper surface and a side surface of the second film. The third film has an etching selectivity different from those of the first and second films. A resist pattern with an opening is formed on the third film. A recess that exposes upper surfaces of the first, second and third films is formed by etching the third film by using the resist pattern as an etching mask. An upper surface of the under film is exposed by etching the first and third films. A through hole that penetrates through the under film is formed by etching the under film.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: September 11, 2018
    Assignee: Tokyo Electron Limited
    Inventor: Hidetami Yaegashi
  • Patent number: 10056436
    Abstract: An organic light emitting display device includes a substrate, first electrodes disposed on the substrate; an organic light emitting layer formed on the first electrodes; a second electrode disposed on the organic light emitting layer; and a color filter layer formed on the second electrode. The color filter layer includes a first color filter, a second color filter, and a third color filter. The second color filter and the third color filter are disposed pixel blocks included in the first color filter.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: August 21, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Kenji Takii
  • Patent number: 10050234
    Abstract: An optical film includes a high refractive index pattern layer including a material having a refractive index greater than about 1, wherein a groove pattern defined by grooves, each of which has a curved groove surface and a depth greater than a width, is defined on a first surface of the high refractive index pattern, the grooves are two-dimensionally arranged in a first direction and a second direction, and a cross-sectional shape of each of the grooves has an anisotropic shape, in which a length in a first axial direction and a length in a second axial direction, which is perpendicular to the first axial direction, are different from each other, and a low refractive index pattern layer including a material having a refractive less than the refractive index of the high refractive index pattern layer and further including fillers corresponding to the grooves.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: August 14, 2018
    Assignees: SAMSUNG ELECTRONICS CO., LTD, CORNING PRECISION MATERIALS CO., LTD., CHEIL INDUSTRIES INC.
    Inventors: Hyunmin Kim, Youmin Shin, Hongshik Shim, Young Oh, Chulho Jeong, Eunyoung Cho
  • Patent number: 10050235
    Abstract: An optical film includes: a high refractive index pattern layer including a material having a refractive index greater than about 1, where a plurality of grooves, each having a curved groove surface and a depth greater than a width thereof, is defined on a first surface of the high refractive index pattern layer, the plurality of grooves defines a pattern, the plurality of grooves are two-dimensionally arranged in a first direction and a second direction, and a first distance between adjacent grooves in the first direction and a second distance between adjacent grooves in the second direction are different from each other; and a low refractive index pattern layer including a material having a refractive index less than the refractive index of the high refractive index pattern layer and further including a plurality of fillers which fills the plurality of grooves, respectively.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: August 14, 2018
    Assignees: SAMSUNG ELECTRONICS CO., LTD, CORNING PRECISION MATERIALS CO., LTD., CHEIL INDUSTRIES INC.
    Inventors: Youmin Shin, Hyunmin Kim, Hongshik Shim, Young Oh, Chulho Jeong, Eunyoung Cho
  • Patent number: 10043914
    Abstract: A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is formed over the substrate; a mask layer is formed over part of the stacked film and then dry etching treatment is performed, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film; the reaction product is removed by wet etching treatment after removal of the mask layer; a source electrode and a drain electrode are formed over the stacked film; and a third oxide semiconductor layer, a gate insulating film, and a gate electrode are stacked and formed in this order over the stacked film, and the source electrode and the drain electrode.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: August 7, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Shinya Sasagawa, Taiga Muraoka, Hiroaki Honda, Takashi Hamada
  • Patent number: 10020361
    Abstract: A method of making a circuit structure includes growing a bulk layer over a substrate, and growing a donor-supply layer over the bulk layer. The method further includes depositing a doped layer over the donor-supply layer, and patterning the doped layer to form a plurality of islands. The method further includes forming a gate structure over the donor-supply layer, wherein the gate structure is partially over a largest island of the plurality of islands. The method further includes forming a drain over the donor-supply layer, wherein at least one island of the plurality of islands is between the gate structure and the drain.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: July 10, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Ju Yu, Chih-Wen Hsiung, Fu-Wei Yao, Chun-Wei Hsu, Jiun-Lei Jerry Yu, Fu-Chih Yang
  • Patent number: 9958443
    Abstract: Dual-gate ion-sensitive field effect transistors (ISFETs) for disease diagnostics are disclosed herein. An exemplary dual-gate ISFET includes a gate structure and a fluidic gate structure disposed over opposite surfaces of a device substrate. The gate structure is disposed over a channel region defined between a source region and a drain region in the device substrate. The fluidic gate structure includes a sensing well that is disposed over the channel region. The sensing well includes a sensing layer and an electrolyte solution. The electrolyte solution includes a constituent that can react with a product of an enzymatic reaction that occurs when an enzyme-modified detection mechanism detects an analyte. The sensing layer can react with a first ion generated from the enzymatic reaction and a second ion generated from a reaction between the product of the enzymatic reaction and the constituent, such that the dual-gate ISFET generates an enhanced electrical signal.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: May 1, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Yi-Hsien Chang