Patents Examined by Clifford Knoll
  • Patent number: 8402191
    Abstract: System and method for virtualization of computing elements. A hypervisor provides virtualization of one or more peripherals for one or more computing elements. The hypervisor may further allow separate instances of an operating system to be suspended on one computing element to allow another application to be processed by replacing the state information of the computing element. The suspended instance may be resumed on the same or a different computing element.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: March 19, 2013
    Assignee: STMicroelectronics, Inc.
    Inventors: Kurt Godwin, Shaun McMaster
  • Patent number: 8397008
    Abstract: A docking station includes a multiplexer. The multiplexer includes a first input end, a second input end, and an encode system. The encode system is connected to the second input end, and configured to generate an encoding according to a connection status of the second input end. The encode system is configured to generate a first encoding, when a first peripheral device is connected to the second input end, to switch the multiplexer to a first state, in which the second input end is on and the first input end is off. The encode system is further configured to generate a second encoding, when the first peripheral device is not connected to the second input end, to switch the multiplexer to a second state, in which the second input end is off and the first input end is on.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: March 12, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Mao-Shun Hsi, Yau-Shi Hwang, Chih-Hao Chang, Po-Nien Wang
  • Patent number: 8392640
    Abstract: Techniques are disclosed relating to resource contention resolution in a pre-memory environment. Prior to system memory being accessible, a resource control processing element controls access to a hardware resource by a plurality of processing elements by granting received requests from the processing elements for access to the resource. The resource control processing element may prioritize requests based on a determined amount of utilization of the hardware resource by individual ones of the processing elements. In one embodiment, processing elements request for information from a bus controller (e.g., an SMBus controller) that is usable to initialize system memory. The resource control processing element may respond to the requests by retrieving the requested information from the controller and providing that information to the processing element or by retrieving the requested information from a cache and providing that information to the processing element.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: March 5, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Oswin E. Housty
  • Patent number: 8392641
    Abstract: Aspects of the disclosure are directed to a system having a particularly-configured microcontroller. In one embodiment, the microcontroller includes the following: a processor; a processor data bus connected to the processor; a set of peripherals; a peripheral data bus connected to the peripherals; a peripheral bus bridge providing an interface between the processor data bus and the peripheral data base and including a plurality of special function register bank blocks that are internal to the microcontroller, each register bank block having a respective output; and a register bank block decoder circuit for decoding interrupts to provide a selection output for activation of one of the plurality of register bank blocks.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: March 5, 2013
    Assignee: NXP B.V.
    Inventors: Pankaj Shrivastava, Gregory Goodhue, Ata Khan, Zhimin Ding, Craig MacKenna
  • Patent number: 8386687
    Abstract: A method and apparatus for data transfer includes receiving a first data packet across a first bi-directional bus and receiving a second data packet across a second bi-directional bus. Next, the first data packet is written to a first register operably coupled to the first bi-directional bus and the second bi-directional bus. The second data packet is written to a second register operably coupled to the first bi-directional bus and the second bi-directional bus. The second data packet is then transferred across the first bi-directional bus and the first data packet is transferred across the second bi-directional bus, thereby providing data transfer across a plurality of bi-directional buses and providing for data to be transferred across those buses to be stored at an intermediate register so that the data may be transferred in the next clock cycle, overcoming any latency requirements.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: February 26, 2013
    Assignee: ATI Technologies ULC
    Inventors: Stephen L. Morein, Robert W. Bloemer
  • Patent number: 8386677
    Abstract: Location data is exchanged between a portable media device and an accessory. If the portable media player is equipped with location determining capability, the portable media device can communicate its location data to the accessory, and the accessory can use this location data to perform various tasks. If the accessory is equipped with location assistance capability, the accessory can communicate location data to the portable media device, and the portable media device can use this location data to perform various tasks.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: February 26, 2013
    Assignee: Apple Inc.
    Inventors: Gregory T. Lydon, Ronald Keryuan Huang, Lawrence G. Bolton, Emily Clark Schubert, Jesse Lee Dorogusker
  • Patent number: 8386816
    Abstract: A method, apparatus, and computer program product are provided for reducing power consumption in computing devices. An apparatus may include a processor configured to provide a user interface allowing a user to select a device power profile from a plurality of available device power profiles. The processor may be further configured to receive an indication of a selection of a device power profile. The processor may additionally be configured to implement the selected device power profile based at least in part upon the received indication. The processor may also be configured to measure power consumed by the device and calculate power consumption statistics based at least in part upon the measured power consumed. The processor may further be configured to send the calculated power consumption statistics to a community power savings portal. Corresponding methods and computer program products are also provided.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: February 26, 2013
    Assignee: Nokia Corporation
    Inventors: Janne Antti Petteri Elsilä, Hannu Kalliomaa, Tero T. Karkkainen, Jussi E. Mäki, Kevin Quigley, Mark Zurich
  • Patent number: 8386679
    Abstract: A computer-implemented method may include determining that a slot coupled to a peripheral component interconnect host bridge is occupied by an input/output adapter. The computer-implemented method may include determining one or more characteristics of the input/output adapter and determining whether the input/output adapter is capable of using additional memory based on the one or more characteristics of the input/output adapter. The computer-implemented method may also include allocating the additional memory for the input/output adapter in response to determining that the input/output adapter is capable of using the additional memory.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Gregory M. Nordstrom, John T. O'Quin, II, Travis J. Pizel, Randal C. Swanberg, Steven M. Thurber
  • Patent number: 8380912
    Abstract: Consistent with an example embodiment a repeater device is provided for handling signal transmissions, in particular in a DisplayPort environment. The repeater is to be coupled with an upstream device and a downstream device, the repeater being adapted for transmitting signals received from the upstream device to the downstream device and for conditioning the signals before transmission. The repeater is configured to provide a transparent communication path between the upstream device and the downstream device for DPCD access transactions belonging to a second group of DPCD access transactions. For DPCD access transactions belonging to a first group of DPCD access transaction, the repeater is configured to process the DPCD access transactions by accessing one or more DPCD registers included in the repeater.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventor: Kenneth Jaramillo
  • Patent number: 8380910
    Abstract: A data processing system boots at least one service processor controlling at least one PCIe card in an I/O unit. The data processing system boots a second service processor located in a processor unit, wherein the processor unit and I/O unit are interconnected using functional path conductors, wherein functional path conductors are according to PCIe standard. The data processing system reads location information from the first at least one service processor, wherein the location information is reported for each PCIe card prior to initializing a functional path to the PCIe card. The data processing system sends location information from the second at least one service processor to a system controller. The data processing system initializes the PCIe card and a hub card of the processor unit in order to initialize a functional path and configures the I/O unit by communicating configuration commands over the functional path.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Thomas Hess, Philip Sebastian Schulz, Markus K Strasser, Sven Wagner, Constantin Werner
  • Patent number: 8364996
    Abstract: The present invention provides a power control device and a power control method applied to a computer system. The power control device includes a data processing unit, a throughput determining module, and a clock control unit. The data processing unit is utilized for processing and outputting data according to an adjustable clock rate. The throughput determining module is coupled to the data processing unit, and utilized for obtaining an indication value corresponding to a data output rate of the data processing unit and comparing the indication value with at least a predetermined threshold value to generate a comparing result. The clock control unit is coupled between the throughput determining module and the data processing unit, and utilized for adjusting the adjustable clock rate of the data processing unit according to the comparing result.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: January 29, 2013
    Assignee: ALI Corporation
    Inventor: Keng-Chih Chen
  • Patent number: 8356130
    Abstract: A method includes recording a user-level interrupt as undeliverable in a mailbox at least partially based on an interrupt domain identifier and an interrupt recipient identifier included in a user-level interrupt message associated with the user-level interrupt. The recording is at least partially based on an indication that the user-level interrupt is undeliverable to a recipient application thread executing on a processor core of a plurality of processor cores in a multi-core system.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: January 15, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Karin Strauss, Jaewoong Chung
  • Patent number: 8352667
    Abstract: Upstream network interfaces (2-1-2-N) and downstream network interfaces (5-1-5-M) have an upstream PCI-PCI bridge function and a downstream PCI-PCI bridge function, respectively. These network interfaces (2-1-2-N, 5-1-5-M) and a network (3) are incorporated in a system as a single multi-root PCI express switch. The network (3) tunnels TLPs (Transaction Layer Packets) between the upstream network interfaces (2-1-2-N) and the downstream network interfaces (5-1-5-M) or between the downstream network interfaces (5-1-5-M). This enables to distribute and connect a plurality of computers and a plurality of I/Os on a large scale without changing software, root complexes, and I/Os.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: January 8, 2013
    Assignee: NEC Corporation
    Inventors: Jun Suzuki, Youichi Hidaka, Takashi Yoshikawa
  • Patent number: 8352759
    Abstract: A method of monitoring one or more central processing units in real time is disclosed. The method may include monitoring state data associated with the one or more CPUs in real-time, filtering the state data, and at least partially based on filtered state data, selectively altering one or more system settings.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: January 8, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Steven S. Thomson, Ali Iranli, Michael J. Drop, Vinodh R. Cuppu, Christopher Kong Yee Chun, Tao Xue, Haw-Jing Lo, Moinul H. Kahn
  • Patent number: 8347008
    Abstract: Certain aspects of a method and system for a hardware-based implementation of USB 1.1 over a high-speed link may comprise translating at a client side of a client server communication system, USB protocol messages comprising a first USB standard to corresponding encapsulated USB protocol messages, wherein the USB protocol messages comprising the first USB standard are received from a client device at the client side of the client server communication system. The translated corresponding encapsulated USB protocol messages may be communicated from the client side to a server at a server side of the client server communication system.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: January 1, 2013
    Assignee: Broadcom Corporation
    Inventor: Sasi K. Kumar
  • Patent number: 8341320
    Abstract: A device and method are provided in which the data to be transmitted is transmitted in units together with information concerning the transmission and/or the use of the data. At least some of the units include at least one region which defines a time slot within which freely selectable devices can output onto the bus data representing freely selectable information at freely selectable points in time.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: December 25, 2012
    Assignee: Infineon Technologies AG
    Inventors: Jens Barrenscheen, Wilhard Von Wendorff
  • Patent number: 8332671
    Abstract: A disclosed power supply device includes a power supply unit configured to switch supply or non-supply of power from an external power supply to an electronic apparatus, and a receiving unit configured to receive a control command for controlling the switching with the power supply unit from a remote controller.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: December 11, 2012
    Assignee: Fujitsu Component Limited
    Inventors: Naoyuki Nagao, Shinichi Katayama
  • Patent number: 8327172
    Abstract: Methods and apparatuses for adaptive memory operational state management. A memory performance parameter is determined for at least a portion of a memory system. The memory performance parameter is compared to one or more threshold values. An operating frequency of the memory system can be modified based on results of the comparison of the memory performance parameter and the one or more threshold values.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: December 4, 2012
    Assignee: Intel Corporation
    Inventors: Howard S. David, Hongzhong Zheng, Eugene Gorbatov, Ulf R. Hanebutte
  • Patent number: 8312196
    Abstract: A dual processor system comprises a first processor, a second processor, and a dual-ported random access memory (DPRAM). When the first processor stores data to be processed by the second processor to the DPRAM and writes interrupt data to the DPRAM, the DPRAM generates a first information status. The second processor reads the interrupt data once when detecting the first information status, processes the to be processed data when successfully reading the interrupt data once, and reads the interrupt data twice when completing processing the to be processed data. The DPRAM generates a second information status when the second processor successfully reads the interrupt data twice, and the first processor identifies that the second processor has processed the to be processed data when detecting the second information status.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: November 13, 2012
    Assignees: Ambit Microsystems (Shanghai) Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Wen-Fei Xiong
  • Patent number: 8307229
    Abstract: A method of measuring power consumption of an electric appliance is provided. The method may include determining an operation mode of the electric appliance, extracting power consumption data corresponding to the determined operation mode of the electric appliance, and calculating an integrated power consumption based on the extracted power consumption data and the operation time of the electric appliance.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: November 6, 2012
    Assignee: LG Electronics Inc.
    Inventor: Kangwon Lee