Patents Examined by Daniel Whalen
  • Patent number: 11798606
    Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: October 24, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: John O. Dukovic, Srinivas D. Nemani, Ellie Y. Yieh, Praburam Gopalraja, Steven Hiloong Welch, Bhargav S. Citla
  • Patent number: 11798988
    Abstract: A nanowire structure includes a substrate, a graded planar buffer layer, a patterned mask, and a nanowire. The graded planar buffer layer is on the substrate. The patterned mask is on the graded planar buffer layer and includes an opening through which the graded planar buffer layer is exposed. The nanowire is on the graded planar buffer layer in the opening of the patterned mask. A lattice constant of the graded planar buffer layer is between a lattice constant of the substrate and a lattice constant of the nanowire. By providing the graded planar buffer layer, lattice mismatch between the nanowire and the substrate can be reduced or eliminated, thereby improving the quality and performance of the nanowire structure.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: October 24, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Geoffrey C. Gardner, Sergei V. Gronin, Raymond L. Kallaher, Michael James Manfra
  • Patent number: 11785819
    Abstract: A light emitting structure comprises a substrate, a sub-pixel stack over a surface of the substrate, a bank surrounding the sub-pixel stack and forming an interior space above the sub-pixel stack, a first material filling the interior space and having a first refractive index, and a second material over the first material and having a second refractive index substantially higher than the first refractive index. The sub-pixel stack comprises an emissive layer between a first transport layer and a second transport layer, a first electrode layer coupled to the first transport layer, and a second electrode layer coupled to the second transport layer. The second electrode layer has a third refractive index substantially matched to the first refractive index.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: October 10, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: David James Montgomery, Hywel Hopkin
  • Patent number: 11784288
    Abstract: The disclosure describes various aspects of using optical elements monolithically integrated with light-emitting diode (LED) structures. In an aspect, a light emitting device includes a single LED structure having an active region and a single optical element disposed on the LED structure and configured to collimate and steer light emitted by the LED structure. One or more additional optical elements may also be disposed on the LED structure. In another aspect, a light emitting device may include multiple LED structures and a single optical element disposed on the multiple LED structures and configured to collimate and steer light emitted by the multiple LED structures. For each of these aspects, the LED structure(s) and the optical element(s) are made of a material that includes GaN, the LED structure(s) has a corresponding active region, and the LED structure(s) has a corresponding reflective contact disposed opposite to the optical element(s).
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: October 10, 2023
    Assignee: Google LLC
    Inventors: Benjamin Leung, Miao-Chan Tsai, Sheila Hurtt, Gang He, Richard Peter Schneider, Jr.
  • Patent number: 11776965
    Abstract: A light emitting display device includes a substrate including first subpixels, second subpixels and third subpixels; a first anode, having at least one opening, in each of the first subpixels; a second anode in each of the second subpixels, and a third anode in each of the third subpixels; a reflective insulating film at the opening of the first anode to contact the first anode under the first anode; an organic stack on each of the first anode, the second anode and the third anode; and a cathode on the organic stack.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: October 3, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Eun-Hyung Lee, Soo-Won Hwang, In-Seop Jung
  • Patent number: 11765918
    Abstract: A light emitting device includes an emission layer including a plurality of quantum dots, and an electron auxiliary layer disposed on the emission layer, the electron auxiliary layer to transport electrons to the emission layer, wherein the electron auxiliary layer includes a plurality of metal oxide nanoparticles, wherein the metal oxide nanoparticles include zinc and a dopant metal, wherein the dopant metal includes Mg, Mn, Ni, Sn, Al, Y, Ga, Zr, Ni, Li, Co, or a combination thereof, wherein the dopant metal in at least one of the metal oxide nanoparticles is included in the metal oxide nanoparticle to have a concentration gradient of the dopant metal.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: September 19, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kun Su Park, Chan Su Kim, Kwanghee Kim, Eun Joo Jang
  • Patent number: 11765922
    Abstract: A display panel comprises includes: a base substrate; a first electrode layer and a second electrode layer on a side of the base substrate; a light-emitting layer between the first electrode layer and the second electrode layer; and a carrier functional layer located at least one of between the first electrode layer and the light-emitting layer, and between the second electrode layer and the light-emitting layer. The light-emitting layer has a plurality of light-emitting portions with different emergent light wavebands; and the carrier functional layer has a plurality of carrier functional portions corresponding to the plurality of light-emitting portions, the plurality of carrier functional portions having molecular chains, which is formed by cross-linking of monomers containing functional groups under light irradiation.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: September 19, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Zhenqi Zhang
  • Patent number: 11758768
    Abstract: An organic light-emitting display apparatus including a substrate, a first first electrode on the substrate, a first organic functional layer on the first first electrode, the first organic functional layer including a first emission layer, a first second electrode on the first organic functional layer, a second first electrode on the substrate, the second first electrode being spaced apart from the first first electrode, a second organic functional layer on the second first electrode, the second organic functional layer including a second emission layer, a second second electrode on the second organic functional layer, and a self-assembled layer between the first organic functional layer and the second organic functional layer, the self-assembled layer containing fluorine.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: September 12, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jaesik Kim, Yeonhwa Lee, Joongu Lee, Sehoon Jeong
  • Patent number: 11751420
    Abstract: A display device is provided. An embodiment of a display device includes a first substrate, a second substrate disposed on the first substrate, first and second partition walls disposed on the second substrate, the second partition wall being disposed outside the first partition wall, a first trench disposed inside the first partition wall and having a first width, a second trench disposed between the first and second partition walls and having a second width greater than the first width; an alignment key disposed to overlap the second trench; a first spacer disposed on the alignment key, and a sealing member disposed along an edge between the first substrate and the second substrate without overlapping the alignment key, wherein the first spacer partially overlaps the first partition wall, the second partition wall, and the sealing member.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: September 5, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jea Heon Ahn, Jang Soo Kim, Jong Hoon Kim, Seong Yeon Lee, Si Wan Jeon, Seok Joon Hong
  • Patent number: 11737315
    Abstract: The disclosure relates to display panel and display apparatus including the same. The display panel includes a substrate including a display part displaying an image, an adhesive layer covering the display part, on the substrate, and a heat dissipation member on the adhesive layer. The heat dissipation member includes a first metal layer, a middle layer including an organic layer and a plurality of partition walls provided on the first metal layer, and a second metal layer provided on the middle layer.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: August 22, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: MinJoo Kang, JooHwan Shin, Dohyung Kim, MinHo Oh
  • Patent number: 11735644
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: August 22, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou, Chih-Tung Yeh
  • Patent number: 11730008
    Abstract: A light emitting device comprises a first electrode, a second electrode, and an emissive layer (EML) between the first electrode and the second electrode and electrically connected to the first electrode and the second electrode. The EML comprises a charge transport matrix of a first polarity, a plurality of quantum dots in the charge transport matrix, and a plurality of charge transport nanoparticles of a second polarity in the charge transport matrix.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: August 15, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Enrico Angioni, Iain Hamilton, Edward Andrew Boardman, Andrea Zampetti
  • Patent number: 11728436
    Abstract: A thin film transistor is disclosed. The thin film transistor comprises an active layer, and a gate electrode overlapped with the active layer, wherein the active layer includes a channel portion overlapped with the gate electrode, and the channel portion includes a source boundary portion, a drain boundary portion, and a main channel portion, wherein at least a part of the drain boundary portion have a relatively smaller thickness in comparison to a thickness of the main channel portion. Also, according to one embodiment of the present disclosure, a display apparatus comprising the thin film transistor is provided.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: August 15, 2023
    Inventors: JuHeyuck Baeck, Dohyung Lee, ChanYong Jeong
  • Patent number: 11723261
    Abstract: A method for manufacturing a light-emitting component, including forming an auxiliary electrode and a first electrode arranged at an interval on a base substrate; depositing, by means of a mask with a hollow area, a light-emitting layer on the base substrate on which the auxiliary electrode and the first electrode are formed; and forming a second electrode on the base substrate on which the light-emitting layer is formed. The light-emitting layer covers at least part of the first electrode, and at least a partial area of the auxiliary electrode is exposed outside the light-emitting layer. The second electrode covers at least part of the light-emitting layer and the at least partial area of the auxiliary electrode, and the second electrode is connected to the at least partial area of the auxiliary electrode.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: August 8, 2023
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD, BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang Su, Dongfang Wang, Jun Liu, Yingbin Hu, Qinghe Wang, Shengping Du, Liangchen Yan
  • Patent number: 11721589
    Abstract: A fin-type field-effect transistor device includes a substrate, insulators, gate stacks and dielectric strips. The substrate includes a first doped region, a second doped region, third doped blocks located above the first doped region and fourth doped blocks located above the second doped region, and fins located above the third doped blocks and the fourth doped blocks, wherein doping concentrations of the third doped blocks are lower than a doping concentration of the first doped region, and doping concentrations of the fourth doped blocks are lower than a doping concentration of the second doped region. The insulators are disposed on the third doped blocks and the fourth doped blocks of the substrate and covering the fins. The dielectric strips are disposed in between the fins, and in between the third doped blocks and the fourth doped blocks. The gate stacks are disposed over the fins and above the insulators.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: August 8, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hung Chen, Chih-Hung Hsieh, Jhon-Jhy Liaw
  • Patent number: 11705383
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a package substrate, a first die electrically coupled to the package substrate, and a mold layer over the package substrate and around the first die. In an embodiment, the electronic package further comprises a through mold opening through the mold layer, and a through mold interconnect (TMI) in the through mold opening, wherein a center of the TMI is offset from a center of the through mold opening.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: July 18, 2023
    Assignee: Intel Corporation
    Inventors: Robert M. Nickerson, Rees Winters, Purushotham Kaushik Muthur Srinath
  • Patent number: 11700736
    Abstract: A light-emitting device includes a substrate, an anode, a cathode, an emissive layer between the anode and the cathode, the emissive layer comprising quantum dots having ligands, a cross-linked matrix comprising a cross-linkable charge transport material other than the ligands, and another charge transport material, where the quantum dots are dispersed in the cross-linked matrix, and the another charge transport material alters mobility of charge carriers of the emissive layer. The another charge transport material is not cross-linked with the cross-linked charge transport material in the cross-linked matrix. The cross-linked charge transport material is a cross-linkable hole transporting material. The another charge transporting material includes a hole transporting material. The hole transporting material has a highest occupied molecular orbital or valence energy level between those of the cross-linked hole transporting material and the quantum dots.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: July 11, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Enrico Angioni
  • Patent number: 11676902
    Abstract: A semiconductor package includes a base package substrate, a first semiconductor chip, and a second semiconductor chip. The base package substrate includes a redistribution region where a redistribution layer is provided, a plurality of vertical conductive vias connected to the redistribution layer, and a recess region recessed from an upper surface of the redistribution region. The base package substrate further includes an interposer in the recess region, the interposer comprising a substrate, a plurality of upper pads disposed at an upper surface of the substrate, and plurality of through electrodes respectively connected to the plurality of upper pads to pass through the substrate. The first semiconductor chip and second semiconductor chip, each include a plurality of conductive interconnection terminals respectively connected to the plurality of upper pads and the vertical conductive vias exposed at the upper surface of the redistribution region.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-kwan Ryu, Yun-seok Choi
  • Patent number: 11670738
    Abstract: Solid-state radiation transducer (SSRT) devices having buried contacts that are at least partially transparent and associated systems and methods are disclosed herein. An SSRT device configured in accordance with a particular embodiment can include a radiation transducer including a first semiconductor material, a second semiconductor material, and an active region between the first semiconductor material and the second semiconductor material. The SSRT device can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. The second contact can include a plurality of buried-contact elements electrically coupled to the second semiconductor material. Individual buried-contact elements can have a transparent portion directly adjacent to the second semiconductor material. The second contact can further include a base portion extending between the buried-contact elements, such as a base portion that is least partially planar and reflective.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: June 6, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov, Lifang Xu
  • Patent number: 11659725
    Abstract: A light emitting device includes: a first electrode and a second electrode with a surface facing the first electrode; an emission layer disposed between the first electrode and the second electrode and including a quantum dot (e.g., a plurality of quantum dots); and an electron auxiliary layer disposed between the emission layer and the second electrode. The electron auxiliary layer includes a first layer including a first metal oxide, and a second layer disposed on the first layer and including a second metal oxide. A roughness of an interface between the second layer and the second electrode is less than about 10 nm as determined by an electron microscopy analysis. An absolute value of a difference between a conduction band edge energy level of the second layer and a work function of the second electrode may be less than or equal to about 0.5 eV, and a conduction band edge energy level of the first layer may be less than the conduction band edge energy level of the second layer.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: May 23, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Heejae Lee, Sung Woo Kim, Eun Joo Jang, Dae Young Chung, Moon Gyu Han