Patents Examined by Daniel Whalen
  • Patent number: 11296294
    Abstract: A display device including a light source; and a quantum dot emission layer disposed on the light source, wherein the quantum dot emission layer includes a first emission layer disposed in a red pixel of the display device, and a second emission layer disposed in a green pixel of the display device, the light source includes a first portion configured to supply a first incident light to the first emission layer, a second portion configured to supply a second incident light to the second emission layer, and a third portion configured to supply a third light to a blue pixel of the display device, the first emission layer includes red light emitting quantum dots and the second emission layer includes green light emitting quantum dots, and each of the first portion, the second portion, and the third portion comprises a layer comprising blue light emitting quantum dots.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: April 5, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyo Sook Jang, Tae Hyung Kim, Eun Joo Jang, Oul Cho
  • Patent number: 11289334
    Abstract: An epitaxial wafer and a method of fabricating an epitaxial wafer, the method including providing a semiconductor substrate doped with both boron and germanium such that a sum of boron concentration and germanium concentration is at least 8.5E+18 atoms/cm3 and the germanium concentration is 6 times or less the boron concentration; forming an epitaxial layer on the semiconductor substrate such that the semiconductor substrate and the epitaxial layer constitute the epitaxial wafer; and annealing the epitaxial wafer for 1 hour or longer at a temperature of 1,000° C. or less.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: March 29, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-A Lee, Yeonsook Kim, Inji Lee
  • Patent number: 11289555
    Abstract: An electroluminescent display device includes an electroluminescent display device includes a substrate; a first pixel row on the substrate including a first plurality of pixels arranged along a first direction; a second pixel row on the substrate including a second plurality of pixels arranged along the first direction, the second pixel row being spaced apart from the first pixel row in a second direction; a first groove between the first and second pixel rows; and a light emitting diode in each pixel of the first and second pixel rows, wherein the first groove includes a first portion at one end of the first pixel row, a second portion at the other end of the first pixel row and a third portion between the first and second portions, and wherein third portion is smaller than the first portion and greater than the second portion.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: March 29, 2022
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Jeong-Mook Choi, Nack-Youn Jung, Hee-Jin Kim, Hak-Min Lee, Myung-O Joo, Sung-Soo Park
  • Patent number: 11283056
    Abstract: The disclosure relates to display panel and display apparatus including the same. The display panel includes a substrate including a display part displaying an image, an adhesive layer covering the display part, on the substrate, and a heat dissipation member on the adhesive layer. The heat dissipation member includes a first metal layer, a middle layer including an organic layer and a plurality of partition walls provided on the first metal layer, and a second metal layer provided on the middle layer.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: March 22, 2022
    Assignee: LG Display Co., Ltd.
    Inventors: MinJoo Kang, JooHwan Shin, Dohyung Kim, MinHo Oh
  • Patent number: 11276717
    Abstract: The present disclosure refers to a multispectral image sensor and a manufacturing method thereof. The multispectral image sensor comprises a front-end structure used for photoelectric conversion and processing, and a pixel layer provided on the front-end structure. The pixel layer comprises N pixel units, and N?4, the pixel units are arranged in a plurality of arrays, a photosensitive wavelength of each pixel unit in each array is different. Whereby, multispectrals can be detected simultaneously, and therefore the efficiency is improved, costs are reduced, and miniaturization is achieved.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: March 15, 2022
    Assignees: SHANGHAI IC R&D CENTER CO., LTD., CHENGDU IMAGE DESIGN TECHNOLOGY CO., LTD.
    Inventor: Yong Wang
  • Patent number: 11276705
    Abstract: A semiconductor structure includes a first semiconductor die containing a recesses, and a second semiconductor die which is embedded in the recess in the first semiconductor die and is bonded to the first semiconductor die.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: March 15, 2022
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Chen Wu, Peter Rabkin, Yangyin Chen, Masaaki Higashitani
  • Patent number: 11276758
    Abstract: An embodiment is a semiconductor device includes a silicon carbide layer having a first plane and a second plane facing the first plane; a gate electrode; an aluminum nitride layer located between the silicon carbide layer and the gate electrode, the aluminum nitride layer containing an aluminum nitride crystal; a first insulating layer located between the silicon carbide layer and the aluminum nitride layer; and a second insulating layer located between the aluminum nitride layer and the gate electrode and having a wider band gap than the aluminum nitride layer.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: March 15, 2022
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Toshiyuki Oshima, Ryosuke Iijima, Hisashi Yoshida, Shigeya Kimura
  • Patent number: 11271144
    Abstract: A method for manufacturing an optical-semiconductor device, including forming a plurality of first and second electrically conductive members that are disposed separately from each other on a support substrate; providing a base member formed from a light blocking resin between the first and second electrically conductive members; mounting an optical-semiconductor element on the first and/or second electrically conductive member; covering the optical-semiconductor element by a sealing member formed from a translucent resin; and obtaining individual optical-semiconductor devices after removing the support substrate.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: March 8, 2022
    Assignee: Nichia Corporation
    Inventors: Masato Fujitomo, Hiroto Tamaki, Shinji Nishijima, Yuichiro Tanda, Tomohide Miki
  • Patent number: 11257688
    Abstract: A reconstituted wafer includes a rigid mass with a flat surface and a base surface disposed parallel planar to the flat surface. A plurality of dice are embedded in the rigid mass. The plurality of dice include terminals that are exposed through coplanar with the flat surface. A process of forming the reconstituted wafer includes removing some of the rigid mass to expose the terminals, while retaining the plurality of dice in the rigid mass. A process of forming an apparatus includes separating one apparatus from the reconstituted wafer.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: February 22, 2022
    Assignee: Intel Corporation
    Inventors: Robert L. Sankman, John S. Guzek
  • Patent number: 11251179
    Abstract: A semiconductor and a method of forming a semiconductor on a single chip, including forming a shallow trench isolation (STI) region on a short channel device and a long channel device, forming at least two vertical fins connected in the long channel device, and forming contacts on a source and drain regions for the long channel device and short channel device, wherein the contacts connect a top surface of the source or drain region for series FET (Field-Effect Transistor) connection for the long channel device.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: February 15, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Terence B. Hook, Baozhen Li, Kirk David Peterson, Junli Wang
  • Patent number: 11251309
    Abstract: Embodiments of the present disclosure relate to a thin film transistor, a method for manufacturing the same, a display panel, and a display device. The thin film transistor includes a substrate, an active layer located on the substrate, and a light shielding layer, a first dielectric layer, and a second dielectric layer located between the substrate and the active layer, wherein the first dielectric layer is located between the second dielectric layer and the substrate, and wherein a refractive index of the first dielectric layer is greater than a refractive index of the second dielectric layer.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: February 15, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiangbo Chen, Young Suk Song, Wei Li, Liangchen Yan
  • Patent number: 11244999
    Abstract: Artificial synaptic devices with an HfO2-based ferroelectric layer that can be implemented in the CMOS back-end are provided. In one aspect, an artificial synapse element is provided. The artificial synapse element includes: a bottom electrode; a ferroelectric layer disposed on the bottom electrode, wherein the ferroelectric layer includes an HfO2-based material that crystallizes in a ferroelectric phase at a temperature of less than or equal to about 400° C.; and a top electrode disposed on the bottom electrode. An artificial synaptic device including the present artificial synapse element and methods for formation thereof are also provided.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: February 8, 2022
    Assignee: International Business Machines Corporation
    Inventors: Martin M. Frank, Takashi Ando, Xiao Sun, Jin Ping Han, Vijay Narayanan
  • Patent number: 11244904
    Abstract: A semiconductor package includes a base package substrate, a first semiconductor chip, and a second semiconductor chip. The base package substrate includes a redistribution region where a redistribution layer is provided, a plurality of vertical conductive vias connected to the redistribution layer, and a recess region recessed from an upper surface of the redistribution region. The base package substrate further includes an interposer in the recess region, the interposer comprising a substrate, a plurality of upper pads disposed at an upper surface of the substrate, and plurality of through electrodes respectively connected to the plurality of upper pads to pass through the substrate. The first semiconductor chip and second semiconductor chip, each include a plurality of conductive interconnection terminals respectively connected to the plurality of upper pads and the vertical conductive vias exposed at the upper surface of the redistribution region.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: February 8, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-kwan Ryu, Yun-seok Choi
  • Patent number: 11244931
    Abstract: A light emitting device includes a first light emitting element having a top face and a bottom face which faces the base, and a second light emitting element. A wavelength conversion member is provided on the top face and includes a light transmitting part made of an inorganic material and a phosphor layer. The light transmitting part has an upper face and a lower face. A phosphor layer is disposed between the lower face and the top face. The phosphor layer is bonded to the top face of the first light emitting element. The reflecting member covers the lateral faces of the phosphor layer. A light transmissive sealing resin is disposed on the base between the first and second light emitting elements and between the wavelength conversion member and the second light emitting element. The light transmissive sealing resin covers the lateral faces via the reflecting member.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: February 8, 2022
    Assignee: NICHIA CORPORATION
    Inventor: Yusuke Kawano
  • Patent number: 11239073
    Abstract: Dirac semimetals, methods for modulating charge carrying density and/or band gap in a Dirac semimetal, devices including a Dirac semimetal layer, and methods for forming a Dirac semimetal layer on a substrate are described.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: February 1, 2022
    Assignee: MONASH UNIVERSITY
    Inventors: Michael Sears Fuhrer, John Thery Hellerstedt, Mark Thomas Edmonds, James Lee Richard Jessee Collins, Chang Liu
  • Patent number: 11239338
    Abstract: According to an embodiment of the present invention, a method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: February 1, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou, Chih-Tung Yeh
  • Patent number: 11222821
    Abstract: First and second gates and first and second conductive contacts are disposed over a substrate. First and second vias are disposed over the first and second conductive contacts, respectively. A first gate contact is disposed over the first gate. A dielectric structure is disposed over the first gate and over the second gate. A first portion of the dielectric structure is disposed between the first and second vias. A second portion of the dielectric structure is disposed between the first via and the first gate contact. A first interface between the first conductive contact and the first via constitutes a first percentage of an upper surface area of the first conductive contact. A second interface between the first gate and the first gate contact constitutes a second percentage of an upper surface area of the first gate. The first percentage is greater than the second percentage.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: January 11, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Szu-Wei Tseng, Kuo-Chiang Tsai
  • Patent number: 11222934
    Abstract: A display device is improved in terms of bending characteristics, the display device including: a window, a display panel, and a reinforcing member. A protective film is not disposed between the display panel and the reinforcing member, and a protective film is not disposed on a lower surface of the reinforcing member.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: January 11, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventor: Younjoon Kim
  • Patent number: 11217496
    Abstract: A device and methods for forming the device is provided. The device includes a substrate and circuit elements thereon. The device further includes a metallization layer over the substrate. The metallization layer includes interconnects interconnecting the circuit elements. A test pad is disposed over an uppermost interconnect in the metallization layer. The test pad is coupled to one or more circuit elements via the interconnects. The test pad is configured for testing the one or more circuit elements. A crack stop protection seal surrounding the test pad is provided. The crack stop protection seal confines damage caused by probing at the test pad from propagating to an area beyond the crack stop protection seal.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: January 4, 2022
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Ramasamy Chockalingam, Juan Boon Tan, Wanbing Yi
  • Patent number: 11211410
    Abstract: A high degree of phase difference detection accuracy can be obtained using a phase difference pixel with a simpler configuration. A solid-state image-capturing device includes a pixel array unit in which a plurality of pixels including a phase difference pixel which is a pixel for focal point detection and an image-capturing pixel which is a pixel for image generation are arranged in a two-dimensional array. In this case, a predetermined layer between a light shielding layer and a micro lens formed in the image-capturing pixel has a higher refraction index than a refraction index of the predetermined layer formed in the phase difference pixel. The technique of the present disclosure can be applied to, for example, a back-illuminated-type solid-state image-capturing device and the like.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: December 28, 2021
    Assignee: SONY CORPORATION
    Inventor: Tomohiko Asatsuma