Abstract: Provided is a display device, comprising a display panel which comprises a first area and a second area located around the first area; and an under-panel sheet which is located under the display panel and overlaps the first area and the second area, wherein the under-panel sheet comprises a buffer member and a strength reinforcing member, wherein the strength reinforcing member is thinner than the buffer member, and a ratio of a thickness of the buffer member to a thickness of the strength reinforcing member is 3 to 6 times.

Abstract: A semiconductor device, including a capacitor, a semiconductor module having a first power terminal formed on a front surface of a first insulating member, and a connecting member electrically connecting and mechanically coupling the semiconductor module and the capacitor to each other, the connecting member having a front surface and a rear surface opposite to each other, the rear surface being on a front surface of the first power terminal. The connecting member is bonded to the semiconductor module via a first welded portion, which penetrates the front and rear surfaces of the connecting member, and penetrates the front surface of the first power terminal, in a thickness direction of the semiconductor device, a distance in the thickness direction between a bottommost portion of first welded portion and the front surface of the first insulating member being 0.3 mm or more.

Abstract: A device includes an interconnect structure over a substrate, multiple first conductive pads over and connected to the interconnect structure, a planarization stop layer extending over the sidewalls and top surfaces of the first conductive pads of the multiple first conductive pads, a surface dielectric layer extending over the planarization stop layer, and multiple first bonding pads within the surface dielectric layer and connected to the multiple first conductive pads.

Abstract: A device includes a photodiode, a floating diffusion region, a transfer gate, and a channel region. The photodiode is disposed in a semiconductor material. The photodiode is coupled to generate charges in response to incident light. The photodiode has a substantially uniform doping profile throughout a depth of the photodiode in the semiconductor material. The floating diffusion region is disposed in the semiconductor material. The transfer gate is disposed between the photodiode and the floating diffusion region, wherein the transfer gate includes a plurality of fin structures. The channel region associated with the transfer gate is in the semiconductor material proximate to the transfer gate. The transfer gate is coupled to transfer the charge from the photodiode to the floating diffusion region through the channel region in response to a transfer signal coupled to be received by the transfer gate.

Abstract: In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.

Abstract: A device includes a photodiode, a floating diffusion region, a transfer gate, and a channel region. The photodiode is disposed in a semiconductor material. The photodiode is coupled to generate charge in response to incident light. The floating diffusion region is disposed in the semiconductor material. The transfer gate is disposed between the photodiode and the floating diffusion region. The channel region associated with the transfer gate is in the semiconductor material proximate to the transfer gate. The transfer gate is coupled to transfer the charge from the photodiode to the floating diffusion region through the channel region in response to a transfer signal coupled to be received by the transfer gate. The transfer gate includes a plurality of fin structures that extend into the semiconductor material and the photodiode.

Abstract: An embodiment is a structure including a first die having an active surface with a first center point, a molding compound at least laterally encapsulating the first die, and a first redistribution layer (RDL) including metallization patterns extending over the first die and the molding compound. A first portion of the metallization patterns of the first RDL extending over a first portion of a boundary of the first die to the molding compound, the first portion of the metallization patterns not extending parallel to a first line, the first line extending from the first center point of the first die to the first portion of the boundary of the first die.

Abstract: An image sensor includes a semiconductor substrate having a first surface and a second surface with a pixel region having photoelectric conversion regions, a gate electrode disposed on the pixel region and adjacent to the first surface, a first isolation structure extending from the first surface toward the second surface, the first isolation structure comprising a first pixel isolation pattern enclosing the pixel region, and a first inner isolation pattern spaced apart from the first pixel isolation pattern and positioned between the photoelectric conversion regions, and a second isolation structure extending from the second surface toward the first surface with a top surface vertically spaced apart from at least a portion of a bottom surface of the first isolation structure. The bottom surface of the first isolation structure is closer to the second surface of the semiconductor substrate than to the first surface thereof.

Abstract: The present technology relates to a solid-state imaging device capable of suppressing deterioration in dark characteristics, and an electronic apparatus. The present invention is provided with: a photoelectric conversion section that performs photoelectric conversion; a charge retaining section that temporarily retains electric charge converted by the photoelectric conversion section; and a first trench formed in a semiconductor substrate between the photoelectric conversion section and the charge retaining section, the first trench being higher than the photoelectric conversion section in a depth direction of the semiconductor substrate. Alternatively, the first trench is lower than the photoelectric conversion section and higher than the charge retaining section in the depth direction of the semiconductor substrate. The present technology can be applied to, for example, a back-illuminated CMOS image sensor.

Abstract: The present disclosure provides a method of forming an integrated circuit structure. The method includes depositing a first metal layer on a semiconductor substrate; forming a hard mask on the first metal layer; patterning the first metal layer to form first metal features using the hard mask as an etch mask; depositing a dielectric layer of a first dielectric material on the first metal features and in gaps among the first metal features; performing a chemical mechanical polishing (CMP) process to both the dielectric layer and the hard mask; removing the hard mask, thereby having portions of the dielectric layer extruded above the metal features; forming an inter-layer dielectric (ILD) layer of the second dielectric material different from the first dielectric material; and patterning the ILD layer to form openings that expose the first metal features and are constrained to be self-aligned with the first metal features by the extruded portions of the first dielectric layer.

Abstract: Presented herein is a WLCSP intermediate structure and method forming the same, the method comprising forming a first redistribution layer (RDL) on a carrier, the first RDL having mounting pads disposed on the first RDL, and mounting interposer dies on a second side of the first RDL. A second RDL is formed over a second side of the interposer dies, the second RDL having a first side adjacent to the interposer dies, one or more lands disposed on the second RDL, at least one of the one or more lands in electrical contact with at least one of the interposer dies or at least one of the mounting pads. A molding compound is formed around the interposer dies and over a portion of the first RDL prior to the forming the second RDL and the second RDL is formed over at least a portion of the molding compound.

Abstract: An integrated circuit includes first and second active regions extending in a first direction, a first gate line extending in a second direction substantially perpendicular to the first direction and crossing the first and second active regions, and a first contact jumper including a first conductive pattern intersecting the first gate line above the first active region and a second conductive pattern extending in the second direction above the first gate line and connected to the first conductive pattern.

Abstract: This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with non-receiving pads and the non-interfering area in the donor substrate is maximized. This enables the transfer of micro devices to a receiver substrate with fewer steps.

Abstract: An applying method includes the following steps. Firstly, a conductive adhesive including a plurality of conductive particles and an insulating binder is provided. Then, a carrier plate is provided. Then, a patterned adhesive is formed on the carrier plate by the conductive adhesive, wherein the patterned adhesive includes a first transferring portion. Then, a manufacturing device including a needle is provided. Then, the needle of the manufacturing device is moved to contact the first transferring portion. Then, the transferring portion is transferred to a board by the manufacturing device.

Abstract: A method of image sensor package fabrication includes forming a recess in a transparent substrate, depositing conductive traces in the recess, inserting an image sensor in the recess so that the image sensor is positioned in the recess to receive light through the transparent substrate, and inserting a circuit board in the recess so that the image sensor is positioned between the transparent substrate and the circuit board.

Abstract: A semiconductor device with dummy and active pixel structures and a method of fabricating the same are disclosed. The semiconductor device includes a first pixel region with a first pixel structure, a second pixel region, surrounding the first pixel region, includes a second pixel structure adjacent to the first pixel structure and electrically isolated from the first pixel structure, and a contact pad region with a pad structure disposed adjacent to the second pixel region. The first pixel structure includes a first epitaxial structure disposed within a substrate and a first capping layer disposed on the first epitaxial structure. The second pixel structure includes a second epitaxial structure disposed within the substrate and a second capping layer disposed on the second epitaxial structure. Top surfaces of the first and second epitaxial structures are substantially coplanar with each other. The first and second epitaxial structures includes a same semiconductor material.

Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. At least three substrate trench structures are formed in the semiconductor substrate, defining two nonplanar structures, each having a plurality of sidewall portions. An isolation layer includes at least three isolation layer trench structures, each being disposed in a respective one of the three substrate trench structures. A gate includes three fingers, each being disposed in a respective one of the three isolation layer trench structures. An electron channel of the transistor extends along the plurality of sidewall portions of the two nonplanar structures in a channel width plane.

Abstract: A microelectromechanical microphone includes: a substrate; a sensor chip, integrating a microelectromechanical electroacoustic transducer; and a control chip operatively coupled to the sensor chip. In one embodiment, the sensor chip and the control chip are bonded to the substrate, and the sensor chip overlies, or at least partially overlies, the control chip. In another embodiment, the sensor is bonded to the substrate and a barrier is located around at least a portion of the sensor chip.

Abstract: A semiconductor device, the device including: a first level including control circuits, where the control circuits include a plurality of first transistors and a plurality of metal layers; a memory level disposed on top of the first level, where the memory level includes an array of memory cells, where each of the memory cells include at least one second transistor, where the control circuits control the array of memory cells, where the first level is bonded to the memory level, where the bonded includes oxide to oxide bonding regions and a plurality of metal to metal bonding regions, and where at least one of the memory cells is disposed directly above at least one of the plurality of metal to metal bonding regions.

Abstract: An imaging element according to the present disclosure is an imaging element flip-chip mounted on a wiring substrate, in which a projection is provided on a side surface of the imaging element such that a bottom surface side of the imaging element projects from a top surface side. Then, in the imaging device according to the present disclosure, the imaging device is flip-chip mounted on the wiring substrate so that a top surface of the imaging element faces the wiring substrate, and an outer periphery of the imaging element on the wiring substrate is sealed with a sealing material. An adhesion site of the sealing material is urged to a side of the projection, so that penetration of a solute and a solvent forming the sealing material may be reduced.