Patents Examined by Edward Dudek, Jr.
  • Patent number: 9645756
    Abstract: A method, system, and program product for optimizing distribution and availability of data partitions is disclosed. Placement logic is run for data partition distribution which optimizes a configuration of a memory data grid. A determination of a change in performance of the memory data grid after adding new members to the memory data grid is provided. Replication of data partitions in the memory data grid is minimized. Optimum data partition distribution in the memory data grid is determined.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: May 9, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nitin Gaur, Kulvir S. Bhogal, Christopher D. Johnson, Todd E. Kaplinger, Douglas C. Berg
  • Patent number: 9645931
    Abstract: Filtering snoop traffic in a multiprocessor computing system, each processor in the multiprocessor computing system coupled to a high level cache and a low level cache, the including: receiving a snoop message that identifies an address in shared memory targeted by a write operation; identifying a set in the high level cache that maps to the address in shared memory; determining whether the high level cache includes an entry associated with the address in shared memory; responsive to determining that the high level cache does not include an entry corresponding to the address in shared memory: determining whether the set in the high level cache has been bypassed by an entry in the low level cache; and responsive to determining that the set in the high level cache has not been bypassed by an entry in the low level cache, discarding the snoop message.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: May 9, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jason A. Cox, M V V Anil Krishna, Eric F. Robinson, Brian M. Rogers
  • Patent number: 9639547
    Abstract: A method and system for file-system based caching can be used to improve efficiency and security at network sites. In one set of embodiments, the delivery of content and storing content component(s) formed during generation of the content may be performed by different software components. Content that changes at a relatively high frequency or is likely to be regenerated between requests may not have some or all of its corresponding files cached. Additionally, extra white space may be removed before storing to reduce the file size. File mapping may be performed to ensure that a directory within the cache will have an optimal number of files. Security at the network site may be increased by using an internally generated filename that is not used or seen by the client computer. Many variations may be used is achieving any one or more of the advantages described herein.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: May 2, 2017
    Assignee: Open Text SA ULC
    Inventors: Conleth S. O'Connell, Jr., Maxwell J. Berenson, N. Isaac Rajkumar
  • Patent number: 9639433
    Abstract: Techniques are described for reducing I/O operations and storage capacity requirements for centralized backup storage systems. A central server optimizes the collection and centralization of backup data from a number of endpoint devices for backup purposes. The central server utilizes a single instance store and a persistent files cache to minimize the number of backup copies for each non-unique file, reduce storage usage, network traffic, memory footprint and CPU cycles required to identify and process non-unique data. For each file in the single instance store, the server tracks the source device of that file until a threshold number of devices have been reached. Once the file reaches the threshold number of sources, the file is marked as persistent and its hash value is placed in the persistent files cache. Thereafter, all pointer creation and reference counting for that file cease.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: May 2, 2017
    Assignee: VMware, Inc.
    Inventors: Dmitry Rabinovich, Meytal Genah, Anton Gartsbein
  • Patent number: 9640238
    Abstract: A data generating device includes: a memory cell array including a plurality of memory cells; a read circuit operative to obtain a plurality of resistance value information pieces from the plurality of memory cells; and a data generator circuit operative to set a condition on the basis of the plurality of resistance value information pieces, and generating data by allocating, on the basis of the condition, the plurality of resistance value information pieces into a plurality of sets which respectively correspond to a plurality of values constituting the data. Each of the plurality of memory cells has a characteristic where, when in a variable state, a resistance value thereof reversibly changes between a plurality of variable resistance value ranges in accordance with an electric stress applied.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: May 2, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Satoru Ogasahara, Yuhei Yoshimoto, Yoshikazu Katoh
  • Patent number: 9632701
    Abstract: A storage system includes a first storage apparatus including a first logical volume and a second storage apparatus including a second logical volume. The first and second logical volumes are set as a High Availability pair and associated with a virtual volume. When receiving a write request to the virtual volume, the storage system manages storage area in the first logical volume regarding to the write request as storage area during data duplication, writes data in duplicate, in order from the first logical volume to the second logical volume. When receiving a read request to the virtual volume, the first storage apparatus waits for completion of the data duplication and reads data from the first logical volume if the storage area is during the data duplication, and the first storage apparatus reads data from the first logical volume if the storage area is not during the data duplication.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: April 25, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Watanabe, Hideo Saito, Tomohiro Kawaguchi
  • Patent number: 9632705
    Abstract: Systems and methods for implementing adaptive memory layers in a storage system are disclosed. A storage system may include a non-volatile memory with memory cells configurable to each of a plurality of bit-per-cell capacities and divided into dynamically re-sizable memory layers defined by memory cells of a particular capacity. A memory layer adjustment module associated with a controller of the storage system is configured to, upon detection of a maintenance trigger, compare the amount of valid data and overprovisioning in each layer to a target amount and to redistribute valid data and physical capacity among the memory layers according to a predetermined table or algorithm in order to optimize performance of each memory layer.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: April 25, 2017
    Inventor: Alan Welsh Sinclair
  • Patent number: 9632727
    Abstract: An apparatus, system, and method are disclosed for managing a non-volatile storage medium. A storage controller receives a message that identifies data that no longer needs to be retained on the non-volatile storage medium. The data may be identified using a logical identifier. The message may comprise a hint, directive, or other indication that the data has been erased and/or deleted. In response to the message, the storage controller records an indication that the contents of a physical storage location and/or physical address associated with the logical identifier do not need to be preserved on the non-volatile storage medium.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: April 25, 2017
    Assignee: Longitude Enterprise Flash S.A.R.L.
    Inventors: David Flynn, Jonathan Thatcher, Michael Zappe
  • Patent number: 9626327
    Abstract: In various embodiments, a hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy and/or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device. Other embodiments are discussed.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: April 18, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Sean Eilert, Mark Leinwander
  • Patent number: 9619430
    Abstract: A computing node includes an active Non-Volatile Random Access Memory (NVRAM) component which includes memory and a sub-processor component. The memory is to store data chunks received from a processor core, the data chunks comprising metadata indicating a type of post-processing to be performed on data within the data chunks. The sub-processor component is to perform post-processing of said data chunks based on said metadata.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: April 11, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Sudarsun Kannan, Dejan S. Milojicic, Vanish Talwar
  • Patent number: 9619287
    Abstract: In this disclosure, techniques are described for more efficiently sharing resources across multiple virtual machine instances. For example, techniques are disclosed for allowing additional virtual machine instances to be supported by a single computing system by more efficiently allocating memory to virtual machine instances by providing page swapping in a virtualized environment and/or predictive page swapping. In one embodiment, a virtual memory manager swaps pages predicatively in and/or out of a paging pool based on information from a central processing unit (“CPU”) scheduler. In one embodiment, the CPU scheduler provides scheduling information for virtual machine instances to the virtual memory manager, where the scheduling information allows the virtual memory manager to determine when a virtual machine is scheduled to become active or inactive. The virtual memory manager can then swap-in or swap-out memory pages.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: April 11, 2017
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Pradeep Vincent, William Lewis
  • Patent number: 9619163
    Abstract: An apparatus, method, and computer program for maintaining access times in a data processing system, wherein the data processing system comprises a plurality of storage devices, the apparatus including: a receive component, for receiving a command or an availability message, wherein an availability message indicates whether the storage device is available; an evaluate component for evaluating a plurality of first relationships between the storage devices and a plurality of first values, wherein each of the first values indicates whether a related storage device is a redundant; a send component, for sending a power message to one or more of the storage devices; and an update component for updating a second relationship between the redundant storage device and a plurality of second values, wherein each of the second values indicates whether a related redundant storage device is available.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventor: Paul Hooton
  • Patent number: 9612928
    Abstract: When an update instruction for updating task data stored in a memory is transmitted through a transaction process performed by an application server, an active node apparatus generates, based on the update instruction, an update log indicating update contents of the task data stored in the memory, and then distributes, in a multicast manner, the generated update log to other standby node apparatuses each with a memory. With this, mirroring among the plurality of memories is controlled.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: April 4, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kazuhisa Fujita, Kazuya Uesugi
  • Patent number: 9612760
    Abstract: A modular block allocator receives a cleaner message requesting dirty buffers associated with an inode be cleaned. The modular block allocator provides at least one bucket cache comprising a plurality of buckets, wherein each bucket represents a plurality of free data blocks. The dirty buffers are cleaned by allocating the data blocks of one of the buckets to the dirty buffers. The allocated data blocks are mapped to a stripe set and when the stripe set is full, the stripe set is sent to a storage system. In one embodiment of the invention, a modular block allocator includes a front end module and a back end module communicating with each other via an application programming interface (API). The front end module contains write allocation policies that define how blocks are laid out on disk. The back end module creates data structures for execution of the policies.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: April 4, 2017
    Assignee: NETAPP, INC.
    Inventors: Ram Kesavan, Mrinal K. Bhattacharjee, Sudhanshu Goswami
  • Patent number: 9612744
    Abstract: A computing device, such as a data storage device, that is location-aware and modifies its behavior depending on its location. In some embodiments, the data storage device may determine its location based on information such as Global Positioning System information, proximity to a wireless network, near-field proximity to another device, etc. The data storage device maintains a profile for various locations in which it is frequently located and records user-behavior at these locations. In addition, the device may be configured or program with specific behaviors at different locations. Based on the location of the device, it may then perform various actions to improve its responsiveness. In one embodiment, a data storage device may enter or exit from a standby state, prefetch various files, etc. based on its proximity to a particular location.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: April 4, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventor: Arya Ahmadi-Ardakani
  • Patent number: 9606869
    Abstract: A method includes dividing a data file into a plurality of data regions. For each data region, the method includes determining a segmentation approach; determining a dispersed storage error encoding function; segmenting the data region into a plurality of data segments in accordance with the segmentation approach; and dispersed storage error encoding the plurality of data segments to produce a plurality of sets of encoded data slices in accordance with the dispersed storage error encoding function. The method includes creating a segment allocation table (SAT) for the data file and dispersed storage error encoding the segment allocation table to produce a set of encoded SAT slices. The method includes outputting the set of encoded SAT slices with at least one of the pluralities of sets of encoded data slices for storage in storage units of the DSN.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: March 28, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ilya Volvovski, Andrew Baptist, Wesley Leggette, Jason K. Resch
  • Patent number: 9606907
    Abstract: A memory module is operable to communicate with a memory controller via a data bus and a control/address bus and comprises a module board; a plurality of memory devices mounted on the module board; and multiple sets of data pins along an edge of the module board. Each respective set of the multiple sets of data pins is operatively coupled to a respective set of multiple sets of data lines in the data bus. The memory module further comprises a control circuit configured to receive control/address information from the memory controller via the control/address bus and to produce module control signals. The memory module further comprises a plurality of buffer circuits each being disposed proximate to and electrically coupled to a respective set of the multiple sets of data pins.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: March 28, 2017
    Assignee: Netlist, Inc.
    Inventors: Hyun Lee, Jayesh R. Bhakta
  • Patent number: 9600362
    Abstract: At least one refresh without scrubbing is performed on a corresponding portion of the memory device with a first frequency. In addition, at least one refresh with scrubbing is performed on a corresponding portion of the memory device with a second frequency less than the first frequency. Accordingly, refresh operations with data scrubbing are performed to prevent data error accumulation. Furthermore, refresh operations without data scrubbing are also performed to reduce undue power consumption from the data scrubbing.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: March 21, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Uk-song Kang, Hak-soo Yu, Chul-woo Park
  • Patent number: 9594679
    Abstract: A flash memory system that uses repeated writing of the data to achieve stable storage, is adapted for efficient cache flushing operations by utilizing a part of the non-volatile flash memory array as a designated buffer for the data, in which data integrity is retained until all repeat writing thereof is complete. Repeated writing is carried out from the designated buffer directly to the final storage locations in the flash memory array, for example using simple internal copy back operations.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: March 14, 2017
    Assignee: SANDISK IL LTD.
    Inventor: Opher Lieber
  • Patent number: 9588793
    Abstract: Systems and methods for creating new virtual machines based on post-boot virtual machine snapshots. An example method may include: receiving a request to create a new virtual machine, identifying, in view of the request, a virtual machine snapshot, the virtual machine snapshot including one or more elements of an initialized virtual machine, determining an update efficiency metric with respect to the virtual machine snapshot, and in response to a determination that the update efficiency metric reflects that updating the virtual machine snapshot is relatively more efficient than creating a new virtual machine in lieu of the virtual machine snapshot, creating the new virtual machine in view of the virtual machine snapshot.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: March 7, 2017
    Assignee: Red Hat Israel, Ltd.
    Inventors: Eduardo Warszawski, Yeela Kaplan