Abstract: The present invention provides a technique enabling the amount of time required to evaluate the light fastness of a liquid crystal panel to be shortened. A method of testing the light fastness of a liquid crystal panel comprising a pair of substrates and a liquid crystal layer interposed between the substrates comprises the steps of: irradiating a test subject area of the liquid crystal panel with a laser beam, with at least one of the wavelength, the irradiation energy, and the irradiation duration of the laser beam set as a variable parameter; irradiating the liquid crystal panel with an observation beam and detecting the condition of the observation beam after passing through the liquid crystal panel; and evaluating the light fastness of the liquid crystal panel on the basis of a difference in the condition of the observation beam corresponding to the setting of the variable parameter of the laser beam.

Abstract: A semiconductor integrated circuit apparatus, and more particularly a technology for measuring and managing a physical amount of factors that exert an influence upon an operation of a semiconductor integrated circuit is provided; more particularly, a semiconductor integrated circuit that is an object of measurement, and a measurement circuit which measures a physical factor that exerts an influence upon the actual operation of the semiconductor integrated circuit, such as jitter or noise jitter, and noise of this semiconductor integrated circuit are provided on an identical chip; also, a measurement result of the measurement circuit of the present invention is analyzed, and is fed back to a circuit for adjusting the semiconductor integrated circuit that is the object of measurement.

Abstract: An inspecting circuit layout according to the present invention is provided. The inspecting circuit layout is adapted for inspecting panel units group by group, each of the panel units having a plurality of first and second signal lines. The inspecting circuit layout includes a multiplexer (MUX) and an inspecting pad. The MUX is electrically connected with at least one of the first or second signal lines of the panel units, and the inspecting pad is electrically connected to the MUX. The MUX is adapted for selectively connecting the inspecting pad with the first or second signal lines of a group of panel units.

Abstract: An interconnect for testing semiconductor components includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. The interconnect can be utilized with a method that includes the steps of bonding the interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect.

Abstract: Circuit arrangement for simultaneous testing of electricity meters with interconnected current and voltage circuits comprising plurality of said meters having all voltage terminals associated with the same phase connected parallel to respective voltage source and each of the current terminal pairs of the meters connected to the output of individual zero flux current transducer (ZFCT). The inputs (IW) of the zero flux current transducer, the outputs of which are associated with the same phase of individual meters, are connected in series to a respective current source (I). The zero flux current transducer consists of an input winding (IW), an output winding (OW), a sense winding (SW), a drive winding (DW), a sense core (SC), a drive core (DC) and an amplifier (A). The drive winding comprises the drive core only and the input, output and sense windings comprise both sense core and drive core.

Abstract: A semiconductor wafer is tested by heating an electrical contact to a temperature sufficient to desorb water vapor and/or organic material from a surface thereof. The semiconductor wafer is also heated to a temperature sufficient to desorb water vapor and/or organic material from a top surface thereof. The heated surface of the contact is caused to touch the heated top surface of the semiconductor wafer. An electrical stimulus is applied between the heated surface of the contact and the heated top surface of the semiconductor wafer when the surface of the contact is touching the top surface of the semiconductor wafer. A response of the semiconductor wafer to the applied electrical stimulus is measured and at least one electrical property of the semiconductor wafer is determined from the measured response.

Abstract: An MEMS probe card with elastic multi-layer structure mainly includes a substrate and a plurality of MEMS probe assemblies. The MEMS probe assemblies are disposed on a plurality of testing pads of the substrate, and each of the MEMS probe assemblies includes a plurality of first layer bridge elements, a second layer bridge element and a probe tip. The first and the second layer bridge elements each forms a -shaped cross-section and has two piers and a beam. The piers of the second layer bridge elements are respectively disposed on the beams of the first layer elements, and the probe tips are disposed on the beams of the second layer bridge elements. According to the stacks formed by the second layer bridge elements disposing on the first layer bridge elements, the probe tips may have more elastic buffer and a better resistance to the compressive strain when probing the bumps or bonding pads on wafers.

Abstract: A novel method and apparatus inspects liquid crystal display. The method and apparatus for inspecting the flat display device scans at least one signal wire by using a magnetic sensor and detects a resistance change of the magnetic sensor to perceive a short in the signal wire. Pixels can be tested using an array of magnetic sensors configured such that each sensor in the array is smaller than the pixel.

Abstract: A contact probe for a testing head is presented. The contact probe for a testing head has a plurality of these probes which are inserted in guide holes realized in respective dies, the probe comprising a rod-shaped body equipped at an end with at least a contact tip effective to ensure the mechanical and electrical contact with a corresponding contact pad of an integrated electronic device to be tested. The rod-shaped body has a nonuniform cross section.

Abstract: Here is provided a testing apparatus for judging whether or not a device-under-test is defect-free based on static power-supply current of the device-under-test, having a power supply for supplying power for driving the device-under-test to the device-under-test, a pattern generating section for supplying setting vectors for setting a circuit of the device-under-test into a predetermined state to the device-under-test, a power-supply current measuring section for measuring the static power-supply current supplied from the power supply to the device-under-test when the device-under-test is set into the predetermined state by the setting vectors and a judging section for obtaining temperature of the device-under-test from a temperature sensor provided within the device-under-test to judge whether or not the device-under-test is defect-free based on the static power-supply current measured by the power-supply current measuring section and the temperature of the device-under-test.

Abstract: Apparatuses and methods for supporting a receptacle block in a device testing a unit under test. The unit under test includes the receptacle block, which has one or more receptacles electrically coupled to components of the unit under test. A support includes a plurality of supporting surfaces that are respectively positioned at different depths. A positioning mechanism positions the support behind a receptacle block.

Abstract: A test apparatus for testing switching speed of a circuit, which includes a pre-stage logic element outputting a first or second level voltage and a post-stage logic element to which the output signal of the pre-stage logic element is input, is provided, wherein the post-stage logic element includes the post-stage FET, a gate terminal of which the output signal is input to, for outputting a different level of voltage according to the case that the output signal voltage is higher or lower than a predetermined threshold voltage, and the test apparatus includes a threshold voltage setting unit for setting a threshold voltage of a post-stage field effect transistor (FET) to be different from that in a normal operation by setting a substrate voltage of the post-stage FET to have a value different from that in the normal operation of the circuit; a delay time measuring unit for measuring a delay time of the circuit to which the threshold voltage different from that in the normal operation is set; and an error detec

Abstract: A probe apparatus and a probe system are provided. The probe apparatus uses a larger printed circuit board to dispose a plurality of testers. The layout of each of the testers on the circuit board is modified accordingly, such that more number of the testers can be disposed on the circuit board and the pin count of the probe apparatus is increased. In addition, the probe apparatus can be installed in the test tool. Accordingly, the testing efficiency of the present test tool can be substantially promoted and the cost of the overall testing can be effectively reduced.

Abstract: The trench leakage current of a deep trench isolation structure is measured. The deep trench isolation structure, which is filled with polysilicon, contacts both a first region of a first conductivity type and a second region of a second conductivity type, and is proximate to a third region of the first conductivity type formed in the second region. Test voltages are applied to the structures and the leakage current is measured.

Abstract: An example embodiment of an electrical-energy meter comprises a transformer for producing an electrical output proportional to an electrical current in a conductor of electrical energy, a circuit board electrically coupled to the transformer for facilitating the calculation and displaying of a cumulative amount of electrical energy passing through the conductor of electrical energy, a first optical transmitter, a second optical transmitter, and an optical receiver. The first and second optical transmitters and the optical receiver are coupled to the circuit board. The first optical transmitter and the receiver facilitate optical communications between the electrical-energy meter and a first type of external device. The second optical transmitter and the receiver facilitate optical communications between the electrical-energy meter and a second type of external device.

Abstract: A current sensor comprises an outer shielding means (4), a toroidal inner core and inner shield means (1). A combined driving and sensing winding (3) is wound around the inner core. First and second ends of the winding (3) are connectable to a sensor head. The inner shield means (1) has a gap (1A) formed in it.

Abstract: A TFT array inspection device inspects a TFT array substrate having thin film transistors arranged in a matrix pattern. The TFT array inspection device includes a probe frame to be electrically connected to the TFT array substrate. The probe frame includes probe pins contacting array inspection electrodes to be connected to a driving electrode terminal provided in a TFT array on the TFT array substrate through wires. The probe pins are positioned at common locations relative to a layout of the TFT array substrate. Since the probe pins are located at common positions, it is possible to use a single common probe frame for the TFT array substrate with a different layout without providing or changing a prove frame corresponding to a different layout of the TFT array substrate.

Abstract: An eccentric offset Kelvin probe with a beveled contact tip radially offset from the longitudinal axis of the probe which provides a reduced tip spacing between adjacent pairs of probes.

Abstract: A system and method utilizes an image analysis approach for controlling the probe-to-surface distance of a liquid junction-based surface sampling system for use with mass spectrometric detection. Such an approach enables a hands-free formation of the liquid microjunction used to sample solution composition from the surface and for re-optimization, as necessary, of the microjunction thickness during a surface scan to achieve a fully automated surface sampling system.

Abstract: A timing generation circuit can increase a maximum delay amount without changing the configuration of a timing memory. The timing generation circuit includes: a timing memory (TMM) 10 containing predetermined timing data; a plurality of down counters 20 for loading the timing data from the TMM and outputting a pulse signal at the timing indicated by the timing data; an address selection circuit 40 for specifying one or two TMM addresses by switching and outputting corresponding one or plural timing data; a load data switching circuit 50 for loading the plural timing data to the plural down counters cascaded and outputting one timing pulse signal; and a timing data selection circuit 60 for selecting one of the pulse signals. The plural timing data are generated by dividing the timing memory into a plurality of memory regions either in a column or row direction.