Abstract: A probe for a probe card assembly is provided. The probe includes a beam element having a tip end portion. The probe also includes a tip structure on the tip end portion of the beam element. The tip structure includes a plurality of conductive bumps arranged in a stacked configuration.

Abstract: The mechanical behavior of wires subjected to axial loading and experiencing bending deformation is used to ensure effective control of the contact pressure in mechanical and/or heat removing devices, and similar structures and systems. An apparatus for taking advantage of the characteristics of wires in packaging of a device, such as a semiconductor device, is disclosed, as well as a test device for identifying the accurate contact pressure required in same. Methods for the prediction of such a behavior for pre-buckling, buckling, and post-buckling conditions in wires, carbon nanotubes (CNTs), and similar wire-grid-array (WGA) structures, for example are also disclosed.

Abstract: A handling unit includes a frame, at least one arrangement module, and at least one chip carrier. The frame has at least one recess for the interchangeable mounting of at least one of the arrangement modules. The arrangement module has at least one receptacle for the mounting of at least one chip carrier. The chip carrier has at least one chip seat for holding a chip.

Abstract: In one embodiment, an integrated circuit comprises at least one measurement unit configured to generate an output indicative of a supply voltage at which the integrated circuit is operable for a given operating frequency and a control unit coupled to receive the output. The control unit is configured to generate a voltage control output indicative of a requested supply voltage for the integrated circuit responsive to the output. The voltage control output may be output from the integrated circuit for use by circuitry external to the integrated circuit in generating the supply voltage for the integrated circuit.

Abstract: A range-changing circuit includes an array of graduated impedances in serial relationship, and a voltage sensing and limiting switch across one of said impedances. The switch limits the voltage across said one of the impedances in response to a voltage sensed by the switch.

Abstract: The invention provides a test apparatus for testing a circuit unit (101) to be tested having a test system (100), a control bus (102) for transferring control data (106), an address bus (103) for transferring addressing data (107) and a data bus (104) for exchanging test data (108) between the test system (100) and the circuit unit (101) to be tested. A voltage generating device (200) connected between the test system (100) and the circuit unit (101) to be tested serves for generating a predeterminable operating voltage output signal (202, 202a-202n) for the voltage supply of the circuit unit (101) to be tested in a manner dependent on a control signal (211) that is provided by the test system (100) and fed via the control bus (102).

Abstract: A circuit and method for easily detecting skew of a transistor within a semiconductor device are provided. The circuit for detecting the skew of the transistor includes a linear voltage generating unit for outputting a linear voltage by using a first supply voltage, a first attenuation unit for reducing variation width of the linear voltage according to the performance of the transistor, a saturation voltage generating unit for outputting a saturation voltage by using a second supply voltage, and a comparison unit for comparing an output of the first attenuation unit and the saturation voltage.

Abstract: A presently-preferred embodiment of an electrical-energy meter comprises a base adapted to be mounted on a supporting surface, a current sensor assembly comprising a plurality of contact blades extending through the base and adapted to electrically contact a conductor of electrical energy, and a current transformer mechanically coupled to the base and electrically coupled to the contact blades. The electrical-energy meter further comprises a circuit board assembly comprising a main circuit board electrically coupled to the current transformer and the contact blades. The electrical-energy meter also comprises a circuit-board support member comprising a rim portion fixedly coupled to the base, and a first bracket adjoining the rim portion. The first bracket has a first and a second leg each extending away from the rim portion and the base and each being adapted to securely engage the main circuit board.

Abstract: A semiconductor circuit is disclosed, including a DLL circuit for supplying a desired signal-delay amount. The DLL circuit includes detecting means for detecting variations of a signal-delay amount, and delay-amount control means for generating a delay-amount control signal for controlling, depending on the variations of the signal-delay amount detected by the detecting means, the signal-delay amount of the DLL circuit. The semiconductor circuit further includes a part for monitoring circuit performance of the semiconductor circuit based on the delay-amount control signal.

Abstract: An apparatus and method for testing a semiconductor device in an AC test regime. The test apparatus includes a test plate capacitively couple to the signal terminals of the integrated circuit. The test plate is coupled to a test receiver circuit to receive and output the data signal detected at the test plate capacitively coupled to the signal terminals. Alternatively, the test plate is coupled to a test transmitter circuit to transmit data signals to signal terminals through the capacitively coupled test plate. A test unit can be coupled to the semiconductor device to evaluate the detected data signal against test criteria. Testing and evaluation is accomplished by capacitively coupling a test plate to a plurality of signal terminals. Data signals transmitted from a signal terminal and detected by the test plate or transmitted from the test plate and detected by the signal terminals are evaluated against a test criteria.

Abstract: An apparatus and method for testing a semiconductor device in an AC test regime. The test apparatus includes a test plate capacitively couple to the signal terminals of the integrated circuit. The test plate is coupled to a test receiver circuit to receive and output the data signal detected at the test plate capacitively coupled to the signal terminals. Alternatively, the test plate is coupled to a test transmitter circuit to transmit data signals to signal terminals through the capacitively coupled test plate. A test unit can be coupled to the semiconductor device to evaluate the detected data signal against test criteria. Testing and evaluation is accomplished by capacitively coupling a test plate to a plurality of signal terminals. Data signals transmitted from a signal terminal and detected by the test plate or transmitted from the test plate and detected by the signal terminals are evaluated against a test criteria.

Abstract: A detection circuit for detecting the output power of a power amplifier comprises a first current minor transistor (Ti 1) having a base, which is connectable to a power transistor (T10), and a collector, a RF detection means (RF-det) for detecting the RF current flowing through the current mirror transistor (T11). Said RF detection means (RFdet) is connected to the collector of said first current mirror transistor (T11). Said detection circuit further comprises a biasing means (bias-RF-det) for biasing said RF detection means (RF-det), wherein said biasing means is connected to said collector of said first current mirror (T11) and said RF detection means (RF-det).

Abstract: A rotatable or translatable carousel configured to facilitate electrical or electronic testing of Devices Under Test (DUTs) in combination with an insertion handler and a test head is disclosed. The carousel is configured to be placed on a test head of a tester in a first position with a first Device under Test (DUT) (such as a system-on-a-chip (SOC) integrated circuit (IC)) loaded in a first test position of the carousel. A first electrical or electronic test is performed on the first DUT at the first position, after which the carousel is advanced to a second position and a second DUT is loaded in a second test position of the carousel. While the carousel is positioned at the second position, the first test is performed on the second DUT and a second electrical or electronic test is performed on the first DUT.

Abstract: An integrated circuit characterization printed circuit board and method is provided for improving the uniformity of impedance introduced by a test fixture across all of the pins of the integrated circuit device. The printed circuit board includes an array of substantially similar test contacts numbering greater than the pins of the integrated circuit device. The array of test contacts includes an active portion configured for electrically coupling with the corresponding pins on the integrated circuit device and an inactive portion adjacent to the active portion and electrically coupled to a reference signal on the printed circuit board.

Abstract: A voltage monitoring circuit is capable of being integrated into a chip and monitoring the voltage quality. It mainly uses a first waveshaper to receive a voltage signal of a voltage source to be measured, process it to a logic signal, and output to a first logic level transformer. A first digital signal is transformed by the processing and can be recorded by a register such that a managing system can read content of the register through a bus to further determine whether the voltage source has a situation of voltage surge. Similarly, an inverter can be concatenated between a second waveshaper and a second logic level transformer to monitor whether the voltage source has undercurrent pulse. This way, an object of monitoring voltage quality in the chip with a combination of simple analog circuit can be achieved.

Abstract: A method for testing a semiconductor component includes the steps of bonding an interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components.

Abstract: The present invention provides a method for testing semiconductor wafers by means of a temperature-regulated chuck device, comprising the following steps: controlling the temperature of the chuck device to a predetermined measurement temperature by means of a heating device having a predefined heating power and a cooling device having a predefined cooling capacity, the heating power being substantially greater than a predefined testing power; laying the rear side of a semiconductor wafer on a supporting side of the temperature-regulated chuck device; placing a probe card on the front side of the semiconductor wafer; testing the semiconductor wafer by impressing the testing power from a testing apparatus into a chip region of the front side of the semiconductor wafer by means of probes of the probe card placed on; reducing the heating power by the amount of the testing power during the testing with a substantially constant cooling capacity. The invention also provides a corresponding apparatus.

Abstract: A method for measuring the holding properties of a TFT array of an active matrix display panel comprising multiple pixel circuits with holding capacitors, this measuring method being characterized in that the multiple pixel circuits comprise at least a first pixel circuit and a second pixel circuit, and the method comprises a step for charging to the holding capacitor of the first pixel circuit, a step for then charging to the holding capacitor of the second pixel circuit, a step for performing an effect-eliminating procedure due to floating capacity, and a step for measuring the charge of the holding capacitor of the first and second pixel circuits wherein a predetermined holding time after charging has elapsed.

Abstract: A burn-in apparatus for conducting a burn-in test by housing a burn-in board mounted with a large number of DUT in a burn-in chamber, moving a temperature adjustment board downward and bringing temperature adjustment arrays attached to the temperature adjustment board contact with corresponding DUT; comprising a push-pull device having a movable body moving back and forth in the horizontal direction of a board surface of the burn-in board and a cam mechanism composed of a tilted cam and cam follower for elevating/lowering an elevator board by converting a back-and-forth movement of the movable body to a vertical movement is provided; wherein the push-pull device for elevating/lowering the temperature adjustment board can be downsized, so that a more compact burn-in apparatus can be provided.

Abstract: Calculation of an offset value is permitted when a current value detected by an ammeter of a magnetic flux detection type is switched from a negative value to a positive value, or from a positive value to a negative value, and also a state where an absolute value of the current value is with in a predetermined range is continued for a predetermined time. When calculation of the offset value is permitted, the fact that an ignition switch is turned OFF is detected, and the current value detected by the ammeter is calculated as the offset value.