Abstract: The disclosure is directed to an electro-optical device and manufacturing method. In one example, a storage capacitor is disposed above a data line. The storage capacitor has a stacked structure of a fixed-potential electrode, a dielectric layer, and a pixel-potential electrode. The storage capacitor is disposed in an area including a region opposed to a channel region of a pixel-switching thin film transistor. A peripheral circuit is disposed in a peripheral area located around a pixel array area. The peripheral circuit includes a peripheral-circuit thin film transistor. The dielectric layer includes a peripheral dielectric layer area having a region opposed to the channel region of the peripheral-circuit thin film transistor.

Abstract: The invention provides a nitride semiconductor light-emitting device comprising gallium nitride semiconductor layers formed on a heterogeneous substrate, wherein light emissions having different light emission wavelengths or different colors are given out of the same active layer. Recesses 106 are formed by etching in the first electrically conductive (n) type semiconductor layer 102 formed on a substrate with a buffer layer interposed between them. Each recess is exposed in plane orientations different from that of the major C plane. For instance, the plane orientation of the A plane is exposed. An active layer is grown and joined on the plane of this plane orientation, on the bottom of the recess and the C-plane upper surface of a non-recess portion. The second electrically conductive (p) type semiconductor layer is formed on the inner surface of the recess.

Abstract: A minute wiring structure portion including first wiring layers and first insulating layers, in which each of first wiring layers and each of first insulating layers are alternately laminated, is formed on a semiconductor substrate. A first huge wiring structure portion is formed on the minute wiring structure portion, and the first huge wiring structure portion is formed by successively forming on the minute wiring structure portion, in the following order, the first huge wiring portion including second wiring layers has a thickness of twice or more of the thickness of the first wiring layers and second insulating layers, in which each of second wiring layers and each of second wiring layers are alternately laminated, and a second huge wiring structure portion including third wiring layers has a thickness of twice or more of the thickness of the first wiring layer and a third insulating layer in which the elastic modulus at 25° C.

Abstract: A semiconductor substrate comprising a semiconductor base, a dielectric layer formed in at least a part of an area on the semiconductor base, and a single crystal semiconductor layers having mutually different film thicknesses, disposed on the dielectric layer and formed by epitaxial growth.

Abstract: An LED comprising a circuit board, a connecting electrode unit provided on the circuit board, a reflective cup provided within the circuit board, an LED element disposed in the reflective cup and connected to the connecting electrode unit, and a resin with which the reflective cup is filled, a fluorescent material contained in the resin absorbing one portion of light emitted from the LED element and changing the wavelength of the light.

Abstract: A solid-state imaging device includes: a photoelectric conversion element; a pixel region including a modulation part formed adjacent to the photoelectric conversion element; and a peripheral region in which a peripheral circuit including a driving circuit driving the photoelectric conversion element and the modulation part is disposed, wherein the peripheral region includes a transistor that a sidewall is formed on a side of a gate electrode; and the pixel region includes a transistor that no sidewall is formed on a side of a gate electrode.

Abstract: Affords efficiently and at low cost practical, tiny light-emitting devices having an optically diffractive film on their light-output face. A light-emitting device (LD) includes a diffractive film (DF) formed on its light-output face; the diffractive film includes a transparent DLC (diamond-like carbon) layer; and the DLC layer includes a modulated-refractive-index diffraction grating containing local regions of relatively high refractive index and local regions of relatively low refractive index.

Abstract: A substrate for a semiconductor device includes a substrate, a thin film transistor that is provided on the substrate, a wiring line that is provided above the thin film transistor, an interlayer insulating film that electrically isolates the wiring line from at least a semiconductor layer of the thin film transistor, and a contact hole that has a first hole being cut in the interlayer insulating film and extending in a longitudinal direction in plan view on a substrate surface and a plurality of second holes passing through the interlayer insulating film from a bottom of the first hole to reach a surface of the semiconductor layer and being arranged in the longitudinal direction of the first hole. The connect hole connects the wiring line to the semiconductor layer via the interlayer insulating film.

Abstract: Techniques for inspecting semiconductor devices. An inspection condition using chip matrix data and chip size data is set. The intricate circuit patterns of at least one semiconductor device is inspected with the inspection condition. In an embodiment of the present invention, inspection uses images formed by the irradiation of white light, a laser light, or an electron beam. Data obtained from the inspection is used to generate a revised inspection condition. Semiconductor devices are inspected using the revised inspection condition.

Abstract: A thin-film semiconductor device includes, on the same substrate, a thin-film transistor, in which an active layer, a gate insulating film, and a gate electrode are laminated, and a capacitive element, in which a first electrode formed using a semiconductor film formed on the same layer as the active layer, a dielectric film formed on the same layer as the gate insulating film, and a second electrode formed on the same layer as the gate electrode are laminated. In the capacitive element, in plan view, the dielectric film has a first region that is formed in a region inside outer circumferences of the first and second electrodes and that has a film thickness smaller than that of the gate insulating film, and a second region that is formed in a region outside the first region and that has a film thickness larger than that of the first region.

Abstract: A method of forming a capacitor includes forming a first capacitor electrode over a semiconductor substrate. A capacitor dielectric region is formed onto the first capacitor electrode. The capacitor dielectric region has an exposed oxide containing surface. The exposed oxide containing surface of the capacitor dielectric region is treated with at least one of a borane or a silane. A second capacitor electrode is deposited over the treated oxide containing surface. The second capacitor electrode has an inner metal surface contacting against the treated oxide containing surface. Other aspects and implementations are contemplated.

Abstract: A solid state imaging device includes: a plurality of photoelectric conversion elements which are arranged in a two-dimensional matrix on a semiconductor chip; vertical transfer registers including a vertical transfer channel and vertical transfer electrodes, respectively, for transferring signal charge read out of the photoelectric conversion elements in the vertical direction; a horizontal transfer register including a horizontal transfer channel and horizontal transfer electrodes for transferring the signal charge transferred from the vertical transfer registers in the horizontal direction; bus interconnects which are electrically connected to the vertical transfer electrodes and the horizontal transfer electrodes; and pads for external connection which are electrically connected to the bus interconnects. The pads are formed above the bus interconnects and the horizontal transfer electrodes.

Abstract: Before cutting a gang-printed substrate having a multiplicity of liquid crystal display panel regions provided thereon into individual liquid crystal display panels, a voltage is applied to all of the multiplicity of liquid crystal display panel regions to inspect display defects, polymerize a monomer in the liquid crystal component, and control alignment of the liquid crystal, which allows the time required for a voltage applying step to be reduced and allows a reduction in the manufacturing cost. A dispenser injection process is used to allow a liquid crystal to be injected between mother boards that have not been cut into individual display panels, and a voltage is applied after the pair of glass substrates are combined and before they are cut into individual display panels to perform a test on display defects (dynamic operating test), pretilt control, and an aligning process.

Abstract: A semiconductor device comprises a drift region of a first conduction type, a base region of a second conduction type, a source region of the first conduction type, a contact hole, a column region of the second conduction type, a plug and wiring. The drift region formed on a semiconductor substrate of the first conduction type. The base region of a second is formed in a prescribed region of the surface of the drift region. The source region is formed in a prescribed region of the surface of the base region. The contact hole extends from the source region surface side to the base region. The column region is formed in the drift region below the contact hole. The plug comprises a first conductive material and fills the contact hole. The wiring comprises a second conductive material and is electrically connected to the plug.

Abstract: A semiconductor manufacturing method that includes providing a substrate, providing a layer of material over the substrate, providing a layer of photoresist over the material layer, patterning and defining the photoresist layer, depositing a layer of polymer over the patterned and defined photoresist layer, wherein the layer of polymer is conformal and photo-insensitive, and etching the layer of polymer and the layer of material.

Abstract: A static memory element includes a first inverter having an input coupled to a left bit node and an output coupled to a right bit node. A second inverter has an input coupled to the right bit node and an output coupled to the left right bit node. A first fully depleted semiconductor-on-insulator transistor has a drain coupled to the left bit node, and a second fully depleted semiconductor-on-insulator transistor has a drain coupled to the right bit node.

Abstract: A semiconductor device should have a structure that allows locating electronic components in a region under a bonding pad. The semiconductor device includes a bonding pad constituting the external connection terminal; a region under the bonding pad including at least two copper layers and a connection via plug, under said bonding pad, disposed so as to connect copper layers that form a pair out of the at least two copper layers; a seal ring constituted of an annular conductor, disposed so as to surround the region under the bonding pad, and to connect a lower one of the copper layers that form said pair to copper layer to form a pair with the lower copper layer; and an interconnect connected to the bonding pad outside the seal ring.

Abstract: Provided are a semiconductor light-emitting device having nano-needles and a method of manufacturing the same. The provided semiconductor light-emitting device improves the extraction efficiency of photons, and includes a gallium nitride (GaN) group multi-layer and nano-needles grown on the GaN group multi-layer. The nano-needles improve the extraction efficiency of photons.

Abstract: An apparatus including a first substrate comprising a first set of contact points; a second substrate including a second set of contact points coupled to the first substrate through interconnections between a portion of the first set of contact points a portion of the second set of contact points; and a composition disposed between the first substrate and the second substrate including a siloxane-based aromatic diamine.

Abstract: A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.