Abstract: A multi-layer printed wiring board includes a board covered with a conductor layer, an interlayer insulating resin layer, an etched metal film on the interlayer insulating resin layer, and a via hole. The interlayer insulating resin layer has a fibrous substrate. The via hole has an electrolytic plated film and an electrolessly plated film and connects the conductor layer of the board and the etched metal film.

Abstract: A wired circuit board that can provide improved reliability on connection between the terminal portions and the external terminals while ensuring high productivity and cost reduction, and a production method thereof. After a conductive pattern 3 including terminal portions 6 to connect with external terminals 22 of an electronic component 21 and criterion marks 8 to determine presence or absence of an inhibitory portion 23 that may be formed due to formation of an insulating cover layer 4 to inhibit connection between the terminal portions 6 and the external terminals 22 are formed on the insulating base layer 2 simultaneously, the insulating cover layer 4 to cover the conductive pattern 3 and an opening 7 from which the terminal portions 6 and the criterion marks 8 are exposed is formed. Thereafter, the presence or absence of the inhibitory portion 23 is determined with reference to the criterion marks 8 exposed from the opening 7 of the insulating cover layer 4.

Abstract: A rigid-flex circuit board system that can be manufactured using less expensive and more reliable rigid circuit board methods and equipment, and can maintain rigidity and dimensional stability until the time when it is first desired to flex.

Abstract: A board for high frequency device includes a plurality of electrode terminals connected to an electronic component or another electronic circuit board by flowable conducting material such as solder, and grooves formed in an electrode terminal of the plurality of electrode terminals and capable of accumulating solder or the like. Specifically, a high frequency component is mounted on the front surface of the high frequency device board, and the plurality of electrode terminals are formed on the rear surface of the high frequency device board. A ground electrode terminal included in the plurality of electrode terminals is formed at the center of the rear surface of the high frequency device board and connected to a ground. The grooves for accumulating solder or the like are formed in the ground electrode terminal. This reduces the possibility of short-circuit between adjacent electrode terminals due to the flowable conducting material such as solder.

Abstract: A method is for fabricating an embedded capacitance printed circuit board assembly (400, 1100). The embedded capacitance printed circuit board assembly includes two embedded capacitance structures (110). Each capacitance structure (110) includes a crystallized dielectric oxide layer (115) sandwiched between an outer electrode layer (120) and an inner electrode layer (125) in which the two inner electrode layers are electrically connected together. A rivet via (1315) and a stacked via (1110) formed from a button via (910) and a stacked blind via (1111) may be used to electrically connect the two inner electrode layers together. A spindle via (525) may be formed through the inner and outer layers. The multi-layer printed circuit board may be formed from a capacitive laminate (100) that includes two capacitance structures.

Abstract: A high electrical performance semiconductor package is proposed. A carrier is provided having a first surface, an opposite second surface, and conductive vias for electrically connecting the first surface to the second surface. A chip is attached to the first surface of the carrier. A plurality of via lands are disposed peripherally on the first surface of the carrier and electrically connected to the vias. A plurality of conductive regions are disposed on the second surface of the carrier and electrically connected to the vias. A plurality of fingers are disposed around the chip and electrically connected to the via lands by conductive traces formed on the first surface of the carrier. A plurality of bonding wires electrically connect the chip to the fingers. Lengths of the wires for transmitting differential pair signals are substantially equal, and lengths of the traces for transmitting the differential pair signals are substantially equal.

Abstract: The present invention provides a circuit substrate which has a substrate including a first surface and a second surface opposite to the first surface. A first and a second conductor patterns are formed on the first and the second surface respectively. The second surface has larger surface roughness than the first surface. When the circuit substrate is mounted on another substrate, it is mounted to the other substrate via the second surface. The circuit substrate is capable of mounting a device or being mounted on another substrate to form an apparatus.

Abstract: A multilayer wiring board having a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.

Abstract: Embodiments of the present invention include forming a thin, conformal, high-integrity dielectric coating between conductive layers in a via-in-via structure in an organic substrate, using an electrocoating process to reduce loop inductance between the conductive layers. The dielectric coating is formed using a high dielectric constant material such as an organic polymer or an organic polymer mixture. Embodiments of the present invention also include forming a thin, dielectric coating between conductive layers on a substantially planar substrate material and providing an embedded capacitor to reduce loop inductance.

Abstract: A circuit board threadplate for connection of a component to a circuit board is provided wherein such threadplate may be mechanically mounted to a circuit board without the use of manual labor. Specifically, the threadplate is compatible with present Surface Mount Technology robotic placement machines. Such circuit board threadplate includes a hollow substantially cylindrical member forming an extruded neck having an elongated section and a substantially flat surface at a first end of the elongated section and a flange extending from a second end of the elongated section. The flange provides a substantially flat surface suitable for soldering onto a surface of a circuit board. Additionally, the threadplate includes a cylindrical cavity positioned inside the substantially cylindrical member, extending in a direction aligned with the substantially cylindrical member. The cylindrical cavity may have a thread pattern suitable for receiving a screw-type fastener.

Abstract: An intermediate board has a board core formed by a main core body and a sub-core portion. The main core body has a plate-like shape and includes an open sub-core housing portion in which the sub-core portion is housed. A first terminal array of the board core has an area that overlaps an orthogonal projection of the sub-core portion. The latter incorporates a laminated ceramic capacitor formed by first and second conductor layers with a ceramic (dielectric) layer therebetween. The first layer is connected to first and second side terminals of a first type while the second layer is connected to first and second side terminals of a second type. The housing portion has an inner edge which, in cross section, is of a quadrate shape, and a radius portion is formed at each corner having a dimension of between 0.1 and 2 mm.

Abstract: An exemplary liquid crystal display device (200) includes a liquid crystal display panel (21), and a flexible printed circuit (2) joined to the liquid crystal display panel. The flexible printed circuit includes a substrate (20). The substrate includes a plurality of first conductive lines (210) and second conductive lines (230). The first conductive lines include a plurality of first patches (220). The second conductive lines include a plurality of second patches (240). The first patches are arranged side by side oppositely oriented relative to each other in alternating fashion. The second patches are arranged side by side oppositely oriented relative to each other in alternating fashion.

Abstract: A multilayer substrate having a bonding surface is disclosed. One embodiment of the substrate may comprise a bypass capacitor connection pad disposed on the bonding surface. The bypass capacitor connection pad may have a bypass capacitor power pad and a bypass capacitor ground pad. The substrate may also comprise a plurality of power vias routed from the bypass capacitor power pad to a first redistribution layer spaced apart from the bonding surface and a plurality of ground vias routed from the bypass capacitor ground pad to the first redistribution layer. The substrate may further comprise a plurality of power and ground vias routed from the first redistribution layer to a second redistribution layer according to a power and ground via pattern array, wherein the plurality of ground vias are jogged at the first redistribution layer to the plurality of power vias to form the power and ground via pattern array.

Abstract: A method and structure are provided for creating printed circuit boards with stepped thickness. A non-laminating breakaway material layer is selectively placed between layers of the printed circuit board. A perimeter portion of the printed circuit board near the breakaway material layer is scored. Then the breakaway material layer and adjacent layers between the perimeter of the printed circuit board are removed.

Abstract: Disclosed is a printed circuit board which is advantageous in terms of high capacitance by embedding capacitors comprising polymer capacitor pastes with high-dielectric constant coated on an inner layer of the printed circuit board and then semi-dried to a state of B-stage.

Abstract: A wired circuit board holding sheet that can permit easy judgment on whether a cutting notch formed has a predetermined depth, and a production method of the wired circuit board holding sheet that can produce the wired circuit board holding sheet simply and easily. In the wired circuit board holding sheet 1 comprising a sheet 2 holding therein a plurality of separable wired circuit boards 3, the respective wired circuit boards 3 are held in the sheet 2 via joints 4 to be cut, and cutting notches 6 to facilitate cutting of the joints 4 and marking notches 7 to indicate that the cutting notches 6 have a predetermined depth to cut the joints 4 are formed simultaneously in both front and back surfaces of the joints 4 by using punches having combination of a main punch portion 13 and a sub-punch portion 14.

Abstract: To provide a component mounting substrate and a component mounting structure which absorb stresses caused by impact or by the difference in the thermal extension coefficient between substrate and component, without increasing the required accuracy in soldering the substrate and the component together. The substrate, which is to be mounted with a component having one or more solder joints via which the component is connected to the substrate, has a depressed part thereof formed on its component side, on which one or more electrodes are provided to be closely joined with the solder joints. The depressed part is filled with a filling material with rigidity different from that of a material making up the substrate body, such that the filling material is flush or almost flush with the surface of the component side of the substrate.

Abstract: A circuit board assembly that makes use of a low-temperature co-fired ceramic (LTCC) substrate, and a process for producing the assembly. The substrate contains at least first and second regions formed by a plurality of first ceramic layers and at least one second ceramic layer, respectively, that are superimposed and bonded to each other. Conductor lines are present on at least some of the first ceramic layers so as to be between adjacent pairs of the layers. Electrically-conductive vias electrically interconnect the conductor lines on different first ceramic layers, and a surface-mount IC device is mounted to the substrate. The first ceramic layers are formed of electrically-nonconductive materials, while the one or more second ceramic layers contain thermally-conductive particles dispersed in a matrix of electrically-non-conductive materials, such that the one or more second ceramic layers are more thermally conductive than the first ceramic layers.

Abstract: A flexible printed wiring board includes a first conductor layer in the element mounting part adjacent to the top surface of the wiring board; a second conductor layer in the element mounting part adjacent to the bottom surface of the wiring board; and a third conductor layer between the first conductor layer and the second conductor layer, wherein the first and third conductor layers extend through and beyond the bending part, and the second conductor layer is absent in the bending part.

Abstract: A multi-layer circuit board includes first, second, third, fourth, fifth, sixth and seventh insulating substrates; first, second, third, fourth and fifth signal wiring layers; first and second ground wiring layers; and a power wiring layer. Each of the first and seventh insulating substrates has a thickness ranging from 2.5 to 6.5 mil. Each of the second, fourth and sixth insulating substrates has a thickness ranging from 3 to 9 mil. Each of the third and fifth insulating substrates has a thickness ranging from 3 to 23 mil. The first signal wiring layer has a first resistance with respect to the first ground wiring layer. The second signal wiring layer has a second resistance with respect to the first ground wiring layer and the power wiring layer. The third signal wiring layer has a third resistance with respect to the first ground wiring layer and the power wiring layer. The fourth signal wiring layer has a fourth resistance with respect to the second ground wiring layer and the power wiring layer.