Abstract: A liquid crystal substrate inspection apparatus includes an inspection device for inspecting a liquid crystal substrate and a prober replacing device disposed adjacent to the inspection device. The prober replacing device has a conveying device for conveying a prober for inspecting a liquid crystal substrate. The inspection device and the prober replacing device are arranged next to each other, so that it is possible to shorten an inspection time of the liquid crystal substrate. The prober replacing device has the conveying device for automatically conveying the prober to the inspection device.

Abstract: Systems and methods for reducing temperature dissipation during burn-in testing are described. A plurality of devices under test are each subject to a body bias voltage. The body bias voltage reduces leakage current associated with the devices under test. Accordingly, heat dissipation is reduced during burn-in. The body bias voltage is selected to achieve a desired junction temperature at the devices under test.

Abstract: A module (236, 236?) containing an integrated testing system (108) that includes one or more measurement engines (200, 202) tightly coupled with a compute engine (208). The one or more measurement engines include at least one stimulus instrument (212) for exciting circuitry of a device-under-test (104) with one or more stimulus signals, and at least one measurement instrument (216) that measures the response of the device-under-test to the stimulus signal(s) and generates measurement data. The compute engine includes computation logic circuitry (800) for determining whether or not the circuitry aboard the device-under-test passes or fails. The integrated testing system further includes a communications engine (204) providing two-way communications between the integrated testing system automated testing equipment (116) and/or a dedicated user interface (140) residing on a host computer (136).

Abstract: The present invention provides an apparatus and a method for used in a board inspection capable of an inspection of defect in a circuit board with high resolution over a wide range. The method is used for manufacturing a sensor probe comprising layers which include an electrode layer, a lead wire layer and a bridge layer (41). These layers are laminated on a base (30) in the form of a flat plate composed of silicon. The electrode layer is comprised of a set of sensor electrodes (40). The lead wire layer is comprised of a set of lead wires (50) for transferring a signal externally. The bridge layer couples between the electrode layer and the lead wire layer. The lead wire layer is formed by means of depositing aluminum in accordance with a first mask pattern. The bridge layer is formed by means of growing each of bridge wires (41) in the direction perpendicular to the base. The bridge wires extend in the direction perpendicular to the base and are connected to respective lead wires of the lead layer.

Abstract: An apparatus for determining a planarity of a first structure configured to hold a probing device to the planarity of a second structure configured to hold a device to be probed is disclosed. In one example of the apparatus, a plurality of moveable push rods are disposed in a substrate, which is attached to the first structure. In initial non-displaced positions, the push rods correspond to a planarity of the first structure. The second structure is then brought into contact with the push rods, displacing the push rods into second positions that correspond to a planarity of the second structure. In another example of the apparatus, beams of light are reflected off of reflectors disposed on the first structure and onto sensors disposed on the second structure. The locations of the reflected beams on the sensors are noted and used to determine the planarity of the first structure with respect to the second structure.

Abstract: A method of electrical testing devices such as integrated circuits that include conductive pads formed on the surface. A material having a desired bulk resistivity and viscosity is applied to either the device or the electrical probe prior to testing. The application of the material has been found to substantially reduce the need for cleaning of the probe.

Abstract: A testing device for determining the condition of hardware and/or software components of a computing (target) device is disclosed. The testing device includes a memory component, at least one connector and I/O software suitable for enabling the testing device to communicate with a target device as though the testing device is a peripheral component of the target device. Preferably, the connector is a USB connector. Also, preferably, the memory component includes an unwritable section and a protected section as well as a writable section.

Abstract: An integrated circuit, in accordance with one embodiment of the present invention, includes a first device under test (DUT) module coupled to a first ring oscillator module and a second DUT module coupled to a second ring oscillator module. A dielectric layer of the first DUT is stressed during a first mode, thereby causing time dependent dielectric breakdown in the first dielectric layer. A dielectric layer of the second DUT is maintained as a reference. The operating frequency of the first ring oscillator module, during a second mode, is a function of a gate leakage current of the stressed dielectric layer. The operating frequency of the second ring oscillator module, during the second mode, is a function of a gate leakage current the reference dielectric layer. The integrated circuit may also include a comparator module for generating an output signal as a function of a difference between the operating frequency of the first and second ring oscillator modules.

Abstract: In an electronic control type throttle valve apparatus, a throttle valve position sensor includes a magnet provided at a throttle valve shaft and a hall element which output changes in accordance with the rotational deviation of the magnet. The hall element is housed within a sensor chip together with an amplifier circuit. In a control unit provided separately from the sensor chip, there are provided with an A/D conversion circuit for converting an analog output from the hall element through the amplifier circuit into a digital signal and a digital processing circuit for performing temperature compensation and zero-span adjustment of the hall element in a digital manner.

Abstract: An electrical test device including a substrate and a plurality of test pads. The test pads are disposed on a second surface of the substrate. Each test pad has a test hole, and first and second isolation slots. The first isolation slot is disposed on the periphery of the test hole, and defines a signal region for connecting a signal terminal of a test probe. The second isolation slot is disposed on the periphery of the first isolation slot, and a ground region is defined between the first and second isolation slots. The ground region is used for connecting a ground terminal of the test probe. The test pad can match with the test probe so that the test probe can connect to the test pad for providing signal to the test probe. The electrical test device can easily measure the real electrical characteristic of the signal from the substrate.

Abstract: A mechanism is provided to address a structure under test and to identify a point of failure. A test open line carries a signal that indicates whether a structure under test is open or closed. A test short line carries a signal that indicates whether a structure under test is shorted. A test structure may include an array of cells, where each cell includes a circuit including structures to test. The cells may be scanned using scan only latches and signals on the test open and/or test short lines may be recorded. A test circuit may include a digital mode and an analog mode. The digital mode provides an open or closed value. The analog mode includes a programmable load. The output of the analog mode provides a resistance value that is relative to the programmable load.

Abstract: A wafer staging platform for a wafer inspection system for inspecting of semiconductors or like substrates and method of handling wafers. The platform and related method is designed to reduce the amount of time needed to exchange wafers on a processing tool. The staging platform can include a vacuum-assisted feature. The method of handling includes simultaneously processing a plurality of wafers, during which the staging platform is employed to temporarily store wafer(s) in close proximity to a next in line station.

Abstract: A curved spring structure includes a base section extending parallel to the substrate surface, a curved cantilever section bent away from the substrate surface, and an elongated section extending from the base section along the substrate surface under the cantilevered section. The spring structure includes a spring finger formed from a self-bending material film (e.g., stress-engineered metal, bimorph/bimetallic) that is patterned and released. A cladding layer is then electroplated and/or electroless plated onto the spring finger for strength. The elongated section is formed from plating material deposited simultaneously with cladding layers. To promote the formation of the elongated section, a cementation layer is provided under the spring finger to facilitate electroplating, or the substrate surface is pre-treated to facilitate electroless plating.

Abstract: A device and method for current measurement in a conductor and, in particular, a method to feed the devices of the invention in order to interpret the information provided. The method is based on the exploitation of discrete sampling of the information provided from the devices of the invention and allows the feeding of these devices to be modulated in order to activate the devices only when necessary.

Abstract: A probe system for providing signal paths between an integrated circuit (IC) tester and input/output, power and ground pads on the surfaces of ICs to be tested includes a probe board assembly, a flex cable and a set of probes arranged to contact the IC's I/O pads. The probe board assembly includes one or more rigid substrate layers with traces and vias formed on or within the substrate layers providing relatively low bandwidth signal paths linking the tester to probes accessing some of the IC's pads. The flex cable provides relatively high bandwidth signal paths linking the tester to probes accessing others of the IC's pads.

Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light to/from the top of the wafer. A wafer level test system uses an optical probe to search for and align with an optical alignment loop. The test system uses a located alignment loop as a reference point to locate other devices on the wafer. The test system tests the operation of selected devices disposed on the wafer. The alignment loop is also used as a reference device for an adjacent device of unknown performance.

Abstract: A plurality of chip regions are defined over a surface of a semiconductor substrate and separated from one another by a scribe region. A plurality of main pads are disposed in the chip regions and a test element group is disposed at the scribe region. The test element group is electrically connected to the main pads through interconnections.

Abstract: An enhanced membrane interface probe (MIP) is disclosed including: a modular membrane interface probe (MIP) sensor constructed from a plurality of modular components allowing field serviceable replacement of any malfunctioning components of the plurality of modular components. The modular MIP can include: an external barrel having a cavity; or (or throughout means and/or, i.e., a logical or operation) an inner core barrel assembly field-insertable into the cavity having a heater cavity, where the heater cavity is adapted to receive a field-insertable removable cartridge heating element. The modular MIP can include a removable conductivity nose assembly, a field-insertable removable cartridge heating element, or a waterproof electrical connector and/or an o-ring seal.

Abstract: A power monitoring system for electrical panels providing multi-phase power, with multiple current sensors. The disclosed power monitoring system preferably determines the instantaneous power provided to each of multiple loads by sensing the potential and phase of each conductor that supplies power to one or more of the respective loads.

Abstract: An electric power usage and reporting system for collecting electric power demand readings from multiple properties which may be either commonly owned or leased by the same company, processing the demand data to generate KWH and KW information on an individual property basis and on a combined properties basis and generating a report including the KWH usage and KW demand information. The report includes information on electric power KWH usage and KW demand in the aggregate and with respect to each property and includes information on coincident KW demand in the aggregate and with respect to each property.