Abstract: A method and apparatus for measuring current, and particularly bi-directional current, in a field-effect transistor (FET) using drain-to-source voltage measurements. The drain-to-source voltage of the FET is measured and amplified. This signal is then compensated for variations in the temperature of the FET, which affects the impedance of the FET when it is switched on. The output is a signal representative of the direction of the flow of current through the field-effect transistor and the level of the current through the field-effect transistor. Preferably, the measurement only occurs when the FET is switched on.

Abstract: A process condition measuring device and a handling system may be highly integrated with a production environment where the dimensions of the process condition measuring device are close to those of a production substrate and the handling system is similar to a substrate carrier used for production substrates. Process conditions may be measured with little disturbance to the production environment. Data may be transferred from a process condition measuring device to a user with little or no human intervention.

Abstract: A method for testing integrated circuit devices and loading such devices into a test board for further testing and an apparatus therefor is disclosed. The method allows for selection between two modes of operation. In a first mode, the integrated circuit devices are subjected to an electrical test before being placed into the test board for further testing. In a second mode, the integrated circuit devices are tested after being placed in the test board. The apparatus allows for the selection between the first mode and the second mode. In either mode, information about the tested devices and the sockets in the test board is used to load the test boards intelligently. Intelligent loading means that devices under test (DUTs) are not placed in bad sockets and devices that do test bad are removed from the test board, with an option of replacing the failed DUT with another DUT before subsequent environmental testing of the DUTs in the test board is carried out.

Abstract: A method of manufacturing a contact probe includes an electroforming step of, using a resist film (522) arranged on a substrate (521) as a pattern frame having a shape corresponding to a contact probe, performing electroforming to fill a gap in the resist film (522) to form a metal layer (526), a tip end shaping step of obliquely removing and sharpening that part of the metal layer (526) which serves as a tip end portion of the contact probe, and a take-out step of taking out only the metal layer (526) from the pattern frame.

Abstract: A system (5) for testing and failure analysis of an integrated circuit (10) is provided using failure analysis tools (40, 50, 60). An analysis module (30) having a number of submodule test structures is incorporated into the integrated circuit design. The test structures are chosen in dependence upon the failure analysis tools (40, 50, 60) to be used. The rest of the integrated circuit contains function modules (20) arranged to provide normal operating functions. By analysing the submodule test structures of the analysis module (30) using the failure analysis tools (40, 50, 60), physical parameters of the integrated circuit (10) are obtained and used in subsequent testing of the function modules (20) by the failure analysis tools (40, 50, 60), thus simplifying the testing of the integrated circuit (10) and reducing the time taken to perform a failure analysis procedure.

Abstract: A ring type current sensor has a C-shaped core and a magnetic sensor. An inner circumference of the core defines a detection field of a current. Both end faces in a circumferential direction of the core forms a gap therebetween. A cross-sectional area of the core perpendicular to the circumferential direction gradually increases from the both end faces to a portion opposite to the gap in a diametrical direction. A magnetic sensor is disposed in the gap. Preferably, the core is a stack of a plurality of core plates having different shapes.

Abstract: A contact probe including a length of wire with head, coil and tail sections. The head and tail sections may be lengthened and offset from the longitudinal axis of the coil section to allow the probes to be densely packed in a substrate material. Two probes may be interleaved to provide improved electrical performance of the probe.

Abstract: A probe provides electrical communication between a coating and a processing system. One optional feature includes an outwardly projecting, electrically conductive engaging member that is held in a captivation structure releasably retained in a housing and engages a contact that is inside the probe and connected with the processing system. Another optional feature of the probe provides the electrically conductive engaging member in the form of a pin or pins captivated in a light-transmissive structure adjacent a light-emitting source. Another optional feature of the probe includes a restraining structure that defines a frustoconical seat for engaging a conical distal end of an electrically conductive pin that is adapted to contact the coating.

Abstract: Methods and apparatus are provided for testing to determine the existence of defects and faults in circuits, devices, and systems such as digital integrated circuits, SRAM memory, mixed signal circuits, and the like. In particular, methods and apparatus are provided for detecting faults in circuits, devices, and systems using input control signals to generate controlled-duration, controlled pulse-width, transient power supply currents in a device under test, where said transient power supply currents are of controllable bandwidth and can be used as observables to determine faulty or defective operation. Additionally, methods and apparatus are provided to permit high bandwidth sensing of transient supply currents as need to preserve the narrow widths of these current pulses. These methods may include autozero techniques to remove supply current leakage current and DC offsets associated with practical current sensing currents.

Abstract: A method monitors a vacuum interrupter for leakage or loss of vacuum. The vacuum interrupter includes a line side, a load side and separable contacts electrically connected therebetween. The line side has a line side voltage and the load side has a load side voltage. The method includes determining whether the separable contacts of the vacuum interrupter are intended to be open or closed, comparing the line side voltage to the load side voltage, and determining the leakage or the loss of vacuum when the separable contacts of the vacuum interrupter are intended to be open and when the load side voltage is within a predetermined amount of the line side voltage.

Abstract: An apparatus for electrical testing having probes (201) constructed of metal elements (201a) of about equal size bonded together in substantially linear sequence. Further an insulating holder (202) having first and second surfaces and a plurality of metal-filled vias (210) traversing the holder from the first to the second surface; the vias form contact pads on the first and second surfaces. The contact pads (210a) of the first holder surface have a probe attached so that the probe is positioned about normal to the surface. A sheet (203) of resilient insulating material, which has first and second surfaces and a thickness traversed by a plurality of conducting traces (220), has its first sheet surface attached to the second holder surface so that at least one of the traces contacts one of the contact pads, respectively, to provide an electrical path to the second sheet surface.

Abstract: An electrical inspection apparatus performs highly accurate electrical inspection using an inspection probe on any type of printed board without changing an instrument therefor. It comprises a reference position regulating member for positioning the printed board precisely at a predetermined reference position and a pressing member for pressing the printed board oppositely to the reference position regulating member. An inspected portion (e.g., a contact) of the printed board is fixed under tension and is precisely located at the reference position in planar condition by being contacted and positioned by the reference position regulating member, whereby it is subjected to electrical inspection using the inspection probe accompanied with the reference position regulating member and/or the pressing member. Thus, it is possible to prevent the inspection probe from being unexpectedly damaged or destroyed by excessive force that is produced due to inaccurate positioning therefor.

Abstract: A switch measurement system is disclosed for measuring characteristics of a switch while the switch is mounted to a product adjacent a product surface. The switch types may include linear, pivot and rotary types. The switch measurement system preferably has a control unit for driving a motor and receiving and storing input from a force or torque sensor. A fixturing setup preferably includes a mounting base, and three legs extending from the mounting base. Each of the legs is selectively adjustable in length and includes an end adapted for mounting against the product surface where the legs can vary the location and orientation of the mounting base relative to the product. Also, a measurement unit includes a motor fixed relative to the mounting base and includes a motor shaft extending therefrom, and a force sensor or a torque sensor, depending upon the switch measurement arrangement, interposed between the motor shaft and the switch.

Abstract: A module for a packaged circuit. In one embodiment, the module includes at least one ground terminal and at least one signal terminal; a circuit board configured to hold the packaged circuit where the circuit board has an interface terminal and one or more traces electrically connecting the at least one signal terminal of the packaged circuit to the interface terminal; and a conductive bracket having a first side, the first side configured to support the circuit board and having at least one clip, the clip configured to hold at least a portion of the circuit board and to contact the at least one ground terminal of the packaged circuit, the conductive bracket configured to provide at least some electromagnetic shielding for the packaged circuit from sources of electromagnetic energy located opposite the first side of the bracket.

Abstract: There is provided a method for calculating a more accurate metal impurity concentration contained in a silicon wafer by correcting measured values with a calibration based on a dependent relationship of the minority carrier diffusion length with a period of time elapsing from the activation to the actual measurement, an electric resistivity, and a temperature if there is such a relationship, in the measurement of the metal impurity concentration by utilizing the surface photovoltage. In the calibration step, such dependent relationship may be obtained by utilizing the metal impurity concentration measured by methods of different principles and actually measured values are corrected in light of the dependent relationship in the measuring step such that the metal impurity concentration is measured more accurately.

Abstract: The present invention provides a method and apparatus for optimizing the burn-in of integrated circuits. One embodiment of the method comprises: performing a first portion of the burn-in process of the integrated circuit; monitoring a power dissipation of the integrated circuit during the first portion of the burn-in process; increasing a burn-in temperature until the power dissipation of the integrated circuit reaches a predetermined maximum power dissipation; and performing a subsequent portion of the burn-in process of the integrated circuit at the increased burn-in temperature.

Abstract: An apparatus and method for coupling a test head and probe card in an IC testing system incorporating patterned divider elements (24) disposed between rows of signal conductors (22) to provide matching characteristic impedance values along each row of signal conductors. The divider elements have a patterned conductive layer formed thereon that is electrically connected to ground, and a method for determining a useful pattern is provided. Test dividers (24) fabricated with openings of various size and shape are used to construct transmission lines. The impedance of these lines is measured, and the results are used to interpolate an appropriate opening size and shape to achieve a desired transmission line impedance.

Abstract: A method of testing circuit chips includes providing test chips, the test chips being circuit chips to be tested, emulating a first type of test handler positioner for a circuit chip coupling device that is configured to couple to the first type of test handler, and using a test handler positioner connected to the circuit chip coupling device to couple the circuit chip coupling device to a selected test chip, to move the test chip to a desired test location, and to remove the test chip from the test location.

Abstract: An embodiment of the present invention is a technique to monitor on-die device power grid. A sensor circuit generates a ground reference (GR) signal and N power reference (PR) signals forming a ladder according to a programmable configuration. The GR signal tracks a device ground signal of a device and the PR signals track a device power signal of the device. A comparator circuit compares the GR signal with the N PR signals to provide N comparison output signals, the N comparison output signals indicating position and time that the GR reference signal moves across the ladder.

Abstract: Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes.