Abstract: In one embodiment, a tester interface module for connecting a plurality of signal paths from at least one electronic assembly to at least one other electronic assembly is provided. The interface module includes a capture board having center conductor vias with center conductor holes extending through the capture board. Axial cables secured to the capture board have center conductors extending at least part way through a corresponding center conductor hole of the center conductor via. An interface component is adjacent to the capture board, the conductor paths being conductively bonded to the conductor vias of the capture board so as to electrically connect center conductors to corresponding conductor paths. The conductor paths of the interface component are arranged to allow connection with an electronic assembly.

Abstract: A probe head for testing semiconductor wafers has a probe contactor substrate have a first side and a second side. A plurality of probe contactor tips are coupled to the first side and the plurality of tips lie in a first plane. A plurality of mounting structures are coupled to the second side with each of the mounting structures each having a top surface lying in a second plane, wherein the first plane is substantially parallel to the second plane.

Abstract: A direct current detection circuit has a zero-phase current transformer with source lines inserted therethrough for detecting current differences among them and generates a comparison voltage value based on a divided voltage value obtained between the zero-phase current transformer and a voltage divider resistor according to a change in the self-impedance of the zero-phase current transformer. An offset current is passed through the zero-phase current transformer to make it possible to detect on the basis of the comparison voltage value a direct current value in a range which is otherwise difficult to detect accurately on the basis of the comparison voltage value because of influence of hysteresis characteristic of the zero-phase current transformer. A control circuit detects a present direct current value based on the comparison voltage value and the value of the offset current.

Abstract: A guide for tip to transmission path contact includes a guide insulator with at least one passageway defined therein. The passageway has a tip passageway end and a transmission path passageway end. The guide insulator has an adhesive surface with adhesive associated therewith. The adhesive may be semi-permanent or permanent adhesive. The adhesive is for securing the guide insulator such that the passageway allows access to the transmission path. When not in use, the adhesive may attach the guide insulator to a nonstick surface of a backing surface.

Abstract: In a high frequency circuit property measurement method, prior to property measurements of a high frequency circuit with RF measurement probe heads, RF measurement probe heads are calibrated using a calibration pattern comprising a signal line having a characteristic impedance and extending on a dielectric substrate, a first GND pad having one end disposed close to and at an interval from a first end of the signal line, a second GND pad having one end disposed close to and at an interval from a second end of the signal line, and a conductor electrically coupling the first GND pad to the second GND pad.

Abstract: An apparatus for diagnosing a fault in a semiconductor device includes an laser applying unit, a detection/conversion unit, and a fault diagnosis unit. The semiconductor device is held at a state where no bias voltage is applied thereto. The laser applying unit then applies a pulse laser beam having a predetermined wavelength to the semiconductor device so as to two-dimensionally scan the semiconductor device with the pulse laser beam. The detection/conversion unit detects an electromagnetic wave generated from a laser applied position in the semiconductor device, and converts the detected electromagnetic wave into a time-varying voltage signal that corresponds to a time-varying amplitude of an electric field of the electromagnetic wave. The fault diagnosis unit derives an electric field distribution in the semiconductor device on the basis of the time-varying voltage signal to perform fault diagnosis on the semiconductor device.

Abstract: A test system and method for integrated circuits includes an energy source having an adjustable energy rate, and a feedback device, which measures a physical quantity at a discrete position on an integrated circuit. A control circuit adjusts the power source to externally apply energy to the integrated circuit at the discrete position. A circuit tester applies test programs to the integrated circuit while the discrete position is maintained at a value of the physical quantity in accordance with the control circuit.

Abstract: A full-wafer probe card is disclosed along with related methods and systems. The probe card includes test probes comprising cantilever elements configured and arranged with probe tips in a pattern corresponding to an array of bond pads of semiconductor dice residing on a device wafer. The probe card may be fabricated from, for example, a silicon substrate and the cantilever elements may be fabricated using known silicon micro-machining techniques including isotropic and anisotropic etching. Additionally, conductive feedthroughs or vias are formed through the probe card to electrically connect the probe tips with conductive pads on an opposing side of the substrate which interface with test contacts of external test circuitry. The conductive feedthroughs may be formed as coaxial structures, which help to minimize stray capacitance and inductance. The inventive probe card allows for improved wafer level burn-in and high frequency testing.

Abstract: A method of assembling multiple electronic components to a circuit board includes securing one electronic component to the circuit board, then, creating an association between that electronic component and an environmental condition recorder. The method further includes recording data from the environmental condition recorder. The recorded data indicates exposure of the secured electronic component to an environmental condition over time. The method also includes determining, based on the stored data, whether the secured electronic component is suitable for exposure to conditions associated with securing a second electronic component to the circuit board.

Abstract: Power measurement and control in transmission systems are affected by changes in load conditions. A method and system are provided for detecting and controlling power levels independent of such load conditions.

Abstract: A method of determining an average electrical response to a conductive layer on a set of substrates vibrating about a vibration mean is disclosed. The method includes positioning a sensor near a position on a first substrate; and measuring a first plurality of electrical responses, wherein each of the first plurality of electrical responses is function of an electrical film property response and a first substrate proximity response. The method also includes positioning the sensor near the position on a second substrate; and measuring a second plurality of electrical responses, wherein each of the second plurality of electrical responses is function of the electrical film property response and a second substrate proximity response.

Abstract: There are provided a test pattern of a semiconductor device and a test method using the same. The test pattern of the semiconductor device includes a conductive pattern disposed on a semiconductor substrate, and the conductive pattern includes a plurality of line regions, which are aligned in parallel, and spaced at a uniform interval, and a plurality of connecting regions for connecting the plurality of line regions in a zigzag shape. The test pattern includes a plurality of transistors electrically switching first ends of the adjacent line regions corresponding to the connecting region, and each transistor includes a source region, which is electrically connected to one end of one of the adjacent line regions, and a drain region, which is electrically connected to one end of the other one of the adjacent line regions. Further, a transistor selecting part is electrically connected to gates of the plurality of transistors, for selecting one of the plurality of transistors or a combination thereof.

Abstract: A method for detecting a loss of a phase in a multiphase rotating field machine, the method comprising providing a first electrical current into the machine windings to cause the current vector to assume a first current vector position, sensing a first current in at least one selected phase winding of the machine, comparing the sensed first current in the at least one selected phase winding with a first calculated current for the selected phase winding, and detecting that a first phase fault has occurred if the first calculated and sensed first currents differ by more than a predetermined value.

Abstract: A module component which includes circuit substrate 3 having one or more components 1 on at least one of the surfaces, and junction circuit substrate 5 having hollow 4, or hole, disposed corresponding to the portion of the one or more components 1 mounted on the one surface of circuit substrate 3 for fitting the mounted components 1 in. These substrates are laminated to form a single body so that mounted components 1 is contained within the inside. The above configuration ensures high reliability in the layer-to-layer connection, and enables to mount a plurality of components densely with a high dimensional accuracy. Thus a highly reliable compact module component is offered.

Abstract: The invention is a method and apparatus for a probe tip contact for electrically coupling a substrate to a probe tip. The apparatus, in one embodiment, comprises a wrap-around contact that is precision formed utilizing a hydroform tool and brazed to a surface of a substrate. In another embodiment, the apparatus comprises a contact flange, a mounting flange extending from a first edge of the contact flange in an orientation substantially perpendicular to the contact flange, and a substantially circular indentation formed in the contact flange adapted for accommodating movement of said probe tip relative to said substrate.

Abstract: A semiconductor testing device is used for testing a semiconductor device which has at least one spherical connection terminal. The testing device includes an insulating substrate having an opening formed therein at a position corresponding to the position of the spherical connection terminal, and a contact member, formed on the insulating substrate, including a connection portion which is connected with the spherical connection terminal, at least the connection portion being deformable and extending into the opening.

Abstract: A system for testing a flat panel display device includes a support plate and an electrical connector set. The support plate includes a plate body having a through hole, and is adapted to support the display device thereon such that a screen of the display device faces an upper surface of the plate body. The electrical connector set is mounted on the support plate, and is adapted to connect electrically with the display device on the support plate so as to enable activation of the display device to radiate light from the screen of the display device through the through hole. One of a light-directing component and an image-capturing unit is disposed under and is spaced apart from the support plate, to receive the light from the display device that passes through the through hole.

Abstract: An on-die device is provided to measure/detect voltage fluctuations. This may include a control unit to generate differential reference signals (such as differential current signals), a first detector unit and a second detector unit. The differential reference signals may be generated based on a Vcc reference signal and a Vss reference signal. The first detector unit may receive the differential reference signals from the control unit and may receive first voltage signals (also called monitored signals) from a first device under test (DUT) located on the die or from a first area on the die. The first detector unit may provide (or output) a first signal indicative of a voltage fluctuation (voltage droop or overshoot) of the first voltage signals. The second detector unit may receive the differential reference signals from the control unit and may receive second voltage signals (also called monitored signals) from a second device under test (DUT) located on the die.

Abstract: An IC transfer device is provided that can combat the generation of the cracks in handling the IC packages. When the hand 3 comes in contact with the IC package 4 accommodated on the tray 5, a load cell 6 comes in contact with a bottom surface of a base 10. Reference values as to a press-down amount and a press-down speed of the hand 3 are set in a setting section so as not to cause cracks in the IC package 4 due to the instantaneous load at the time of contact between the hand 3 and the IC package 4. In a transfer operation, when detecting the contact between the hand 3 and the IC package 4, a control section 20 controls a servomotor of the hand drive mechanism 22 so that the hand 3 operates according to the reference values set in the setting section.

Abstract: An effective and easy to fabricate method to test multiple integrated circuit device designs using a single, probe card design is provided. A universal, probe card design is disclosed herein to test a plurality of integrated circuit devices at the wafer level. Integrated circuit probe pads and probe card probe I/O pins are designed in grid-like pattern on a region of the substrate. Ground terminal encircles the region of the I/O pins and power terminals are provided on the substrate. The I/O terminals can have a constant pitch array or a varying pitch array. The probe card can be used for a family of integrated circuit devices. A method to test flip chip, integrated circuits using a universal probe card has also been disclosed to reduce probe card proliferation and fabrication cost.