Abstract: Feedthrough apparatus has a metal housing with an opening therein and a base having a surface at the opening. A ceramic feedthrough extends through the opening in the housing and forms an interface therewith, and is brazed to the housing at the interface. The surface of the base extends at least to the feedthrough and has a cut-out area or opening therein adjacent the feedthrough in order to minimize the surface area contact at the interface between the ceramic feedthrough and the metal housing. The opening in the base may have edges which extend from sidewalls of the feedthrough under the feedthrough by small distances, in order to form a small ledge beneath the outer periphery of the feedthrough. Alternatively, the opening in the base may be approximately equal in size to the feedthrough so as to have edges which engage sidewalls of the feedthrough.

Abstract: A digital eddy current proximity system including a digital impedance measuring device for digitally measuring the proximity probes impedance correlative to displacement motion and position of a metallic target object being monitored. The system further including a cable-length calibration method, an automatic material identification and calibration method, a material insensitive method, an inductive ratio method and advanced sensing characteristics.

Abstract: An apparatus and method for allowing the lead pins of an integrated circuit (IC) package to provide the electrical interface between the IC package and a receptacle of the host data processing system is described. The present invention comprises an IC package housed within a card casing to form an IC card, with the leads from the IC package providing the electrical interface between the IC card and the data processing system into which the IC card is inserted. Thus, the present invention eliminates the need for a printed circuit board (PCB) and connector to provide the interconnection between the IC package and the data processing system.

Abstract: Three or more, or two or more types of electronic components are formed on one substrate, and these electronic components form an aggregated planar surface on a surface of the substrate.

Abstract: A method for automated monitoring and controlling of a semiconductor wafer plasma etching process including collecting data versus time during a plasma etching process the data including information representative of a concentration of at least one pair of reactant and product species present during the course of the plasma etching process; calculating a selected ratio of at least one reactant species and one product species at selected time intervals in the plasma etching process to create real-time concentration ratio data; retrieving model concentration ratio data for the at least one reactant species and one product species for comparison with the real-time concentration ratio data; comparing the model concentration ratio data with the real-time concentration ratio data to determine a difference; and, adjusting at least one plasma process operating parameter to minimize the difference.

Abstract: The invention relates to a transponder provided with an integrated circuit, an antenna, and a first capacitor provided with a dielectric and a first and a second capacitor electrode, which transponder comprises a stack of layers, i.e.: a first layer of a dielectric material, a first patterned electrically conductive layer of which the antenna forms part, a second layer of a dielectric material, and a second patterned electrically conductive layer. The invention further relates to an appliance provided with a transponder which comprises an integrated circuit, an antenna, and a first capacitor.

Abstract: A reduced noise ultrasound piezo film array on a printed circuit board. A printed circuit board carries a piezo array on one end and a standard coupling at the other end. The board is made in four layers with the two external layers being ground planes to prevent noise pickup. The two internal layers carry printed circuit lines between various elements of the array and terminals of the connector. The various arrays are sequentially scanned. All of the lines except the one selected are connected to ground to prevent crosstalk and noise pickup.

Abstract: An electronic structure that has in-situ formed unit resistors and a method for fabricating such structure are disclosed. The electronic structure that has in-situ formed unit resistors consists of a first plurality of conductive elements formed in an insulating material layer, a plurality of electrically resistive vias formed on top and in electrical communication with at least one of the first plurality of conductive elements, and a second plurality of conductive elements formed on top of and in electrical communication with at least one of the plurality of electrically resistive vias. The present invention novel structure may further be formed in a multi-level configuration such that multi-level resistors may be connected in-series to provide larger resistance values. The present invention novel structure may further be combined with a capacitor network to form desirable RC circuits.

Abstract: A semiconductor package comprising a semiconductor die having opposed, generally planar first and second surfaces and a peripheral edge. Formed on the second surface of the semiconductor die in close proximity to the peripheral edge thereof are a plurality of bond pads. The semiconductor package further comprises a plurality of leads which are positioned about the peripheral edge of the semiconductor die in spaced relation to the second surface thereof. Each of the leads includes opposed, generally planar first and second surfaces, and a generally planar third surface which is oriented between the first and second surfaces in opposed relation to a portion of the second surface. In the semiconductor package, a plurality of conductive bumps are used to electrically and mechanically connect the bond pads of the semiconductor die to the third surfaces of respective ones of the leads. An encapsulating portion is applied to and partially encapsulates the leads, the semiconductor die, and the conductive bumps.

Abstract: An insulation layer is formed on a ground layer. The insulation layer includes first and second regions for forming wiring layers. The impedance of a wiring layer formed on the second region is lower than that of a wiring layer formed on the first region. A signal line pattern is formed on the wiring layer on the first region of the insulation layer. A power supply plane is formed on the wiring layer on the second region of the insulation layer in order to feed power to the signal line pattern through a termination resistor connected to the signal line pattern.

Abstract: In some embodiments, the invention includes a system having first and second modules and a circuit board including first and second module connectors to receive the first and second modules, respectively. The system includes a first path of conductors extending from the circuit board to the first module connector, to the first module, back to the first module connector, to the circuit board, to the second module connector, to the second module, and to on module terminations of the second module; and a second path of conductors extending from the circuit board to the second module connector, to the second module, back to the second module connector, to the circuit board, to the first module connector, to the first module, and to on module terminations of the first module.

Abstract: In some embodiments, the invention includes a termination card having a substrate having groups of fingers on a first side of the substrate and groups of fingers on a second side of the substrate and wherein some of the groups of fingers on the first side and some of the groups of fingers on the second side are connected through module connectors, and others of the groups of fingers on the first side are coupled to on module terminations on the first side.

Abstract: A printed circuit assembly for use in an implantable medical device comprises a plurality of panels having active and passive circuit components on one major surface thereof, the plurality of panels being interconnected with flexible flat cable segments allowing the assembly to be folded so as to place the individual panels carrying the circuit components in a stacked relationship. By providing conductive layers on predetermined surfaces of the panels, shielding is provided to inhibit noise generating circuitry from contaminating wanted signals passing between the components and the plural panels.

Abstract: The present invention provides an ancillary electrical component in very close proximity to a semiconductor device, preferably mounted directly to the semiconductor device. In one preferred embodiment, the ancillary electrical component is a capacitor. In a preferred embodiment, a terminal is provided on the semiconductor device such that the capacitor can be electrically connected directly to the terminals, as by soldering or with conductive epoxy. Connecting the capacitor between terminals of a power loop provides superior noise and transient suppression. The very short path between the capacitor and the active circuit provides for extremely low inductance, allowing for the use of relatively small capacitors. The semiconductor device then is connected to an electronic device such as a PC board for further connection to other circuitry.

Abstract: An electronics package comprises an integrated circuit (IC) coupled to an IC substrate in a flip-chip ball grid array (FCBGA) configuration. The IC comprises a high density pattern of interconnect pads around its periphery for coupling to a corresponding pattern of bonding pads on the IC substrate. The substrate bonding pads are uniquely arranged to accommodate a high density of interconnect pads on the IC while taking into account various geometrical constraints on the substrate, such as bonding pad size, trace width, and trace spacing. In one embodiment, the substrate bonding pads are arranged in a zigzag pattern. In a further embodiment, the technique is used for bonding pads on a printed circuit board to which an IC package is coupled. Methods of fabrication, as well as application of the package to an electronic package, an electronic system, and a data processing system, are also described.

Abstract: The invention relates to a capacitor module for a converter. The capacitor module contains a capacitor which can be fastened to a base frame or to a cooling body by means of lateral, mechanical holding devices. In addition, the capacitor comprises at least one additional mechanical holding device for fastening at least one electronic terminal of the converter and of at least one measuring sensor, especially of a current transformer and/or of a voltage transformer. The inventive capacitor module makes it possible to realize a construction of a converter which is compact and has a reduced weight.

Abstract: In a system having two printed circuit boards, each printed circuit board is provided with at least one electrical contact element for electrically interconnecting the printed circuit boards. One of the electrical contact elements includes at least one electroconductive pin formed from one of the printed circuit boards, while the other electrical contact element is formed by at least one recess in the other printed circuit board, a wall of the recess being covered with an electrically conducting layer.

Abstract: Described is a computer having two circuit boards (10, 11) on which plug connectors (15) are present for plug-in cards (16) which project above the circuit boards (10, 11) to a first height (H1). There is a bridge card (19), which is plugged into the two circuit boards (10, 11), connecting the two circuit boards (10, 11) electrically, and which project above the circuit boards (10, 11) to a second height (H2). The bridge card (19) is connected to the two circuit boards independently of the plug connectors (15), and the first height (H1) is greater than the second height (H2).

Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.

Abstract: An electronic board assembly carrying connectors on each side of its lower edge which is adapted to withstand the relatively strong forces required to insert or remove the assembly, e.g., from a backplane board, and yet provide many electrical contacts along the interconnection sites. The electronic board assembly comprises two symmetrical elementary PCBs electrically coupled together, each carrying a connector on its external lower edge. In one embodiment, these two PCBs are coupled together by a flexible adhesive insulative layer and maintained by mechanical devices such that the distance between these two connectors is set to a predetermined distance (to align precisely with the backplane board). The mechanical device used to maintain a predetermined distance between the two connectors of the assembly may comprise a U-shaped member, the upper part of this member being strategically inserted between these connectors.