Abstract: An improved multi-chip module includes a main circuit board having an array of electrical interconnection pads to which are mounted a plurality of IC package units. Each IC package unit includes a pair of IC packages, both of which are mounted on opposite sides of a package carrier. The package units may be mounted on one or both sides of the main circuit board. A first primary embodiment of the invention employs a laminar package carrier having a pair of major planar surfaces. Each planar surface incorporates electrical contact pads. One IC package is surface mounted on each major planar surface, by interconnecting the leads of the package with the contact pads on the planar surface, to form the IC package unit. Several different variations of the chip module are disclosed.

Abstract: To provide high-speed, low inductance capacitive decoupling, an integrated circuit (IC) package includes capacitors positioned within the mounting region between a die and an IC package substrate. A variety of types and sizes of capacitors and substrates can be employed in a variety of geometrical arrangements. In some embodiments, capacitors are sandwiched between die terminals or bumps and the substrate conductors or pads, while in other embodiments, capacitors are positioned between bar-type conductors on the surface of the IC package substrate. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.

Abstract: A noncontact ID card composed by laminating an antenna circuit board where an antenna is formed and an interposer board formed by connecting an enlarged electrode to an electrode of a mounted IC chip and bonding between an antenna electrode of the antenna circuit board and the enlarged electrode of the interposer board with electroconductive adhesive material, wherein a substrate of the antenna circuit board and a substrate of the interposer board are bonded. In addition, in another composition, at least one local deformation is applied to a boding face of the electrodes each other in a direction crossing the bonding face.

Abstract: A transformer of a switching power-supply circuit is placed and mounted nearly in the middle area of a circuit board. The transformer is of a low-profile type, and a broad and flat upper surface of the transformer functions as a suction surface for a suction nozzle. When a surface-mount type switching power-supply unit is mounted in a mother board, firstly, the upper surface of the above transformer is held by the suction nozzle, the surface-mount type switching power-supply unit is transferred to a target mounting area on the mother board by the suction nozzle, and the surface-mount type switching power-supply unit is surface mounted in the mother board. Because it is not required to provide a nozzle suction surface for the suction nozzle's exclusive use, transfer molding is not needed, and accordingly a low-profile and low-cost surface-mount type switching power-supply unit can be facilitated.

Abstract: A system board includes a control unit; connectors arranged in series in one direction and accepting a connecting means for inputting and outputting data; and signal lines connecting the control unit to the connectors and including at least one branch point, wherein sub signal lines branched off at the same branch point are equal in length and/or loads of path from the branch point to the connecting means.

Abstract: An outer coating substrate for an electronic component is constructed to be calcined at a low temperature, and greatly decreases the cost thereof while greatly improving the dimensional precision of the substrate. The outer coating substrate for an electronic component includes a multi-layered substrate including a first material layer that is sintered in a liquid phase and a second material layer that is not sintered at the sintering temperature of the first material layer. The first and second material layers are laminated, and calcined at the calcining temperature of the first material layer.

Abstract: A method for minimum metal consumption power distribution includes the steps of forming a circuit having a plurality of circuit components on an electrically insulated substrate and forming a plurality of supply voltage regulators on the electrically insulating substrate wherein each of the plurality of supply voltage regulators is located adjacent to each of the plurality of circuit components respectively, and each of the plurality of supply voltage regulators is connected to each of the plurality of circuit components respectively for generating a regulated voltage rail output to each of the plurality of circuit components respectively.

Abstract: An adapter for a surface mount device, the adapter including an insulating body having offset first and second surfaces; a pattern of surface mount solder pads formed on the first surface; a pattern of signal carriers communicating between the first and second surfaces, each of the signal carriers being at least partially exposed in an area between the first and second surfaces and adjacent to the second surface; and a plurality of signal lines electrically coupling one or more of the surface mount solder pads with predetermined ones of the signal carriers.

Abstract: A resistor-capacitor network for terminating transmission lines. The network includes a core of dielectric material. Capacitors are formed within the core from spaced apart electrode plates. Terminals extend from the electrode plates to a top surface of the core. The electrode plates are oriented perpendicular to the top surface. Ball pads are located on the top surface. Resistors are located on the top surface and are connected between the ball pads and terminals. Conductive spheres are attached to the ball pads.

Abstract: The flat mount assembly, or transponder, has at least one semiconductor chip that is connected to an antenna for interchanging data and power with an electronic apparatus. The antenna is formed of two electrical conductors. A conductive layer is formed on the mount in overlapping relationship with the electrical conductors of the antenna. The overlapping conductive layer results in greater capacitive coupling between the electronic apparatus and the flat mount assembly.

Abstract: An interconnect module for an integrated circuit chip incorporates a thin, high dielectric constant embedded capacitor structure to provide reduced power distribution impedance, and thereby promote higher frequency operation. The interconnect module is capable of reliably attaching an integrated circuit chip to a printed wiring board via solder ball connections, while providing reduced power distribution impedance of less than or equal to approximately 0.60 ohms at operating frequencies in excess of 1.0 gigahertz.

Abstract: A printed-wiring substrate including a capacitor element, as well as a method for fabricating the printed-wiring substrate. An insulating substrate 3 is molded by placing a capacitor element 13 in a mold and charging a resin 4 into the mold. Therefore, the capacitor element 13 having a size (i.e., electrostatic capacitance) sufficient to suppress switching noise of an IC chip 15 and stabilize operation power voltage can be disposed, while providing a dimensional margin. Since the possibility of failing to embed the capacitor element 13 decreases, the printed-wiring substrate can be fabricated at reduced cost.

Abstract: A wired circuit board having a terminal portion formed as a flying lead that can provide enhanced strength of the conductive pattern, both sides of which are exposed, by simple construction to effectively prevent disconnection of the conductive pattern. The wired circuit board having the terminal portion formed as the flying lead in which the both sides of the conductive pattern are exposed includes, in crossing areas where ends of a cover-side opening and ends of a base-side opening and the conductive pattern are crossed each other, (i) the widened portions formed in the conductive pattern or (ii) cover-side projections and base-side projections formed in the cover layer and the base layer, respectively.

Abstract: A data processing system including a control chip, a central processing unit and a printed circuit board is provided. In the data processing system, the printed circuit board not only supports the control chip and the central processing unit, but also serves as an interface for transferring signals between the control chip and the central processing unit. Critical signals can be transmitted from the central processing unit to the control chip via the printed circuit with a better return path.

Abstract: A back plane structure for SCSI used in server or array storing machine comprises a plate member including two stacked layers of PCB and an opening therethrough for fluid communication with the outside, at least two connectors on the plate member that are in electrical connection therewith for obtaining power for normal operation, and a plurality of cables respectively interconnecting the connectors. With the provision of an opening, the invention can sufficiently dissipate heat accumulated in the server during operation.

Abstract: A modified connector footprint on a PWB includes a row of ground vias disposed outside a standard connector footprint that do not mate to pins in the connector. The extra ground vias provide additional shielding and reduce cross-talk in the connector/PWB interface.

Abstract: A multilayered PCB including two multilayered portions, one of these able to electrically connect electronic components mounted on the PCB to assure high frequency connections therebetween. The PCB further includes a conventional PCB portion to reduce costs while assuring a structure having a satisfactory overall thickness for use in the PCB field. Coupling is also possible to the internal portion from these components. Methods of making these structures have also been provided.

Abstract: A packaged circuit with VDDcore contacts in first positions and VSScore contacts in second positions. A redistribution layer is adjacent the integrated circuit, and overlies VDDcore and VSScore mesh layers. First contacts in the redistribution layer are positioned in alignment with the first positions, to make connections between the redistribution layer and the VDDcore contacts. Second contacts are positioned in alignment with the second positions, to make connections between the redistribution layer and the VSScore contacts. First vias are positioned in alignment with the first positions, to make connections between the first contacts and the VDD mesh layer. The traces of the VDD mesh layer are positioned in alignment with the first positions. Second vias are positioned in alignment with the second positions to make connections between the second contacts and the VSS mesh layer. The traces of the VSS mesh layer are positioned in alignment with the second positions.

Abstract: A printed circuit board configuration with a multipole plug-in connector has plug pins fixed parallel to the board layer on respective signal conductor tracks. The signal conductor tracks are configured essentially parallel and alternately side-to-side with ground conductor tracks. Furthermore, a ground shielding surface is provided on an adjacent board layer.

Abstract: A package with a Power Supply In Package (PSIP) feature may include a charge pump external to the die in order to take advantage of a smaller die size. The die may be mounted on a substrate with an array of solder balls of a Ball Grid Array. The package may have substantially the same size as a package without PSIP capability. In one embodiment, the passive components may be mounted on the die using epoxy. In another embodiment, the reduced-size passive components may be mounted on the substrate of the ball grid array in a region free of solder balls.