Abstract: A self-timed link between two elements in a computer system is initialized. Each element sends an initialization request to the other. If successfully received, the elements exchange signals with oscillation-free segments over multiple clock cycles. If successful, the elements indicate to each other that initialization is complete. Optionally, a link operation parameter can be sent with the initialization complete indication for post-initialization link control.

Abstract: A method for increasing the size of a primary swap partition on a computer system operating under control of a UNIX type operating system. The computer system includes a first storage device. The first storage device includes a primary swap partition. The method includes identifying whether a valid storage areas exists at a location on the first storage device such that the contiguous expansion of the primary swap partition is impeded and preparing the valid storage area, if the valid storage area exists, for allocation as an available storage area to allow contiguous expansion of the primary swap space. The method further includes booting the computer system to a single user mode, increasing the size of the primary swap partition without reinstalling the UNIX type operating system, and rebooting the computer system.

Abstract: A method and apparatus for capturing data. A first latch latches data from a data source in response to respective rising edge transitions of a first clock signal. A second latch latches data from the data source in response to respective falling edge transitions of the first clock signal. A delay circuit generates a second clock signal that lags the first clock signal by a delay period and, in response to respective transitions of the second clock signal, a multiplexer alternately selects the first latch and the second latch to output data to a storage element. A pulse strobe circuit strobes the output data into the storage element in response to the first clock signal and the second clock signal being in different states.

Abstract: A method and apparatus for implementing a 32-bit operating system which supports 16-bit code includes loading basic input output system (BIOS) code into a base portion of a memory and loading first operating system code into the base portion. Second operating system code is then loaded into an extended portion of the memory and the second operating system code is allowed to overwrite the BIOS code and the first operating system code with data.

Abstract: The invention provides a high speed two-dimensional discrete cosine transform circuit which can reduce the number of addition operations for rounding to one time. The two-dimensional IDCT circuit calculates M.times.N-point two-dimensional inverse discrete cosine transforms wherein M.times.N is equal to 2.sup.2n, and includes an M.times.N two-dimensional IDCT operator for calculating two-dimensional inverse discrete cosine transforms as matrix vector products of a transform matrix of MN rows and MN columns and MNth-order input vectors, a shift operator for shifting results of the calculation of the M.times.N two-dimensional IDCT operator rightwardly, and an adder for adding 2.sup.n-2 to a discrete cosine coefficient from among discrete cosine transform coefficients to be inputted to the M.times.N two-dimensional IDCT operator. An output signal of the shift operator is outputted as a circuit output signal of the two-dimensional IDCT circuit.

Abstract: A diagnostic system for a data access networked system (e.g., an Internet/Intranet access networked system) is described. The data access networked system includes a number of data service systems coupled together. Each of the data service systems is independently administrated. The diagnostic system includes a number of diagnostic modules, each running a number of diagnostic tests within one of the data service systems upon receiving a diagnostic request. The diagnostic modules also transmit the diagnostic request and diagnostic results to one another using an open standard communication protocol. The diagnostic system also includes a diagnostic terminal that is coupled to a first diagnostic module of the diagnostic modules to generate the diagnostic request to the first diagnostic module and to display the diagnostic results received from the first diagnostic module. A diagnostic system for a data service system of a data access networked system is also described.

Abstract: A computer, and particularly a mobile client computer system, in which flexibility in use of the system is enhanced by a capability of receiving and dynamically recognizing a variety of what are here called docking options. Docking options are peripheral devices, such as radio transceivers, which can be selectively connected to and used with a mobile client system. A docked option is identified by an exchange of signals between the system and the option, accomplished through a plurality of input/output ports which together define an interface to the option.

Abstract: Disclosed is an apparatus for controlling video devices by transmitting RS-422 command strings to the devices comprising, a controller for preparing each RS-422 command string in advance of an execution time at which the command is to be executed; a buffer for storing each RS-422 command string and a respective associated time of execution; and a buffer scanner operable to compare a current time with the execution times of each buffered command and to transmit to the respective video device any commands stored in the buffer for which the associated execution time is the same as or before the current time.

Abstract: A data transfer system includes a host which provides a timing signal and data at an output, and a peripheral device which receives the timing signal and data from the host output, and produces an internal timing signal based on detection of a change in either the data or the polarity of the timing signal provided by the host.

Abstract: An automatic option setting circuit which automatically configures option settings for a device using pre-settable option setting information stored in a re-writable memory, and updates option settings in the re-writable memory when option settings are modified by the device.

Abstract: A new and improved apparatus and method for rebuilding a replacement disk of a fault tolerant, mass storage drive array subsystem of a computer system. The method calls for a microprocessor to check a stripe for consistency. If the stripe is inconsistent, the microprocessor rebuilds a predetermined number of stripes. If the checked stripe is inconsistent, then the microprocessor checks a next stripe and repeats the above-described process. Because the drive array subsystem receives both system requests and rebuild requests, the present invention allows a user to select the drive array subsystem's priority in processing system requests versus rebuild requests, thereby allowing greater system access to the drive array subsystem during peak times of system requests.

Abstract: A method of transmitting a signal from a relatively fast clock domain to a relatively slow clock domain is described. The fast and slow clock domains operate according to respective fast and slow clock signals that are substantially synchronized and that have respective frequencies that are non-integer multiples. A first state of an input signal is latched at the commencement of a first period of the fast clock signal, the commencement of the first period of the fast clock signal being substantially coincident with the commencement of a first period of the slow clock signal. In response to the latching of the first state of the input signal, a first output signal is generated and held over the first period, and at least one further period, of the fast clock signal. The first output signal is then latched in the second time domain in response to the commencement of a second period of the slow clock signal, the second period being immediately subsequent to the first period of the slow clock signal.

Abstract: An error recovery method for use in an information communication system which comprises a plurality of nodes connected by links. Information is transferred between the nodes in frames of predefined types, including at least a first frame type used to transfer data and a second frame type used for error recovery. Each node has at least a first and a second mode of operation. In the first mode frames of both first and second types are accepted. In the second mode frames of the first type are discarded and only frames of the second type are accepted. A master node which controls error recovery is selected from amongst those nodes which can initiate transfers.

Abstract: The iterative detection and treatment of viruses using virus detection objects and virus treatment objects is disclosed. Pursuant to a request for a virus scan, a virus detection object is produced by a server and is transmitted to a client for execution. The client receives and executes the virus detection object, and the results are transmitted to the server. The server uses the results to produce an additional virus detection object which is also transmitted to the client and executed so that the results can be transmitted to the server. The iterative production and execution of virus detection objects is continued until a determination is made as to whether the targeted file or data includes a virus. Upon a determination that a targeted file or data includes a virus, a vaccine specifically tailored to the conditions presented at the client and the type of virus detected is produced, preferably in the form of a virus treatment object.

Abstract: A device and method filter information to restrict access to private information of a domain in a domain name system. The device includes a filtering device. The filtering device filters information received from devices external to the domain by removing the private information before forwarding the information to devices within the domain. The private information includes IP addresses and domain names. The private information also includes any additional information appended to legitimate responses to requests from devices in the domain.

Abstract: Apparatus for use in a processing system having a host processor capable of executing a first instruction set to assist in running instructions of a different instruction set which is translated to the first instruction set by the host processor including circuitry for temporarily storing memory stores generated until a determination that a sequence of translated instructions will execute without exception or error on the host processor, circuitry for permanently storing memory stores temporarily stored when a determination is made that a sequence of translated instructions will execute without exception or error on the host processor, and circuitry for eliminating memory stores temporarily stored when a determination is made that a sequence of translated instructions will generate an exception or error on the host processor.

Abstract: A method of bypassing defects in a cache used by a processor of a computer system. A repair mask has an array of bit fields corresponding to cache lines in the cache, and when a particular cache line in the cache is identified as being defective, a corresponding bit field in the repair mask array is set to indicate that the particular cache line is defective, and further access to the defective cache line is prevented, based on the corresponding bit field in the repair mask array. The repair mask can be used to prevent the defective cache line from ever resulting in a cache hit, and to prevent the defective cache line from ever being chosen as a victim for cache replacement. Using a set associative cache, the defective cache line is thereby effectively removed from its respective congruence class. This approach allows the cache to use all non-defective cache lines without any cache lines being reserved for redundancy.

Abstract: A system and method for providing a remote user with secure, temporary access to electronic mail and/or the Internet. The invented system includes one or more remote terminals, each including an input device and a display, and a system server for communicating with the terminals. The server is capable of displaying prompts on each of the displays and reading user inputs on each of the keyboards. Furthermore, the server is operatively connected with the user's home system, typically via an electronic network. The system further includes a program executing on the system server for prompting one or more users located at the one or more remote terminals to enter inputs and for automatically configuring a configuration file for each remote user.

Abstract: A data processor has an internal data bus and an instruction fetch bus provided separately from each other. When a data-read operation mode is designated, data stored in an internal read only memory are read out onto both the internal data bus and the instruction fetch bus, and the data on these buses are then subject to an operation by an execution unit to check the coincidence therebetween, the comparison resultant signal being transferred to the outside.

Abstract: The protocol of the present invention includes two new first level protocols and several embodiments of a second level protocol. The two new first level protocols of the present invention include the TCP2B protocol and the TCP2E protocol. In the TCP2B protocol, both client and server indicate their support for this protocol using one or more bits in TCP header. According to the TCP2B protocol, the client retransmits its requested options in the ACK message so the server need not store the options after the connection request. In the TCP2E protocol, the server maintains a Friends Table listing addresses of device recently observed to be complying with TCP. If a client's address is on the Friends Table, the connection request is processed according to TCP. Otherwise, the server sends an ACK message to the client to prompt the client to send a reset message. The client's address can then be added to the Friends Table.