Abstract: A thin-film transistor, including a substrate; an active layer on the substrate; a gate electrode on the active layer; and a gate insulating layer between the active layer and the gate electrode, the active layer including a channel region; source and drain regions at opposite sides of the channel region; and lightly doped regions between the channel region and the source region and between the channel region and the drain region, the source and drain regions being doped with a first element, and the lightly doped regions being doped with a second element different from the first element.

Abstract: A semiconductor integrated circuit device may include a cell capacitor connected with any one of a first electrode and a second electrode of an access device. The cell capacitor may include a first cell cap array and a second cell cap array separated from the first cell cap array. A voltage terminal for driving the cell capacitor may be connected to a connection node between the first cell cap array and the second cell cap array.

Abstract: An organic EL display device includes a substrate on which a plurality of driver transistors are formed, a first wiring that supplies an electric voltage in accordance with a display image via one of the driver transistors, an organic EL film that emits light, an anode electrode, and an auxiliary electrode film including a first low resistance part, a second low resistance part separated from the first low resistance part, and a high resistance part disposed between the first low resistance part and the second low resistance part. The first low resistance part is electrically connected to the first wiring and the anode electrode. The second low resistance part forms an electrostatic capacitance between the anode electrode and itself. The high resistance part has an electric resistance higher than those of the first low resistance part and the second low resistance part.

Abstract: An organic light-emitting display device according to one embodiment of the present disclosure includes a substrate, a thin-film transistor formed on the substrate, a planarization layer formed on the thin-film transistor, an organic light-emitting element formed on the planarization layer, the emitting element including an organic light-emitting layer and a cathode, and a lower auxiliary wiring between the organic light-emitting element and the planarization layer, the wiring electrically connected with the cathode.

Abstract: One or more cross-wafer capacitors are formed in an electronic component, circuit, or device that includes stacked wafers. One example of such a device is a stacked image sensor. The image sensor can include two or more wafers, with two wafers that are bonded to each other each including a conductive segment adjacent to, proximate, or abutting a bonding surface of the respective wafer. The conductive segments are positioned relative to each other such that each conductive element forms a plate of a capacitor. A cross-wafer capacitor is formed when the two wafers are attached to each other.

Abstract: Embodiments relate to a method of forming an organic light emitting diode (OLED) display device. A first inorganic layer, a first organic layer, and a second inorganic layer are formed on pixel regions of an OLED display device. At least part of a first inorganic layer is formed using atomic layer deposition (ALD), such that the first inorganic layer completely covers particles generated on the OLED. Embodiments also relate to an OLED display device with pixel regions, each pixel region including an OLED, a bank layer across a boundary between adjacent pixel regions, and a first inorganic layer on at least a portion of the OLED and the bank layer. The first inorganic layer includes a first inorganic sub-layer and a second inorganic sub-layer.

Abstract: An electronic device may have a hinge that allows the device to be flexed about a bend axis. A display may span the bend axis. To facilitate bending about the bend axis, the display may have layers such as a display cover layer with grooves or other recesses. The recesses form a flexible portion in the display layer. The display layer may be formed from glass or other materials that are transparent. Elastomeric material, fluids, and other materials may be placed in the recesses in the display layer. The material in the display layer may have an index of refraction that is matched to the index of refraction of the display layer. A hinge may be formed between rigid planar layers that are separated by a gap. Flexible layers that lie flush with opposing surfaces of the rigid planar layers may be used to span the gap.

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. The silicon transistors may be configured in a top gate arrangement. The oxide transistors may be configured in a top gate or a bottom gate arrangement. In one embodiment, source-drain contacts for the silicon and oxide transistors may be formed simultaneously. In another embodiment, the silicon and oxide thin-film transistor structures may be formed using at least three metal routing layers.

Abstract: A semiconductor device is disclosed. One embodiment provides a cell area and a junction termination area at a first side of a semiconductor zone of a first conductivity type. At least one first region of a second conductivity type is formed at a second side of the semiconductor zone. The at least one first region is opposed to the cell area region. At least one second region of the second conductivity type is formed at the second side of the semiconductor zone. The at least one second region is opposed to the cell area region and has a lateral dimension smaller than the at least first region.

Abstract: The present application discloses a method of fabricating an organic thin film transistor comprising providing a substrate; forming a patterned interface modification layer on the substrate; and forming an organic semiconductor layer on a side of the interface modification layer distal to the substrate, wherein the patterned interface modification layer having a pattern of micro structure.

Abstract: Structures for a nanosheet field-effect transistor and methods for forming a structure for a nanosheet field-effect transistor. A body feature is formed that includes a first nanosheet channel layer, a second nanosheet channel layer, and first, second, and third sacrificial layers that are vertically arranged between the first and second nanosheet channel layers. The first, second, and third sacrificial layers are laterally recessed relative to the first and second nanosheet channel layers to form a cavity indented into a sidewall of the first body feature. The second sacrificial layer is laterally recessed to a lesser extent than the first sacrificial layer or the third sacrificial layer such that an end of the second sacrificial layer projects into the cavity between the first and third sacrificial layers. A dielectric spacer is formed in the first and second portions of cavity between the first and second nanosheet channel layers.

Abstract: An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.

Abstract: A display apparatus includes a display apparatus includes a display panel including a curved display area, and an optical unit including a liquid crystal layer on the curved display area, and configured to adjust a direction of light emitted from the display panel.

Abstract: An optical device (10) includes a joining structure in which a first conductive film (110) and a second conductive film (130) are joined to each other. The first conductive film (110) that constitutes the joining structure is constituted by a conductive material. The second conductive film (130) that constitutes the joining structure is constituted by a metal material. A part of the second conductive film (130) comes into contact with the first conductive film (110). A plurality of concave portions are provided in a contact surface of the second conductive film (130) which comes into contact with the first conductive film (110). The contact surface has a surface roughness greater than a surface roughness of a non-contact surface of the second conductive film (130) which does not come into contact with the first conductive film (110).

Abstract: The present disclosure concerns a method of fabricating a magnetic tunnel junction suitable for a magnetic random access memory (MRAM) cell and comprising a first ferromagnetic layer, a tunnel barrier layer, and a second ferromagnetic layer, comprising: forming the first ferromagnetic layer; forming the tunnel barrier layer; and forming the second ferromagnetic layer; wherein said forming the tunnel barrier layer comprises depositing a layer of metallic Mg; and oxidizing the deposited layer of metallic Mg such as to transform the metallic Mg into MgO; the step of forming the tunnel barrier layer being performed at least twice such that the tunnel barrier layer comprises at least two layers of MgO.

Abstract: In a semiconductor device, a memory cell is formed of a control gate electrode and a memory gate electrode adjacent to each other, a gate insulating film formed below the control gate electrode and an insulating film formed below the memory gate electrode and having a charge accumulating part therein. Also, in this semiconductor device, a capacitive element is formed of a lower electrode, an upper electrode and a capacitive insulating film formed between the upper electrode and the lower electrode. A thickness of the lower electrode is smaller than a thickness of the control gate electrode.

Abstract: A three-dimensional semiconductor memory device includes a peripheral circuit structure on a substrate, a horizontal active layer on the peripheral circuit structure, stacks provided on the horizontal active layer to include a plurality of electrodes, a vertical structure vertically penetrating the stacks, a common source region between ones of the stacks and in the horizontal active layer, and pick-up regions in the horizontal active layer. The horizontal active layer includes first, second, and third active semiconductor layers sequentially stacked on the peripheral circuit structure. The first and third active semiconductor layers are doped to have high and low impurity concentrations, respectively, and the second active semiconductor layer includes an impurity diffusion restraining material.

Abstract: A method includes providing a semiconductor substrate having a plurality of linear semiconductor fin structures spaced apart from one another on a surface of the substrate; siliciding sidewalls of the semiconductor fin structures; removing an unsilicided central portion of each semiconductor fin structure leaving, for a given one of the semiconductor fin structures, a pair of silicide fin structures that are parallel to one another and spaced apart from one another by a distance about equal to a width of the removed unsilicided central portion of the semiconductor fin structure; and forming contacts to conductively connect together a plurality of the silicide fin structures to form a resistor. A resistance value of the resistor is related at least to a type of silicide, a number of contacted adjacent silicide fin structures and a length between two contacts.

Abstract: A method of manufacturing an organic light emitting display apparatus includes: preparing a substrate having a first surface and a second surface opposite to the first surface; forming a through-hole penetrating the substrate from the first surface to the second surface; forming a humidity preventing layer on the substrate; forming a plurality of organic light emitting diodes on the substrate; and removing an organic light emitting diode adjacent to the through-hole from among the plurality of organic light emitting diodes, in which the humidity preventing layer may be formed on the substrate via a sequential vapor infiltration (SVI) process.

Abstract: The present invention provides a display backplane and a manufacturing method thereof, as well as a display device. The display backplane comprising: a substrate; an array of organic light emitting elements and an array of transistors for driving and controlling the array of organic light emitting elements formed on the substrate; and a heat insulation layer formed between the array of organic light emitting elements and the array of transistors, wherein the heat insulation layer is provided with a heat insulation layer via hole, through which the array of transistors is connected with the array of organic light emitting elements. The display backplane provided in the present invention can reduce the conduction of heat generated by the array of organic light emitting elements during lighting to the array of transistors, thus avoiding problems caused thereby such as uneven display.