Abstract: In one embodiment, a display device comprises: a substrate including an emissive area that emits light and a non-emissive area that does not emit light; a transistor over the substrate; a light emitting device over the transistor, the light emitting device including a first electrode, a light emitting layer on the first electrode, and a second electrode on the light emitting layer; a contact hole in the emissive area of the substrate, the contact hole positioned between the transistor and the light emitting device; and an auxiliary electrode in the contact hole, the auxiliary electrode electrically connecting together the first electrode of the light emitting device and the transistor.

Abstract: An organic light emitting diode display device, including a substrate, and at least one organic light emitting diode on the substrate, wherein the organic light emitting diode includes a first electrode on the substrate, an organic light emitting layer on the first electrode, and a second electrode on the organic light emitting layer, and the organic light emitting layer has at least one opening.

Abstract: Methods and apparatus for artificial exciton devices. An artificial exciton device includes a semiconductor substrate; at least one well region doped to a first conductivity type in a portion of the semiconductor substrate; a channel region in a central portion of the well region; a cathode region in the well region doped to a second conductivity type; an anode region in the well region doped to the first conductivity type; a first lightly doped drain region disposed between the cathode region and the channel region doped to the first conductivity type; a second lightly doped drain region disposed between the anode region and the channel region doped to the second conductivity type; and a gate structure overlying the channel region, the gate structure comprising a gate dielectric layer lying over the channel region and a gate conductor material overlying the gate dielectric. Methods are disclosed.

Abstract: Devices including organic and inorganic LEDs are provided. Techniques for fabricating the devices include fabricating an inorganic LED on a parent substrate and transferring the LED to a host substrate via a non-destructive ELO process. Scaling techniques are also provided, in which an elastomeric substrate is deformed to achieve a desired display size.

Abstract: An optoelectronic component (100) comprises an optoelectronic semiconductor chip (10), a first contact area (31) and a second contact area (32), which is laterally offset with respect to the first contact area and is electrically insulated therefrom, and a housing element (40). The first contact area (31) is electrically conductively connected to the first semiconductor layer (21) and the second contact area (32) is electrically conductively connected to the second semiconductor layer (22) of the optoelectronic semiconductor chip. The first contact area (31) and the second contact area (32) project beyond the optoelectronic semiconductor chip laterally in each case. The housing element (40) is fixed to the first contact area (31) and the second contact area (32) in regions in which the first contact area (31) and the second contact area (32) project beyond the optoelectronic semiconductor chip laterally in each case. The housing element surrounds the optoelectronic semiconductor chip at least partly.

Abstract: A display device and a display device packing method are provided. The display device comprises a display panel having a display region and a non-display region; a cover lens disposed on a light-emitting surface of the display panel; and a buffer layer disposed between the cover lens and the display panel and in the non-display region of the display panel, wherein the buffer layer is selectively filled with a plurality of bubbles to enhance a buffering effect.

Abstract: Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method includes forming a replacement metal gate structure in a dielectric material. The replacement metal gate structure is formed with a lower spacer and an upper spacer above the lower spacer. The upper spacer having material is different than material of the lower spacer. The method further includes forming a self-aligned contact adjacent to the replacement metal gate structure by patterning an opening within the dielectric material and filling the opening with contact material. The upper spacer prevents shorting with the contact material.

Abstract: Discussed is an organic light emitting display device that may include an active area and a pad area on a substrate, wherein the active area includes an anode electrode, an organic emitting layer, a cathode electrode, and an auxiliary electrode connected with the cathode electrode and provided in the same layer as the anode electrode, and the pad area includes a signal pad, and a passivation layer for covering a lateral surface of the signal pad, wherein the passivation layer has a contact hole for exposing an upper surface of the signal pad. Also, the signal pad includes a lower signal pad, a central signal pad and an upper signal pad, and the central signal pad is surrounded by the lower signal pad, the upper signal pad and the passivation layer.

Abstract: Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method includes forming a replacement metal gate structure in a dielectric material. The replacement metal gate structure is formed with a lower spacer and an upper spacer above the lower spacer. The upper spacer having material is different than material of the lower spacer. The method further includes forming a self-aligned contact adjacent to the replacement metal gate structure by patterning an opening within the dielectric material and filling the opening with contact material. The upper spacer prevents shorting with the contact material.

Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a substrate having a main surface and a pixel provided over the main surface of the substrate and defined by a first region configured to display an image and a second region configured to transmit external light. The pixel includes a first electrode electrically provided in the first region, and a pixel defining layer provided in at least the first region, wherein the pixel defining layer has a first opening exposing a part of the first electrode and a second opening disposed in the second region. The pixel also includes a second electrode facing the first electrode and an intermediate layer disposed between the first and second electrodes and comprising an organic emission layer. The first capacitor at least partially overlaps the second opening along a direction perpendicular to the main surface.

Abstract: A semiconductor device includes a substrate, at least one split gate memory device, and at least one logic device. The split gate memory device is disposed on the substrate. The logic device is disposed on the substrate. A select gate or a main gate of the split gate memory device and a logic gate of the logic device are both made of metal, and the other gate of the split gate memory device is made of nonmetal.

Abstract: A method of forming a semiconductor substrate including forming a base layer of a Group 13-15 material on a growth substrate during a growth process, forming a mask having mask regions and gap regions overlying the base layer during the growth process, and preferentially removing a portion of the base layer underlying the mask during the growth process.

Abstract: A method of fabricating a semiconductive structure with a word line includes providing a substrate including a memory cell region and a peripheral region. A first trench and second trench are formed within the memory cell region, and a third trench is formed within the peripheral region. A width of the first trench is smaller than the second trench, and the width of the second trench is smaller than the third trench. A first silicon oxide layer fills up the first trench. A silicon nitride layer fills up the second trench and covers the third trench. A second silicon oxide layer is formed in the third trench. Part of the substrate within the memory cell region, part of the first silicon oxide layer, and part of the silicon nitride layer are removed to form a word line trench. Finally, a word line is formed in the word line trench.

Abstract: Embodiments of the invention disclose a thin-film transistor having a channel structure that has an increased width-length ratio and a manufacturing method thereof, a display substrate and a display device. The thin-film transistor comprises a gate, a gate insulation layer and an active layer stacked on a substrate, the active layer is formed therein with a source region, a drain region and a channel region, a surface of the active layer facing the gate insulation layer is at least partially formed with a non-planar surface in the channel region, such that the non-planar surface of the active layer has a tortuous shape in a width direction of the channel region.

Abstract: An integrated circuit is formed by providing a heavily doped substrate of a first conductivity type, forming a lightly doped lower epitaxial layer of the first conductivity type over the substrate, implanting dopants of the first conductivity type into the lower epitaxial layer in an area for a shallow component and blocking the dopants from an area for a deep component, forming a lightly doped upper epitaxial layer over the lower epitaxial layer and activating the implanted dopants to form a heavily doped region. The shallow component is formed over the heavily doped region, and the deep component is formed outside the heavily doped region, extending through the upper epitaxial layer into the lower epitaxial layer.

Abstract: A method includes providing a semiconductor substrate having a plurality of linear semiconductor fin structures spaced apart from one another on a surface of the substrate; siliciding sidewalls of the semiconductor fin structures; removing an unsilicided central portion of each semiconductor fin structure leaving, for a given one of the semiconductor fin structures, a pair of silicide fin structures that are parallel to one another and spaced apart from one another by a distance about equal to a width of the removed unsilicided central portion of the semiconductor fin structure; and forming contacts to conductively connect together a plurality of the silicide fin structures to form a resistor. A resistance value of the resistor is related at least to a type of silicide, a number of contacted adjacent silicide fin structures and a length between two contacts.

Abstract: A semiconductor device includes an interconnect layer on an inter-layer dielectric (ILD) structure. The ILD structure includes: first contacts, extending through the ILD structure, electrically connected to corresponding first components located in a floor structure underlying the ILD structure; at least one second component located within the ILD structure and spaced from a surface of the ILD structure (in a direction perpendicular to a plane of the ILD structure) a distance which is less than a thickness of the ILD structure; and second contacts directly contacting corresponding first regions of the at least one second component. The interconnect layer includes: first metallization segments which directly contact corresponding ones of the first contacts; and second metallization segments located over a second region of the at least one second component, a width of the second metallization segments being less than a width of the first metallization segments.

Abstract: The present disclosure provides an organic light-emitting display panel. The organic display panel comprises a substrate, an organic light-emitting structure disposed on the substrate, a package layer covering the organic light-emitting structure. The package layer comprises at least one non-organic block layer and at least one organic block layer, and a block pole. The block pole comprises a first block pole and a second block pole. The second block pole is disposed at the periphery of the first block pole. The at least one non-organic block layer comprises an outmost non-organic block layer. The first block pole is at least covered by the outmost non-organic block layer. The at least one organic block layer can partially cover the first block pole or not cover the first block pole at all. The at least one non-organic block layer can partially cover the second block pole or not cover the second block pole at all.

Abstract: A display device according to an exemplary embodiment of the present invention includes: a scan line extending in a first direction; a data line crossing the scan line and transmitting a data signal; a driving voltage line crossing the scan line and transmitting a driving voltage; a conductive member including a portion connected to the driving voltage line and overlapping the data line, wherein a first insulation layer is interposed between the conductive member and the data line; and a control line including a plurality of main line portions each extending in the first direction, and a detour portion that is located between two of the plurality of main line portions that are adjacent one another in a plan view, wherein the detour portion connects the two adjacent main line portions together, wherein a part of the detour portion is located between the conductive member and the driving voltage line in the plan view.

Abstract: An organic light emitting display device has a display region and a first peripheral region surrounding at least one side of the display region. The organic light emitting display device includes a first substrate a first substrate, a plurality of pixels on the first substrate, the plurality of pixels being included in the display region, at least one of the plurality of pixels including an organic light emitting element, and a driving circuit on the first substrate and in the first peripheral region. At least one of the pixels includes a first transmission portion and at least one light emitting portion, and the first peripheral region includes at least one second transmission portion.