Abstract: The present invention relates chemical mechanical planarization (“CMP”) of copper surfaces and describes copper CMP slurries including an oxidizer, one or more hydroxylamine compounds and at least one abrasive. The hydroxylamine compositions can include hydroxylamine nitrate, hydroxylamine, hydroxylamine sulfate, hydroxyl ammonium salts and mixtures thereof. The oxidizers may further include citric acid as a complexing agent for copper. Sulfuric acid and/or nitric acid provide means for modifying the pH of the oxidizer so that the hydroxylamine chemistries are acidic. Some embodiments include corrosion inhibitors such as benzotriazole, 2,4-pentadione dioxime and/or 1,6-dioxaspiro[4,4] nonane 2,7-dione. Some embodiments also include a free radical inhibitor, advantageously hydrazine. Colloidal silica and milled alumina are used as typical abrasive components.

Abstract: A method to prevent electrical shorts between tungsten interconnects. First, a semiconductor substrate having an insulating layer thereon is provided. Then, the insulating layer is selectively etched to form a trench for interconnect. Then, a titanium nitride film is conformally deposited on the surface of the trench and the insulating layer. A tungsten layer is then deposited to fill the trench. Next, the tungsten layer above the titanium nitride film is removed by an ammonia hydrogen peroxide mixture (APM) solution. Next, the titanium nitride film above the insulating layer is removed by a sulfuric acid hydrogen peroxide mixture (SPM) solution to leave a tungsten interconnect within the trench.

Abstract: A slurry includes a plurality of particles and at least one selective adsorption additive. The particles are preferably composite particles including a core surrounded by a shell provided by the selective adsorption additive. The slurry can be used to polish a structure including silicon dioxide or a low K dielectric film and a silicon nitride containing film, such as to form a shallow trench isolation (STI) structure or a metal-dielectric structure. The silicon nitride containing film surface substantially adsorbs the selective adsorption additive, whereas the silicon dioxide or low K dielectric film shows non-substantial adsorption characteristics to the adsorption additive.

Abstract: Based upon an existing or to be produced multi-layered semiconductor-insulator-semiconductor carrier layer wafer (SOI substrate), irregularity of the etching conditions between the center and the edge region occurring during dry etching can be counteracted by a number of alternative steps, in particular, an additional layer construction compensating for the etching irregularity so that in any event an approximately homogeneous etching removal takes place over the entire area of the wafer to be etched.

Abstract: The copper-based metal polishing composition causes Cu or Cu alloy not to be dissolved at all in immersing Cu or Cu alloy therein, and makes it possible to polish Cu or Cu alloy at a high rate in polishing treatment. Such a copper-based metal polishing composition comprises a water-soluble first organic acid capable of reaction with copper to produce a copper complex compound which is substantially insoluble in water and has a mechanical strength lower than that of copper, at least one second organic acid selected from an organic acid having a single carboxyl group and a single hydroxyl group and oxalic acid, an abrasive grain, an oxidizing agent, and water.

Abstract: A process for abrasive machining of surfaces of semiconductor wafers, in particular during the production of electronic memory elements, is described. In the process, a topography of the surfaces of a plurality of wafers is planarized by an at least partially mechanical route. In a further process step which takes place at a later stage, further material is removed from the planarization surfaces by the action of a liquid, chemical composition (etchback). After the planarization step and before the etchback step, a layer thickness measurement of the planarized layer is carried. The method is distinguished by the fact that the measurement results of the layer thickness measurement are used as the basis for the automatic selection or formulation of one of a plurality of chemical compositions and/or the time of action of a selected or formulated chemical composition for carrying out the etchback step.

Abstract: A polishing slurry including an abrasive, deionized water, a pH controlling agent, and polyethylene imine, can control the removal rates of a silicon oxide layer and a silicon nitride layer which are simultaneously exposed during chemical mechanical polishing (CMP) of a conductive layer. A relative ratio of the removal rate of the silicon oxide layer to that of the silicon nitride layer can be controlled by controlling an amount of the choline derivative.

Abstract: The invention provides a method for polishing one or more layers of a multi-layer substrate that includes a first metal layer and a second layer comprising (i) contacting the first metal layer with a polishing system comprising a liquid carrier, at least one oxidizing agent, at least one polishing additive that increases the rate at which the system polishes at least one layer of the substrate, wherein the polishing additive is selected from the group consisting of pyrophosphates, condensed phosphates, phosphonic acids and salts thereof, amines, amino alcohols, amides, imines, imino acids, nitriles, nitros, thiols thioesters, thioethers, carbothiolic acids, carbothionic acids, thiocarboxylic acids, thiosalicylic acids, and mixtures thereof, and a polishing pad and/or an abrasive, and (ii) polishing the first metal layer with the system until at least a portion of the first metal layer is removed from the substrate.

Abstract: Slurries for use in the chemical mechanical polishing (CMP) of copper and copper diffusion barriers that reduce pattern sensitive erosion of an underlying dielectric layer include at least one surfactant. Inclusion of surfactants, such as cetyltrimethylammonium bromide in a slurry mixture can reduce pattern sensitive erosion of dielectric materials such as silicon oxide, and fluorinated oxides of silicon that would otherwise occur during CMP of copper and copper diffusion barriers as is typical in the formation of copper interconnect lines in integrated circuits.

Abstract: A method for performing a metallic etch, etch mask stripping, and removal of residual sidewall passivation in a single etch chamber. A wafer is placed in an etch chamber. A metal etch is performed on the wafer. A stripping gas, such as a mixture of oxygen and argon is provided to the etch chamber and is energized to form an oxygen plasma. The oxygen plasma strips the etch mask from the wafer and removes residual sidewall passivation. The oxygen plasma also cleans the etch chamber.

Abstract: The present invention provides an LSI device polishing composition containing water, abrasive grains, an organic acid, and an oxidizing agent, and having a pH of 5.5-10.0 adjusted by an alkaline substance, the LSI device polishing composition being used for polishing a copper-containing metal wiring layer in which copper is deposited on an insulating film via barrier metal formed of Ta or TaN; and a method for producing LSI devices by use of the polishing composition. During polishing of a barrier metal such as Ta or TaN and a copper wiring layer, the rate of polishing Ta or TaN can be enhanced, to thereby prevent dishing and erosion.

Abstract: A polishing composition comprising the following components (a) to (g): (a) an abrasive which is at least one member selected from the group consisting of silicon dioxide, aluminum oxide, cerium oxide, zirconium oxide and titanium oxide, (b) a polyalkyleneimine, (c) at least one member selected from the group consisting of guinaldic acid and its derivatives, (d) at least one member selected from the group consisting of glycine, ?-alanine, histidine and their derivatives, (e) at least one member selected from the group consisting of benzotriazole and its derivatives, (f) hydrogen peroxide, and (g) water.

Abstract: Slurries for use in the chemical mechanical polishing (CMP) of copper and copper diffusion barriers that reduce pattern sensitive erosion of an underlying dielectric layer include at least one surfactant. Inclusion of surfactants, such as cetyltrimethylammonium bromide in a slurry mixture can reduce pattern sensitive erosion of dielectric materials such as silicon oxide, and fluorinated oxides of silicon that would otherwise occur during CMP of copper and copper diffusion barriers as is typical in the formation of copper interconnect lines in integrated circuits.

Abstract: A composition which includes liquid or supercritical carbon dioxide and an acid having a pKa of less than about 4. The composition is employed in a process of removing residue from a precision surface, such as a semiconductor sample, in which the precision surface is contacted with the composition under thermodynamic conditions consistent with the retention of the liquid or supercritical carbon dioxide in the liquid or supercritical state.

Abstract: The present invention provides an etching composition which includes a polyhydric alcohol in combination with two inorganic acids. Preferably the etching composition of the present invention is a mixture of a glycol, nitric acid and hydrofluoric acid, with propylene glycol being preferred. The etching composition of the present invention achieves a selectivity of greater than 70:1, doped material to undoped material. The present invention provides an etching formulation which has increased selectivity of doped polysilicon to undoped polysilicon and provides an efficient integrated circuit fabrication process without requiring time consuming and costly processing modifications to the etching apparatus or production apparatus.

Abstract: A plasma processing apparatus and a plasma processing method which make it possible to prevent an abnormal discharge from occurring during workpiece removal without having to modify the design or resulting in a reduction in throughput are provided. A wafer W placed on a lower electrode 106 inside a processing chamber 102 at an etching apparatus 100 undergoes the etching process. When the etching process ends, the polarity of the high level DC voltage applied to an electrostatic chuck 108 vacuum holding the wafer W is reversed. A gate valve G is opened to allow N2 inside a delivery chamber 200 in communication with the processing chamber 102 to flow in. The pressure inside the processing chamber 102 is thus raised to allow a gentle self discharge of the residual charge at the wafer W.

Abstract: A standard pattern of a differential value of an interference light is set with respect to a predetermined film thickness of a first member to be processed. The standard pattern uses a wavelength as a parameter. Then, an intensity of an interference light of a second member to be processed, composed just like the first member, is measured with respect to each of a plurality of wavelengths so as to obtain a real pattern of an differential value of the measured interference light intensity. The real pattern also uses a wavelength as a parameter. Then, the film thickness of the second member is obtained according to the standard pattern and the real pattern of the differential value.

Abstract: An Al film is formed on a barrier metal covering a thin film resistor to have a first opening. A photo-resist is formed on the Al film and in the opening, and is patterned to have a second opening having an opening area smaller than that of the first opening and open in the first opening to expose the barrier metal therefrom. Then, the barrier metal is etched through the second opening. Because the barrier metal is etched from an inner portion more than the opening end of the first opening, under-cut of the barrier metal is prevented.

Abstract: Gas-assisted etching (GAE) for integrated circuit dies is enhanced via a method and system that enable halide-assisted etching of dies having copper material. According to an example embodiment of the present invention, an integrated circuit die having copper is etched using a focused ion beam (FIB) and a halide etch gas, such as chlorine. A selected amount of oxygen-containing gas is supplied to the die to react with the halide and prevent the corrosion of exposed copper material in the die. In this manner, the benefits of halide-assisted etching are realized while inhibiting the corrosion of copper that typically occurs with integrated circuit dies having copper material.

Abstract: The invention provides a chemical-mechanical polishing system for a substrate comprising a liquid carrier, a polishing pad and/or an abrasive, a per-type oxidizer, and a phosphono group-containing additive, as well as a method of using the same to polish substrates, particularly nickel-containing substrates.