Abstract: The invention provides methods of polishing a substrate comprising (i) contacting a substrate comprising at least one metal layer comprising copper with a chemical-mechanical polishing (CMP) system and (ii) abrading at least a portion of the metal layer comprising copper to polish the substrate. The CMP system comprises (a) an abrasive, (b) an amphiphilic nonionic surfactant, (c) a means for oxidizing the metal layer, (d) an organic acid, (e) a corrosion inhibitor, and (f) a liquid carrier. The invention further provides a two-step method of polishing a substrate comprising a first metal layer and a second, different metal layer. The first metal layer is polishing with a first CMP system comprising an abrasive and a liquid carrier, and the second metal layer is polished with a second CMP system comprising (a) an abrasive, (b) an amphiphilic nonionic surfactant, and (c) a liquid carrier.

Abstract: The present invention provides methods and an etched substrate. In one embodiment, a method for etching a substrate is provided which comprises creating an etch hole in the substrate using a through the substrate etch and forming a junction on an interior of the etched hole for forming a semiconductor device therein.

Abstract: This device, which is used to measure pressures or accelerations for example, comprises an isolation layer (32) that holds at least one piezoresistive gauge (29). The side tangents (T) of this gauge essentially make up over 90° angles with the surface (37) of the isolation layer. The device may be created using processes of wet isotropic etching, chemical anisotropic etching or isolation material growth processes.

Abstract: A method for automated monitoring and controlling of a semiconductor wafer plasma process including performing a plasma process in a plasma processing system to treat a semiconductor process wafer according to a first plasma process recipe; collecting plasma process parameters including at least an RF power and a plasma process time at pre-determined time intervals; and, storing the plasma process parameters including pre-process plasma processing system parameters according to a selectively queryable database to create a plasma process history such that upon abortion of the plasma process the plasma process history may be selectively retrieved to determine a second plasma process recipe to complete the plasma process.

Abstract: A method of forming a dual damascene interconnection employs a low-k dielectric organic polymer as an insulating layer. With only one hard mask layer, ashing damage to the insulating layer is prevented using a hard mask layer and an etch-stop layer that are different in etch rate from that of a self-aligned spacer. Further, it is possible to form a via hole that is smaller than the resolution limit of the photolithographic process. As a result, the process is simplified and a photoresist tail phenomenon does not occur.

Abstract: A method of fabricating a semiconductor device capable of relaxing pattern dependency in a planarization step is obtained. This method of fabricating a semiconductor device comprises steps of filling up an opening with a filler while forming the filler on the opening and on a non-opening part, forming a mask layer at least on a part of the filler located on the opening, etching a region, formed with no mask layer, of a part of the filler located on the non-opening part by a prescribed thickness through a mask of the mask layer, and thereafter scraping the upper surface of the filler located on the opening and on the non-opening part thereby performing surface planarization. Thus, the width of the upper surface of the part of the filler located on the non-opening part having a large height is reduced. Therefore, the part having a large height is so readily removed that the planarized surface can be prevented from dispersion.

Abstract: A method of removing ruthenium silicide from a substrate surface which comprises exposing the ruthenium silicide surface to a solution containing chlorine and fluorine containing chemicals. In particular, said solution is designed to react with said ruthenium silicide film such that water-soluble reaction products are formed.

Abstract: Disclosed herein is an easy and well-integrated method of etching features to different depths in a crystalline substrate, such as a single-crystal silicon substrate. The method utilizes a specialized masking process and takes advantage of a highly selective etch process. The method provides a system of interconnected, variable depth reservoirs and channels. The plasma used to etch the channels may be designed to provide a sidewall roughness of about 200 nm or less. The resulting structure can be used in various MEMS applications, including biomedical MEMS and MEMS for semiconductor applications.

Abstract: An abrasive liquid for a metal comprising (1) an oxidizing agent for a metal, (2) a dissolving agent for an oxidized metal, (3) a first protecting film-forming agent such as an amino acid or an azole which adsorbs physically on the surface of the metal and/or forms a chemical bond, to thereby form a protecting film, (4) a second protecting film-forming agent such as polyacrylic acid, polyamido acid or a salt thereof which assists the first protecting film-forming agent informing a protecting film and (5) water; and a method for polishing.

Abstract: The present invention provides a low-k dielectric etching process with high etching selectivities with respect to adjacent layers of other materials, such as an overlying photoresist mask and an underlying barrier/liner layer. The process comprises the step of exposing a portion of the low-k dielectric layer to a plasma of a process gas that includes a fluorocarbon gas, a nitrogen-containing gas, and an inert gas, wherein the volumetric flow ratio of inert:fluorocarbon gas is in the range of 20:1 to 100:1, and the volumetric flow ratio of fluorocarbon:nitrogen-containing gas is selected to provide a low-k dielectric to photoresist etching selectivity ratio greater than about 5:1 and a low-k dielectric etch rate higher than about 4000 ?/min.

Abstract: An abrasive liquid for a metal comprising (1) an oxidizing agent for a metal, (2) a dissolving agent for an oxidized metal, (3) a first protecting film-forming agent such as an amino acid or an azole which adsorbs physically on the surface of the metal and/or forms a chemical bond, to thereby form a protecting film, (4) a second protecting film-forming agent such as polyacrylic acid, polyamido acid or a salt thereof which assists the first protecting film-forming agent in forming a protecting film and (5) water; and a method for polishing.

Abstract: Disclosed are an etching gas composition for etching silicon oxide and a method of etching silicon oxide using the same. The etching gas composition for etching silicon oxide consists essentially of a carbon fluoride gas, in which the ratio of fluorine atoms relative to carbon atoms is less than 2, and an auxiliary fluorohydrocarbon gas comprising hydrogen, fluorine and carbon atoms. Silicon oxide is etched efficiently and precisely by utilizing a plasma of the etching gas composition. The etching selectivity of an oxide layer formed of silicon oxide with respect to photoresisit is thereby increased. Even when a thin photoresist layer wherein solubility into water changes by a light having DUV wavelength is applied, a contact hole having a high aspect ratio and a good profile can be manufactured using the etching compositions and methods of the present invention.

Abstract: A semiconductor wafer cleaning formulation, including 1-35% wt. fluoride source, 20-60% wt. organic amine(s), 0.1-40% wt. nitrogenous component, e.g., a nitrogen-containing carboxylic acid or an imine, 20-50% wt. water, and 0-21% wt. metal chelating agent(s). The formulations are useful to remove residue from wafers following a resist plasma ashing step, such as inorganic residue from semiconductor wafers containing delicate copper interconnecting structures.

Abstract: Laser sources output laser lights L1 and L2 having different wavelengths so as to increase an accuracy of an endpoint detection of polishing processing by enabling an accurate detection of a film thickness of a layer insulating film on a surface of a wafer to be polished by the CMP processing, the lights are emitted from a detection window via a beam splitter to the layer insulating film formed on the surface of the wafer to be polished by a pad, different optical detectors detect interference lights corresponding to the laser lights L1 and L2 reflected and generated from a surface of the layer insulating film and a pattern under the surface via the detection window, the beam splitter, and a dichroic mirror, the detection results are supplied to a film thickness evaluation unit 7, a film thickness of the layer insulation film is detected on the basis of a relationship between intensities of the reflected interference lights to the laser lights L1 and L2 or the intensity ratio, and an endpoint of polishing pro

Abstract: The novel process lends itself to the production of highly resolved resist structures. A resist structure having webs is produced from a photoresist on a substrate and then the sidewalls of the webs are selectively chemically amplified so that chemically amplified sidewall structures are obtained. After the removal of the chemically unamplified sections, the amplified sidewall structures are transferred to the substrate. The process permits a resolution of structures that are not producible using the currently customary exposure wavelengths.

Abstract: A method is described for forming a trench in a semiconductor substrate, which has a silicon layer, an oxide layer overlying the silicon layer, and a nitride layer overlying the oxide layer. The method includes etching the nitride layer to a nitride end point using a nitride etching chemistry, which includes a fluorinated hydrocarbon, oxygen, and an inert gas selected from the group consisting of neon, argon, krypton, xenon, and combinations thereof. Methods of making semiconductor devices, methods of reducing defects in semiconductor devices, and silicon wafers having trenches and isolation regions formed by the above-mentioned methods for forming a trench are also described.

Abstract: A ceramic part having a surface exposed to the interior space, the surface having been shaped and plasma conditioned to reduce particles thereon by contacting the shaped surface with a high intensity plasma. The ceramic part can be made by sintering or machining a chemically deposited material. During processing of semiconductor substrates, particle contamination can be minimized by the ceramic part as a result of the plasma conditioning treatment. The ceramic part can be made of various materials such as alumina, silicon dioxide, quartz, carbon, silicon, silicon carbide, silicon nitride, boron nitride, boron carbide, aluminum nitride or titanium carbide.

Abstract: A high-purity gas for plasma reaction having an octafluorocyclopentene purity of at least 99.9% by volume based on the total volume of the gas for plasma reaction, wherein the total content of nitrogen gas and oxygen gas, contained as trace gaseous ingredients of the remainder, is not larger than 200 ppm by volume. This high-purity gas for plasma reaction can be produced by (1) a process of distilling crude octafluorocyclopentene in an inert gas of group 0, or (2) a process of distilling crude octafluorocyclopentene into a purity of at least 99.9% by volume, and then, removing an impurity remainder.

Abstract: Embodiments of the invention generally provide a method for enhancing chemical reactions within a substrate processing chamber during a substrate processing sequence. The method generally includes supporting a substrate in a face up position on a substrate support member, providing a process gas into the processing chamber, and striking a plasma of the process gas. The method further includes imparting at least one impulse to the substrate support member that is substantially perpendicular to a substrate surface, the at least one impulse being of sufficient magnitude to agitate the substrate surface to expand an exposed surface area of the substrate surface.

Abstract: A method and composition for planarizing a substrate surface is provided. The polishing composition includes an oxidizer capable of oxidizing a metal undergoing planarization and yielding a complexing agent which complexes with the oxidized metal and a stabilizer such as a stannate salt. The composition may further include abrasive particles and/or inhibitors. The composition may be used in a multi-step polishing process including polishing a substrate surface to selectively remove a metal layer with respect to a barrier layer and dielectric layer and polishing a substrate surface using the composition to non-selectively remove the metal layer, a barrier layer, and a dielectric layer from the substrate surface.