Abstract: A semiconductor device and method of making the device in which portions of the device may be completed prior to forming the detector region. The device comprises a substrate, a first insulating layer over the substrate, a first level semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, a metallic contact extending through the second insulating layer and a third insulating layer overlying the contact. A detector region is spaced apart from the contact. The method comprises the steps of forming a first insulating layer over the substrate, forming a semiconductor layer over the first insulating layer, forming a contact through the second insulating layer, forming a third insulating layer over the contact and forming an opening through the first, second and third insulating layers and forming a detector region in the opening.

Abstract: An optical control circuit is formed by connecting a photoconductive element and resistive element at their one end to the control electrode of a transistor, while connecting the other end of the photoconductive element to one of output electrodes of the transistor and the other end of the resistive element to a predetermined voltage supply point. With this simple circuit arrangement, an effective input control with respect to the control electrode of the transistor can be realized.

Abstract: An electroluminescent device, which emits light by recombination of the carriers injected or excited by light of energy of electrical field, comprising an active layer which includes a semiconductor layer of a super-lattice structure. The layer in the super-lattice structure is changed in effective band gap by an electrical field externally applied to vary the emitted light wavelength. The semiconductor layer of said super-lattice structure comprising an non-single crystalline semiconductor material.

Abstract: A superconducting electron device is disclosed, in which a pair of parallel superconducting channels each having a Josephson junction therein are provided between source and drain electrodes, and a gate electrode is provided to apply a voltage to the channels to make potentials at each channels different to each other. The current flow through channels is controlled by the application of a voltage to the gate electrode based on electrostatic Aharanov-Bohm effect. The device uses the coherency characteristics of the superconducting material, thus high speed switching operation can be achieved.

Abstract: Disclosed is a monolithic integrated semiconductor device which may contain specimens of seven different circuit components; namely: lateral N-MOS and lateral P-MOS transistors (CMOS), vertical N-DMOS and vertical P-DMOS transistors, vertical NPN bipolar transistors, vertical PNP bipolar transistors with isolated collector and low leakage junction diodes as well as a process for fabricating such a device.

Abstract: Disclosed is an improved lateral effect position-sensitive device having a clover design and including a semiconductor body including a first doped surface-oriented region of one conductivity type, a second doped surface-oriented region of opposite conductivity type, and a layer of intrinsic semiconductor material separating the first region and the second region. The first region has concave boundaries and at least four vertices. A first plurality of electrical contacts electrically contacts the vertices, and a second plurality of contacts electrically contacts intermediate portions of the concave boundaries. Conductors electrically interconnect each of the second plurality of contacts with one of the first plurality of contacts.

Abstract: The invention comprises integral all silicon light sources and 3-D optical waveguides which combine the functions of room temperature optical emission and optical signal routing. Several light emitting electrooptical silicon devices are herein disclosed. Light emitted by silicon LEDs is concentrated in channels (waveguides) and is directed to desired locations on a silicon wafer. In all of the devices, the light source is electrically actuated by a forward biased p-n junction and the light intensity can be electrically controlled by varying the applied current.

Abstract: An optical semiconductor device having an active region defined between a pair of semiconductor regions, the active region having an incident end face through which light is introduced and an emission end face through which light is emitted. This device is designed to continuously change the distribution of the density of carriers injected in the active region over the area between the light incident side and the light emission side, thereby changing the density of carriers in the active region from the incident end face to the emission end face.

Abstract: A multilayer semiconductor structure is disclosed having a plurality of conducting layers separated by a barrier layer. A common contact extends from an upper exposed surface to all the layers of the device and a surface contact extends from the upper surface into an uppermost conducting layer. Each of the conducting layers defines an independent channel of current flow thereby providing at least two independent current paths between the common contact and the surface contact. A Schottky barrier electrode is disposed on the surface of the structure between the common and surface contacts and is operable to selectively deplete charge carriers within the conducting layers sequentially to cause current to flow through the desired channel. The current flow in each channel results in an independent I/V characteristic curve in which one channel is linear and the other channel is non-linear.

Abstract: In a semiconductor device having a plurality of semiconductor layers of different composition, such as a hot electron transistor, in which respective layers are contacted to form a majority carrier injection electrode, a control electrode and a majority carrier extraction electrode, the layers forming the electrodes are separated from one another by separating layers or layer systems of different composition. These separating layers form potential barriers for the majority carriers. A problem with such known devices is that the layer forming the control electrode has to have a low resistance which has previously required a high doping concentration in this layer. This doping concentration however increases losses due to plasmon/phonon coupling and scattering and reduces the switching speed of the device.

Abstract: A self-powered electronic component, particularly, a Josephson junction, is formed of a layer of a superconductor epitaxially grown on a substrate formed of a single crystal of silicon. In accordance with one embodiment of the invention, the expitaxial superconductor layer is separated into two parts by a groove defined by a thin growth region, forming the Josephson junction. On the epitaxial layer at the first side of the junction is deposited a thin layer of an insertion material forming the positive pole of the Josephson junction as well as the cathode of a solid state power generator. On the epitaxial layer and over the thin layer of insertion material is deposited a separator, or fast ion conductor, which assumes the weak link of the Josephson junction as well as separates the ion source from the electronic exchanger and assumes the fast ion transport.

Abstract: A radiation-induced substrate photo-current compensation apparatus for a silicon FET on a sapphire substrate having an additional pair of electrodes on the substrate in a precise geometrical relationship to the source and drain electrodes to provide a compensating substrate current which flows into the source and drain electrodes, eliminating the undesirable effects of radiation on the semiconductor.

Abstract: A semiconductor device includes a semicoonductor pellet, and a metal nitride film or a metal silicide film, each having conductivity and an anti-oxidation property, and being formed on one surface of the pellet to cause the surface to have a substantially uniform potential.

Abstract: A lateral surface superlattice device having electronically created quantum wells which exhibits negative differential conductivity at ambient temperature and process for producing same.

Abstract: A method of making a bipolar transistor in an LSI or VLSI process which includes forming a buried DUF collector of a first conductivity type, growing an epitaxial layer of a first conductivity type over said DUF collector and forming isolation means around a transistor region. The transistor region includes a trench which at least partially encloses the transistor region and extends through the DUF collector. Emitter and base regions of the first and second conductivity types, respectively, are formed in the epitaxial layer. A collector contact region of the first conductivity is formed in the epitaxial layer and extends down to the buried DUF collector.

Abstract: A conductor-dielectric-semiconductor device and a method of making such a device which has an insulating silicon-dioxide dielectric layer on a silicon substrate, and a conductive layer over a region of the dielectric layer. Silicon ions have been implanted into the region under the conductive layer. Depending upon the thickness of the region and the concentration of implanted silicon ions, the device can function as an IGFET memory device or a vertical resistor between the conductive layer and the substrate.

Abstract: A semiconductor device comprises a first barrier layer, a quantum well layer formed on the first barrier layer and having a bottom of conduction band with an energy which varies with a curve of second order, a second barrier layer formed on said quantum well layer, and first and second contact layers. The first barrier layer, the quantum well layer and the second barrier layer make up a layer sequence which is repeated a predetermined number of times, and the first contact layer connects to the first barrier layer in a first of the predetermined number of layer sequences, while the second contact layer connects to the second barrier layer in a last of the predetermined number of layer sequences.

Abstract: A complementary semiconductor integrated circuit for absorbing a noise comprises an n-type semiconductor substrate maintained at a supply voltage, a p-type well maintained at the reference voltage potential, an n-type region formed in the n-type semiconductor substrate and connected to the supply voltage, a polysilicon layer formed on the n-type region through an insulating film and connected to the reference voltage, whereby a capacitance is formed by the n-type region and the polysilicon layer formed on the n-type region through the insulating film. A noise included in the supply voltage is absorbed by the capacitance.

Abstract: A self-aligned split gate single transistor memory cell structure is formed by a process which self aligns the drain region to one edge of a floating gate. The portion of the channel underneath the floating gate is accurately defined by using one edge of the floating gate to align the drain region. The control gate formed over the floating gate controls the portion of the channel region between the floating gate and the source to provide split gate operation. The source region is formed sufficiently far from the floating gate so that the channel length between the source region and the closest edge of the floating gate is controlled by the control gate but does not have to be accurately defined.

Abstract: A semiconductor device in which a strained-layer of super-lattice composed of two or more group II-IV semiconductors grown on an epitaxial growth layer formed on a surface of a semiconductor substrate. Since the strained-layer of super-lattice composed of two or more group II-VI semiconductors is present in the heterojunction of the heterostructure, it is possible to form a favorable heterostructure seminconductor layer, inhibiting the adverse effects of lattice mismatch.