Abstract: A semiconductor module disclosed herein may include: a first semiconductor element; an encapsulant that encapsulates the first semiconductor element; and a first stacked substrate on which the first semiconductor element is disposed, wherein the first stacked substrate may include a first insulator substrate, a first inner conductive layer and a first outer conductive layer, the first inner conductive layer being disposed on one side relative to the first insulator substrate, and the first outer conductive layer being disposed on another side relative to the first insulator substrate; the first inner conductive layer may be electrically connected to the first semiconductor element inside the encapsulant; and a part of the first inner conductive layer may be located outside the encapsulant and be configured to enable an external member to be bonded to the part.

Abstract: Device, package structure and method of forming the same are disclosed. The device includes a die encapsulated by an encapsulant, a conductive structure aside the die, and a dielectric layer overlying the conductive structure. The conductive structure includes a through via in the encapsulant, a redistribution line layer overlying the through via, and a seed layer overlying the redistribution line layer. The dielectric layer includes an opening, wherein the opening exposes a surface of the conductive structure, the opening has a scallop sidewall, and an included angle between a bottom surface of the dielectric layer and a sidewall of the opening is larger than about 60 degrees.

Abstract: A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The semiconductor device includes a fin structure disposed on a substrate, a nanostructured channel region disposed on the fin structure, and a gate-all-around (GAA) structure surrounding the nanostructured channel region. The GAA structure includes a high-K (HK) gate dielectric layer with a metal doped region having dopants of a first metallic material, a p-type work function metal (pWFM) layer disposed on the HK gate dielectric layer, a bimetallic nitride layer interposed between the HK gate dielectric layer and the pWFM layer, an n-type work function metal (nWFM) layer disposed on the pWFM layer, and a gate metal fill layer disposed on the nWFM layer. The pWFM layer includes a second metallic material and the bimetallic nitride layer includes the first and second metallic materials.

Abstract: A method of forming a semiconductor structure includes forming first semiconductor devices over a first substrate, forming a first dielectric material layer over the first semiconductor devices, forming vertical recesses in the first dielectric material layer, such that each of the vertical recesses vertically extends from a topmost surface of the first dielectric material layer toward the first substrate, forming silicon nitride material portions in each of the vertical recesses; and locally irradiating a second subset of the silicon nitride material portions with a laser beam.

Abstract: To provide a display device having a reduced non-display area, the display device including: a substrate including a display area, the display area including a first area and a second area; a first pixel electrode in the first area, and a second pixel electrode in the second area; a pixel-defining layer on the substrate and including a first opening and a second opening, the first opening exposing at least a portion of the first pixel electrode, and the second opening exposing at least a portion of the second pixel electrode; a first intermediate layer on the at least a portion of the first pixel electrode, and a second intermediate layer on the at least a portion of the second pixel electrode; a first opposite electrode on the first intermediate layer; and a second opposite electrode on the first opposite electrode and the second intermediate layer.

Abstract: [Object] It is possible to further improve reliability. [Solution] There is provided a display device including: a pixel unit which is configured with a plurality of pixel circuits arranged in a matrix, each of the pixel circuits including a light emitting element and a driving circuit for driving the light emitting element; scanning lines which are interconnections connected to the respective pixel circuits and are provided to extend in a first direction and correspond to respective rows of a plurality of the pixel circuits; and signal lines which are interconnections connected to the respective pixel circuits and are provided to extend in a second direction orthogonal to the first direction and correspond to respective columns of a plurality of the pixel circuits. One of the scanning lines and the signal lines, provided for the one pixel circuit, which is larger in number is positioned in a lower-level interconnection layer.

Abstract: A display device includes: first pixels which include a first pixel branch line extending in a first direction at one side portion and a first common branch line extending in the first direction at the other side portion which is opposite to the one side portion; second pixels which include a second common branch line extending in the first direction at the one side portion and a second pixel branch line extending in the first direction at the other side portion which is opposite to the one side portion; a first luminous element between the first pixel branch line and the first common branch line; and a second luminous element between the second common branch line and the second pixel branch line, wherein the first pixel and the second pixel are disposed in a second direction which intersects the first direction.

Abstract: Embodiments of semiconductor devices and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes a first bonding layer having a plurality of first bonding contacts, and a first via structure extending vertically through the first bonding layer and into the first semiconductor structure. The second semiconductor structure includes a second bonding layer having a plurality of second bonding contacts, and a second via structure extending vertically through the second bonding layer and into the second semiconductor structure. The first bonding contacts are in contact with the second bonding contacts at the bonding interface, the first via structure is in contact with the second via structure, and sidewalls of the first via structure and the second via structures have a staggered profile at the bonding interface.

Abstract: A display apparatus includes: a substrate having a bending area between a first area and a second area; internal conductive lines on the substrate in the first area; external conductive lines on the substrate in the second area; an organic material layer covering the bending area and covering at least a portion of the internal conductive lines and the external conductive lines; and connection lines on the organic material layer and connecting the internal conductive lines to the external conductive lines, respectively. Organic through-holes are defined through the organic material layer, the connection lines are respectively connected to the internal conductive lines through the organic through-holes, and an upper surface of the organic material layer between the organic through-holes has a convex curved shape.

Abstract: A power module includes: a base plate having a first surface; electrode plate provided at the first surface; a wire connected to a semiconductor chip and the electrode plate; a metal member connected to the electrode plate; a terminal plate; a first resin layer, a connection portion of the wire and the semiconductor chip being disposed inside the first resin layer; and a second resin layer provided on the first resin layer and having a lower elastic modulus than the first resin layer. The terminal plate includes a bonding portion contacting an upper surface of the metal member, a curved portion curved upward from the bonding portion. The curved portion is disposed inside the second resin layer, and a length from the first surface of a lower surface of the bonding portion is greater than a length from the first surface of the connection portion.

Abstract: A magnetoresistive random access memory (MRAM) structure includes a magnetic tunnel junction (MTJ), and a top electrode which contacts an end of the MTJ. The top electrode includes a top electrode upper portion and a top electrode lower portion. The width of the top electrode upper portion is larger than the width of the top electrode lower portion. A bottom electrode contacts another end of the MTJ. The top electrode, the MTJ and the bottom electrode form an MRAM.

Abstract: A method of manufacturing an electronic device, including: a) forming a plurality of chips, each including a plurality of connection areas and at least one first pad; b) forming a transfer substrate including, for each chip, a plurality of connection areas and at least one second pad, one of the first and second pads being a permanent magnet and the other one of the first and second pads being either a permanent magnet or made of a ferromagnetic material; and c) affixing the chips to the transfer substrate to connect the connection areas of the chips to the connection areas of the transfer substrate, by using the magnetic force between the pads to align the connection areas of the chips with the corresponding connection areas of the transfer substrate.

Abstract: A display panel and a method of manufacturing the same are provided. The display pane includes an array substrate; a plurality of pixel defining portions, the pixel defining portions spaced apart from each other on the array substrate; a plurality of pixel units, each of the pixel units including: a plurality of sub-pixels, each of the sub-pixels disposed between corresponding adjacent pixel defining portions, each of the sub-pixels including a light emitting layer for emitting light and a hole injection layer. A thickness of the hole injection layer is positively correlated with a wavelength of light emitted by a corresponding light emitting layer.

Abstract: Solar cells having a plurality of sub-cells coupled by metallization structures, and singulation approaches to forming solar cells having a plurality of sub-cells coupled by metallization structures, are described. In an example, a solar cell, includes a plurality of sub-cells, each of the sub-cells having a singulated and physically separated semiconductor substrate portion. Adjacent ones of the singulated and physically separated semiconductor substrate portions have a groove there between. The solar cell also includes a monolithic metallization structure. A portion of the monolithic metallization structure couples ones of the plurality of sub-cells. The groove between adjacent ones of the singulated and physically separated semiconductor substrate portions exposes a portion of the monolithic metallization structure.

Abstract: A magnetic cell core includes a seed region with a plurality of magnetic regions and a plurality of nonmagnetic regions thereover. The seed region provides a template that enables formation of an overlying nonmagnetic region with a microstructure that enables formation of an overlying free region with a desired crystal structure. The free region is disposed between two nonmagnetic regions, which may both be configured to induce surface/interface magnetic anisotropy. The structure is therefore configured to have a high magnetic anisotropy strength, a high energy barrier ratio, high tunnel magnetoresistance, a low programming current, low cell-to-cell electrical resistance variation, and low cell-to-cell variation in magnetic properties. Methods of fabrication, memory arrays, memory systems, and electronic systems are also disclosed.

Abstract: The present disclosure provides an organic light emitting diode (OLED) display device, including a support member, a central frame disposed on the display support member. A left frame slidably connected to the central frame. A right frame slidably connected to the central frame. The OLED display is rolled up or stretched by sliding the left frame and the right frame. Therefore, space of large display is reduced, and convenience of carrying is enhanced.

Abstract: A physical unclonable function (PUF) chip is provided. The physical unclonable function (PUF) chip includes a chip with a top metal connection layer, an array of spaced electrode plates on the top metal connection layer of the chip, a deposition layer, on the top metal connection layer between each two adjacent electrode plates. An opening is formed between the each two adjacent electrode plates in a row, and each two adjacent electrode plates are tangential to the opening formed between the two adjacent electrode plates. The physical unclonable function (PUF) chip further includes a conductive coating layer on the chip and the conductive coating layer includes conductive particles with randomly distributed size, and a package substrate, packaged with the chip including the conductive coating layer.

Abstract: A manufacturing method of a display device includes: forming a first electrode on a base substrate; forming a pixel definition layer through which an opening is defined to expose an upper surface of the first electrode; providing an organic molecular thin film including a self-assembled monolayer on the first electrode and the pixel definition layer; desorbing a portion of the organic molecular thin film which corresponds to the first electrode; and providing at least one organic layer on the first electrode.

Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a base substrate; a first insulating layer on the base substrate and in at least the peripheral area; a plurality of light emitting elements on the base substrate and in the display area; and an encapsulating layer on a side of the plurality of light emitting elements distal to the base substrate to encapsulate the plurality of light emitting elements. The encapsulating layer includes a first inorganic encapsulating sublayer extending from the display area into the peripheral area. The display substrate has a groove extending into the first insulating layer in the peripheral area, forming a first perimeter substantially surrounding the display area. The first inorganic encapsulating sublayer extends into at least a portion of the groove.

Abstract: The present disclosure provides a display panel, a display device including the display panel, and a method of manufacturing the display panel. The display panel includes a substrate; a pixel-defining layer disposed on the substrate, wherein the pixel-defining layer defines a plurality of sub-pixel regions arranged in rows and columns; and an organic light emitting element disposed in at least one of the plurality of sub-pixel regions, wherein a side of the pixel-defining layer away from the substrate is provided with a groove, the groove has a depth less than a thickness of the pixel-defining layer, and the groove is disposed between the organic light emitting elements that are adjacent to each other and emit light of different colors.